LM5010MH/NOPB - NATIONAL SEMICONDUCTOR

LM5010

LM5010 High Voltage 1A Step Down Switching Regulator

Literature Number: SNVS307E

LM5010

High Voltage 1A Step Down Switching Regulator

General Description

The LM5010 Step Down Switching Regulator features all the

functions needed to implement a low cost, efficient, buck

bias regulator capable of supplying in excess of 1A load

current. This high voltage regulator contains an N-Channel

Buck Switch, and is available in thermally enhanced LLP-10

and TSSOP-14EP packages. The hysteretic regulation

scheme requires no loop compensation, results in fast load

transient response, and simplifies circuit implementation.

The operating frequency remains constant with line and load

variations due to the inverse relationship between the input

voltage and the on-time. The valley current limit detection is

set at 1.25A. Additional features include: V

under-voltage

lockout, thermal shutdown, gate drive under-voltage lockout,

and maximum duty cycle limiter.

Features

nInput Voltage Range: 8V to 75V

nValley Current Limit At 1.25A

nSwitching Frequency Can Exceed 1 MHz

nIntegrated N-Channel Buck Switch

nIntegrated Startup Regulator

nNo Loop Compensation Required

nUltra-Fast Transient Response

nOperating Frequency Remains Constant With Load and

Line Variations

nMaximum Duty Cycle Limited During Startup

nAdjustable Output Voltage

nPrecision 2.5V Feedback Reference

nThermal shutdown

Typical Applications

nHigh Efficiency Point-Of-Load (POL) Regulator

nNon-Isolated Telecommunications Buck Regulator

nSecondary High Voltage Post Regulator

nAutomotive Systems

Package

nLLP-10 (4 mmx4mm)

nTSSOP-14EP

nBoth Packages Have Exposed Thermal Pad For

Improved Heat Dissipation

20119943

Basic Stepdown Regulator

February 2005

LM5010 High Voltage 1A Step Down Switching Regulator

Connection Diagrams

20119902

20119903

Ordering Information

Order Number Package Type NSC Package Drawing Supplied As

LM5010SD LLP-10 (4x4) SDC10A 1000 Units on Tape and Reel

LM5010SDX LLP-10 (4x4) SDC10A 4500 Units on Tape and Reel

LM5010MH TSSOP-14EP MXA14A 94 Units in Rail

LM5010MHX TSSOP-14EP MXA14A 2500 Units on Tape and Reel

LM5010

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Pin Description

PIN NUMBER

NAME DESCRIPTION APPLICATION INFORMATIONLLP-10 TSSOP-14

1 2 SW Switching Node Internally connected to the buck switch source.

Connect to the inductor, free-wheeling diode, and

bootstrap capacitor.

2 3 BST Boost pin for bootstrap capacitor Connect a 0.022 µF capacitor from SW to this pin.

The capacitor is charged from V

via an internal

diode during each off-time.

34I

SEN

Current sense The re-circulating current flows through the internal

sense resistor, and out of this pin to the

free-wheeling diode. Current limit is nominally set at

1.25A.

45S

GND

Sense Ground Re-circulating current flows into this pin to the

current sense resistor.

5 6 RTN Circuit Ground Ground for all internal circuitry other than the current

limit detection.

6 9 FB Feedback input from the

regulated output

Internally connected to the regulation and

over-voltage comparators. The regulation level is

2.5V.

7 10 SS Softstart An internal 11.5 µA current source charges an

external capacitor to 2.5V, providing the softstart

function.

811R

/SD On-time control and shutdown An external resistor from V

to this pin sets the

buck switch on-time. Grounding this pin shuts down

the regulator.

912V

Output from the startup regulator Nominally regulates at 7.0V. An external voltage

(7.5V-14V) can be applied to this pin to reduce

internal dissipation. An internal diode connects V

to V

10 13 V

Input supply voltage Nominal input range is 8.0V to 75V.

1,7,8,14 NC No connection. No internal connection.

LM5010

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Absolute Maximum Ratings (Note 1)

If Military/Aerospace specified devices are required,

please contact the National Semiconductor Sales Office/

Distributors for availability and specifications.

to GND 76V

BST to GND 90V

SW to GND (Steady State) -1.5V

BST to V

76V

BST to SW 14V

to GND 14V

GND

to RTN -0.3V to +0.3V

SS to RTN -0.3V to 4V

to SW 76V

Current Out of I

SEN

See Text

All Other Inputs to GND -0.3 to 7V

ESD Rating (Note 2)

Human Body Model 2kV

Storage Temperature Range -55˚C to +150˚C

Lead Temperature (Soldering 4 sec) (Note 4) 260˚C

Operating Ratings (Note 1)

8V to 75V

Operating Junction Temperature −40˚C to + 125˚C

Electrical Charateristics

Specifications with standard typeface are for T

= 25˚C, and those with boldface type apply over full Operating Junction

Temperature range.V

= 48V, R

= 200kΩ, unless otherwise stated (Note 5) and (Note 6).

Symbol Parameter Conditions Min Typ Max Units

Regulator

Reg V

regulated output 6.6 77.4 Volts

-V

= 0 mA, F

<200 kHz

7.5V ≤V

≤8.0V

1.3 V

output impedance

(0 mA ≤I

≤5 mA)

= 8.0V

= 48V

140

2.5

Ω

current limit (Note 3) V

=0V 10 mA

UVLO

VCC

under-voltage lockout

threshold

increasing 5.8 V

UVLO

VCC

hysteresis V

decreasing 145 mV

UVLO

VCC

filter delay 100 mV overdrive 3 µs

operating current Non-switching, FB = 3V 650 850 µA

shutdown current R

/SD=0V 95 200 µA

Switch Characteristics

Rds(on) Buck Switch Rds(on) I

TEST

= 200 mA 0.35 0.80 Ω

UVLO

Gate Drive UVLO V

BST

-V

Increasing 3.0 4.3 5.0 V

UVLO

hysteresis 440 mV

Softstart Pin

Pull-up voltage 2.5 V

Internal current source 11.5 µA

Current Limit

LIM

Threshold Current out of I

SEN

11.25 1.5 A

Resistance from I

SEN

to S

GND

130 mΩ

Response time 150 ns

On Timer, R

/SD Pin

- 1 On-time V

= 10V, R

= 200 kΩ2.1 2.75 3.4 µs

- 2 On-time V

= 75V, R

= 200 kΩ290 390 490 ns

Shutdown threshold Voltage at R

/SD rising 0.35 0.65 1.1 V

Threshold hysteresis Voltage at R

/SD falling 40 mV

Off Timer

OFF

Off-time 265 ns

LM5010

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Electrical Charateristics (Continued)

Specifications with standard typeface are for T

= 25˚C, and those with boldface type apply over full Operating Junction

Temperature range.V

= 48V, R

= 200kΩ, unless otherwise stated (Note 5) and (Note 6).

Symbol Parameter Conditions Min Typ Max Units

Regulation and Over-Voltage Comparators (FB Pin)

REF

FB regulation threshold SS pin = steady state 2.445 2.5 2.550 V

FB over-voltage threshold 2.9 V

FB bias current 1 nA

Thermal Shutdown

Thermal shutdown

temperature

175 ˚C

Thermal shutdown hysteresis 20 ˚C

Thermal Resistance

Junction to Ambient SDC Package

MXA Package

40 ˚C/W

Note 1: Absolute Maximum Ratings are limits beyond which damage to the device may occur. Operating Ratings are conditions under which operation of the device

is intended to be functional. For guaranteed specifications and test conditions, see the Electrical Characteristics.

Note 2: The human body model is a 100pF capacitor discharged through a 1.5kΩresistor into each pin.

Note 3: VCC provides bias for the internal gate drive and control circuits. Device thermal limitations limit external loading.

Note 4: For detailed information on soldering plastic TSSOP and LLP packages refer to the Packaging Data Book available from National Semiconductor

Corporation.

Note 5: Typical specifications represent the most likely parametric norm at 25˚C operation.

Note 6: All limits are guaranteed. All electrical characteristics having room temperature limits are tested during production with TA= 25˚C. All hot and cold limits are

guaranteed by correlating the electrical characteristics to process and temperature variations and applying statistical process control.

LM5010

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Typical Application Circuit and Block Diagram

(pin numbers are for the LLP-10 package)

20119944

FIGURE 1.

LM5010

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Typical Performance Characteristics

20119904

FIGURE 2. V

vs V

20119905

FIGURE 3. V

vs I

20119906

FIGURE 4. I

vs Externally Applied V

20119907

FIGURE 5. On-Time vs V

and R

LM5010

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Typical Performance

Characteristics (Continued)

20119908

FIGURE 6. Voltage at R

/SD Pin

20119910

FIGURE 7. I

vs V

LM5010

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Typical Performance Characteristics (Continued)

Functional Description

The LM5010 Step Down Switching Regulator features all the

functions needed to implement a low cost, efficient buck bias

power converter capable of supplying in excess of 1A to the

load. This high voltage regulator contains an N-Channel

buck switch, is easy to implement, and is available in the

thermally enhanced LLP-10 and TSSOP-14EP packages.

The regulator’s operation is based on a hysteretic control

scheme, and uses an on-time which varies inversely with

. This feature results in the operating frequency remain-

ing relatively constant with load and input voltage variations.

The switching frequency can range from 100 kHz to >1.0

MHz. The hysteretic control requires no loop compensation

resulting in very fast load transient response. The valley

current limit detection circuit, internally set at 1.25A, holds

the buck switch off until the high current level subsides.

Figure 1 shows the functional block diagram. The LM5010

can be applied in numerous applications to efficiently regu-

late down higher voltages. This regulator is well suited for

48V telecom applications, as well as the new 42V automo-

tive power bus. Implemented as a Point-of-Load regulator

following a highly efficient intermediate bus converter can

result in high overall system efficiency. Features include:

Thermal shutdown, V

under-voltage lockout, gate drive

under-voltage lockout, and maximum duty cycle limit.

Hysteretic Control Circuit

Overview

The LM5010 buck DC-DC regulator employs a control

scheme based on a comparator and a one-shot on-timer,

with the output voltage feedback (FB) compared to an inter-

nal reference (2.5V). If the FB voltage is below the reference

the buck switch is turned on for a time period determined by

the input voltage and a programming resistor (R

). Follow-

ing the on-time the switch remains off for 265 ns, or until the

FB voltage falls below the reference, whichever is longer.

The buck switch then turns on for another on-time period.

20119911

FIGURE 8. Startup Sequence

LM5010

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Hysteretic Control Circuit

Overview (Continued)

Typically when the load current increases suddenly, the off-

times are temporarily at the minimum of 265 ns. Once regu-

lation is established, the off-time resumes its normal value.

The output voltage is set by two external resistors (R1, R2).

The regulated output voltage is calculated as follows:

OUT

= 2.5V x (R1 + R2) / R2 (1)

Output voltage regulation is based on ripple voltage at the

feedback input, requiring a minimum amount of ESR for the

output capacitor C2. The LM5010 requires a minimum of 25

mV of ripple voltage at the FB pin. In cases where the

capacitor’s ESR is insufficient additional series resistance

may be required (R3 in Figure 1 ).

When in regulation, the LM5010 operates in continuous

conduction mode at heavy load currents and discontinuous

conduction mode at light load currents. In continuous con-

duction mode current always flows through the inductor,

never reaching zero during the off-time. In this mode the

operating frequency remains relatively constant with load

and line variations. The minimum load current for continuous

conduction mode is one-half the inductor’s ripple current

amplitude. The approximate operating frequency is calcu-

lated as follows:

(2)

The buck switch duty cycle is approximately equal to:

(3)

At low load current, the circuit operates in discontinuous

conduction mode, during which the inductor current ramps

up from zero to a peak during the on-time, then ramps back

to zero before the end of the off-time. The next on-time

period starts when the voltage at FB falls below the refer-

ence - until then the inductor current remains zero, and the

load current is supplied by the output capacitor (C2). In this

mode the operating frequency is lower than in continuous

conduction mode, and varies with load current. Conversion

efficiency is maintained at light loads since the switching

losses reduce with the reduction in load and frequency. The

approximate discontinuous operating frequency can be cal-

culated as follows:

(4)

where R

= the load resistance.

For applications where lower output voltage ripple is re-

quired the output can be taken directly from a low ESR

output capacitor as shown in Figure 9. However, R3 slightly

degrades the load regulation.

Start-up Regulator (V

)

The startup regulator is integral to the LM5010. The input pin

) can be connected directly to line voltages up to 75V.

The V

output is regulated at 7.0V, ±6%, and is current

limited to 10 mA. Upon power up the regulator sources

current into the external capacitor at V

(C3). With a 0.1 µF

capacitor at V

, approximately 58 µs are required for the

voltage to reach the under-voltage lockout threshold

(UVLO) of 5.8V (t1 in Figure 8), at which time the buck switch

is enabled, and the softstart pin is released to allow the

softstart capacitor (C6) to charge up. V

OUT

then increases to

its regulated value as the softstart voltage increases (t2 in

Figure 8).

The minimum input operating voltage is determined by the

regulator’s dropout voltage, the V

UVLO falling threshold

()5.65V), and the frequency. When V

falls below the

falling threshold the V

UVLO activates to shut off the buck

switch and ground the softstart pin. If V

is externally

loaded, the minimum input voltage increases since the out-

put impedance at V

is )140Ωat low V

. See Figures 2

and 3. In applications involving a high value for V

where

power dissipation in the startup regulator is a concern, an

auxiliary voltage can be diode connected to the V

(Figure 10). Setting the auxiliary voltage to between 7.5V

and 14V shuts off the internal regulator, reducing internal

power dissipation. The current required into the V

pin is

shown in Figure 4. Internally a diode connects V

to V

20119915

FIGURE 9. Low Ripple Output Configuration

LM5010

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Start-up Regulator (V

)(Continued)

Regulation Comparator

The feedback voltage at FB is compared to the voltage at the

Softstart pin (2.5V, ±2%). In normal operation (the output

voltage is regulated) an on-time period is initiated when the

voltage at FB falls below 2.5V. The buck switch stays on for

the on-time causing the FB voltage to rise above 2.5V. After

the on-time period the buck switch stays off until the FB

voltage falls below 2.5V. Bias current at the FB pin is less

than 5 nA over temperature.

Over-Voltage Comparator

The feedback voltage at FB is compared to an internal 2.9V

reference. If the voltage at FB rises above 2.9V the on-time

is immediately terminated. This condition can occur if the

input voltage, or the output load, change suddenly. The buck

switch will not turn on again until the voltage at FB falls below

2.5V.

ON-Time Control

The on-time of the internal switch (see Figure 5) is deter-

mined by the R

resistor and the input voltage (V

), cal-

culated from the following:

(5)

The inverse relationship of t

vs. V

results in a nearly

constant frequency as V

is varied. If the application re-

quires a high frequency the minimum value for t

, and

consequently R

, is limited by the off-time (265 ns, ±15%)

which limits the maximum duty cycle at minimum V

. The

tolerance for Equation 5 is ±25%. Frequencies in excess of

1 MHz are possible with the LM5010.

Shutdown

The LM5010 can be remotely shut down by taking the

/SD pin below 0.65V. See Figure 11. In this mode the

softstart pin is internally grounded, the on-timer is disabled,

and the input current at V

is reduced (Figure 7). Releasing

the R

/SD pin allows normal operation to resume. When

the switch is open, the nominal voltage at R

/SD is shown

in Figure 6.

20119916

FIGURE 10. Self Biased Configuration

20119918

FIGURE 11. Shutdown Implementation

LM5010

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Current Limit

Current limit detection occurs during the off-time by monitor-

ing the recirculating current through the free-wheeling diode

(D1). The detection threshold is 1.25A, ±0.25A. Referring to

Figure 1, when the buck switch is off the inductor current

flows through the load, into S

GND

, through the sense resistor,

out of I

SEN

and through D1. If that current exceeds the

threshold the current limit comparator output switches to

delay the start of the next on-time period. The next on-time

starts when the current out of I

SEN

is below the threshold and

the voltage at FB is below 2.5V. If the overload condition

persists causing the inductor current to exceed the threshold

during each on-time, that is detected at the beginning of

each off-time. The operating frequency is lower due to

longer-than-normal off-times.

Figure 12 illustrates the inductor current waveform. During

normal operation the load current is I

, the average of the

ripple waveform. When the load resistance decreases the

current ratchets up until the lower peak attempts to exceed

the threshold. During the Current Limited portion of Figure

12, the current ramps down to the threshold during each

off-time, initiating the next on-time (assuming the voltage at

FB is <2.5V). During each on-time the current ramps up an

amount equal to:

(6)

During this time the LM5010 is in a constant current mode,

with an average load current (I

OCL

) equal to the threshold +

∆I/2.

The “valley current limit” technique allows the load current to

exceed the current limit threshold as long as the lower peak

of the inductor current is less than the threshold.

The current limit threshold can be increased by connecting

an external resistor (R

) between S

GND

and I

SEN

. The

external resistor typically is less than 1Ω, and its calculation

is explained in the Applications Information section.

The peak current out of SW and I

SEN

must not exceed 3.5A.

The average current out of SW must be less than 3A, and

the average current out of I

SEN

must be less than 2A.

N - Channel Buck Switch and

Driver

The LM5010 integrates an N-Channel buck switch and as-

sociated floating high voltage gate driver. The peak current

through the buck switch must not be allowed to exceed 3.5A,

and the average current must be less than 3A. The gate

driver circuit is powered by the external bootstrap capacitor

between BST and SW (C4). During each off-time, the SW pin

is at approximately -1V, and C4 is re-charged from V

through the internal high voltage diode. The minimum off-

time of 265 ns ensures a minimum time each cycle to

recharge the bootstrap capacitor. A 0.022 µF ceramic ca-

pacitor is recommended for C4.

Softstart

The softstart feature allows the converter to gradually reach

a steady state operating point, thereby reducing startup

stresses and current surges. Upon turn-on, after V

reaches the under-voltage threshold (t1 in Figure 8), an

internal 11.5 µA current source charges the external capaci-

tor at the Softstart pin to 2.5V (t2 in Figure 8). The ramping

voltage at SS (and at the non-inverting input of the regulation

comparator) ramps up the output voltage in a controlled

manner. This feature keeps the load current from going to

current limit during startup, thereby reducing inrush currents.

An internal switch grounds the Softstart pin if V

is below

the under-voltage lockout threshold, if a thermal shutdown

occurs, or if the circuit is shutdown using the R

/SD pin.

Thermal Shutdown

The LM5010 should be operated so the junction temperature

does not exceed 125˚C. If the junction temperature in-

creases above that, an internal Thermal Shutdown circuit

activates (typically) at 175˚C, taking the controller to a low

power reset state by disabling the buck switch and the

on-timer, and grounding the Softstart pin. This feature helps

prevent catastrophic failures from accidental device over-

20119920

FIGURE 12. Inductor Current - Current Limit Operation

LM5010

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Thermal Shutdown (Continued)

heating. When the junction temperature reduces below

155˚C (typical hysteresis = 20˚C), the Softstart pin is re-

leased and normal operation resumes.

Applications Information

EXTERNAL COMPONENTS

The procedure for calculating the external components is

illustrated with a design example. The circuit in Figure 1 is to

be configured for the following specifications:

•V

OUT

= 10V

•V

= 15V to 75V

•F

= 625 kHz

•Minimum load current = 150 mA

•Maximum load current = 1.0A

•Softstart time=5ms.

R1 and R2:The ratio of these resistors is calculated from:

R1/R2 = (V

OUT

/2.5V) - 1 (7)

R1/R2 calculates to 3.0. The resistors should be chosen

from standard value resistors in the range of 1.0 kΩ-10kΩ.

Values of 3.0 kΩfor R1, and 1.0 kΩfor R2 will be used.

sets the on-time, and can be chosen using

Equation 2 to set a nominal frequency, or from Equation 5 if

the on-time at a particular V

is important. A higher fre-

quency generally means a smaller inductor and capacitors

(value, size and cost), but higher switching losses. A lower

frequency means a higher efficiency, but with larger compo-

nents. If PC board space is tight, a higher frequency is better.

The resulting on-time and frequency have a ±25% toler-

ance. Re-arranging Equation 2 ,

The next larger standard value (137 kΩ) is chosen for R

yielding a nominal frequency of 618 kHz.

L1: The inductor value is determined based on the load

current, ripple current, and the minimum and maximum input

voltage (V

IN(min)

IN(max)

). Refer to Figure 13 .

To keep the circuit in continuous conduction mode, the maxi-

mum allowed ripple current is twice the minimum load cur-

rent, or 300 mAp-p. Using this value of ripple current, the

inductor (L1) is calculated using the following:

(8)

where F

S(min)

is the minimum frequency (F

- 25%).

This provides a minimum value for L1 - the next higher

standard value (100 µH) will be used. L1 must be rated for

the peak current (I

PK+

) to prevent saturation. The peak cur-

rent occurs at maximum load current with maximum ripple.

The maximum ripple is calculated by re-arranging Equation

8 using V

IN(max)

S(min)

, and the minimum inductor value,

based on the manufacturer’s tolerance. Assume, for this

exercise, the inductor’s tolerance is ±20%.

(9)

PK+

= 1.0A + 0.234A / 2 = 1.117A

:Since it is obvious that the lower peak of the inductor

current waveform does not exceed 1.0A at maximum load

current (see Figure 13), it is not necessary to increase the

current limit threshold. Therefore R

is not needed for this

exercise. For applications where the lower peak exceeds

1.0A, see the section below on increasing the current limit

threshold.

C2 and R3: Since the LM5010 requires a minimum of 25

mVp-p of ripple at the FB pin for proper operation, the

required ripple at V

OUT1

is increased by R1 and R2. This

necessary ripple is created by the inductor ripple current

acting on C2’s ESR + R3. First, the minimum ripple current is

determined.

20119922

FIGURE 13. Inductor Current

LM5010

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Applications Information (Continued)

(10)

The minimum ESR for C2 is then equal to:

If the capacitor used for C2 does not have sufficient ESR, R3

is added in series as shown in Figure 1. C2 should generally

be no smaller than 3.3 µF, although that is dependent on the

frequency and the allowable ripple amplitude at V

OUT1

. Ex-

perimentation is usually necessary to determine the mini-

mum value for C2, as the nature of the load may require a

larger value. A load which creates significant transients re-

quires a larger value for C2 than a non-varying load.

D1: The important parameters are reverse recovery time and

forward voltage drop. The reverse recovery time determines

how long the current surge lasts each time the buck switch is

turned on. The forward voltage drop is significant in the

event the output is short-circuited as it is mainly this diode’s

voltage (plus the voltage across the current limit sense re-

sistor) which forces the inductor current to decrease during

the off-time. For this reason, a higher voltage is better,

although that affects efficiency. A reverse recovery time of

)30 ns, and a forward voltage drop of )0.75V are preferred.

The reverse leakage specification is important as that can

significantly affect efficiency. Other types of diodes may have

a lower forward voltage drop, but may have longer recovery

times, or greater reverse leakage. D1 should be rated for the

maximum V

, and for the peak current when in current limit

in Figure 11) which is equal to:

= 1.5A + I

OR(max)

= 1.734A

where 1.5A is the maximum guaranteed current limit thresh-

old, and the maximum ripple current was previously calcu-

lated as 234 mAp-p. Note that this calculation is valid only

when R

is not required.

C1: Assuming the voltage supply feeding V

has a source

impedance greater than zero, this capacitor limits the ripple

voltage at V

while supplying most of the switch current

during the on-time. At maximum load current, when the buck

switch turns on, the current into V

increases to the lower

peak of the output current waveform, ramps up to the peak

value, then drops to zero at turn-off. The average current into

during this on-time is the load current. For a worst case

calculation, C1 must supply this average load current during

the maximum on-time. The maximum on-time is calculated

using Equation 5, with a 25% tolerance added:

C1 is calculated from:

where I

is the load current, and ∆V is the allowable ripple

voltage at V

(1V for this example). Quality ceramic capaci-

tors with a low ESR should be used for C1. To allow for

capacitor tolerances and voltage effects, a 2.2 µF capacitor

will be used

C3: The capacitor at the V

pin provides not only noise

filtering and stability, but also prevents false triggering of the

UVLO at the buck switch on/off transitions. For this

reason, C3 should be no smaller than 0.1 µF, and should be

a good quality, low ESR, ceramic capacitor. This capacitor

also determines the initial startup delay (t1 in Figure 8).

C4: The recommended value for C4 is 0.022 µF. A high

quality ceramic capacitor with low ESR is recommended as

C4 supplies the surge current to charge the buck switch gate

at turn-on. A low ESR also ensures a complete recharge

during each off-time.

C5: This capacitor suppresses transients and ringing due to

long lead inductance at V

. A low ESR, 0.1 µF ceramic chip

capacitor is recommended, located physically close to the

LM5010.

C6: The capacitor at the SS pin determines the softstart

time, i.e. the time for the reference voltage at the regulation

comparator, and the output voltage, to reach their final value.

The time is determined from the following:

Fora5mssoftstart time, C6 calculates to 0.022 µF.

FINAL CIRCUIT

The final circuit is shown in Figure 14, and its performance is

shown in Figures 15 - 18.

LM5010

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Applications Information (Continued)

Item Description Part No. Package Value

C1 Ceramic Capacitor TDK C4532X7R2A225M 1812 2.2 µF, 100V

C2 Ceramic Capacitor TDK C4532X7R1E156M 1812 15 µF, 25V

C3 Ceramic Capacitor Kemet C0805C104K4RAC 0805 0.1 µF, 16V

C4, C6 Ceramic Capacitor Kemet C0805C223K4RAC 0805 0.022 µF, 16V

C5 Ceramic Capacitor TDK C2012X7R2A104M 0805 0.1 µF, 100V

D1 Ultra fast diode Central Semi CMR2U-01 SMB 100V, 2A

L1 Inductor TDK SLF10145 10.1 x 10.1 100 µH

R1 Resistor Vishay CRCW08053001F 0805 3.0 kΩ

R2 Resistor Vishay CRCW08051001F 0805 1.0 kΩ

R3 Resistor Vishay CRCW08052R80F 0805 2.8 Ω

Resistor Vishay CRCW08051373F 0805 137 kΩ

U1 Switching regulator National Semi LM5010

20119933

FIGURE 14. LM5010 Example Circuit

LM5010

www.national.com15

Applications Information (Continued)

INCREASING THE CURRENT LIMIT THRESHOLD

The current limit threshold is nominally 1.25A, with a mini-

mum guaranteed value of 1.0A. If, at maximum load current,

the lower peak of the inductor current (I

PK-

in Figure 13)

exceeds 1.0A, resistor R

must be added between S

GND

and I

SEN

to increase the current limit threshold to equal or

exceed that lower peak current. This resistor diverts some of

the recirculating current from the internal sense resistor so

that a higher current level is needed to switch the internal

current limit comparator. I

PK-

is calculated from:

(11)

where I

O(max)

is the maximum load current, and I

OR(min)

the minimum ripple current calculated using Equation 10.

is calculated from:

20119934

FIGURE 15. Efficiency vs V

Circuit of Figure 14

20119935

FIGURE 16. Efficiency vs Load Current and V

Circuit of Figure 14

20119936

FIGURE 17. Output Voltage Ripple vs V

Circuit of Figure 14

20119937

FIGURE 18. Frequency vs V

Circuit of Figure 14

LM5010

www.national.com 16

Applications Information (Continued)

(12)

where 0.11Ωis the minimum value of the internal resistance

from S

GND

to I

SEN

. The next smaller standard value resistor

should be used for R

. With the addition of R

it is neces-

sary to check the average and peak current values to ensure

they do not exceed the LM5010 limits. At maximum load

current the average current through the internal sense resis-

tor is:

(13)

If I

AVE

is less than 2.0A no changes are necessary. If it

exceeds 2.0A, R

must be reduced. The upper peak of the

inductor current (I

PK+

), at maximum load current, is calcu-

lated using the following:

(14)

where I

OR(max)

is calculated using Equation 9. If I

PK+

ex-

ceeds 3.5A , the inductor value must be increased to reduce

the ripple amplitude. This will necessitate recalculation of

OR(min)

PK-

, and R

When the circuit is in current limit, the upper peak current out

of the SW pin is

The inductor L1 and diode D1 must be rated for this current.

PC BOARD LAYOUT

The LM5010 regulation, over-voltage, and current limit com-

parators are very fast, and will respond to short duration

noise pulses. Layout considerations are therefore critical for

optimum performance. The layout must be as neat and

compact as possible, and all the components must be as

close as possible to their associated pins. The current loop

formed by D1, L1, C2, and the S

GND

and I

SEN

pins should be

as small as possible. The ground connection from C2 to C1

should be as short and direct as possible. If it is expected

that the internal dissipation of the LM5010 will produce high

junction temperatures during normal operation, good use of

the PC board’s ground plane can help considerably to dissi-

pate heat. The exposed pad on the IC package bottom can

be soldered to a ground plane, and that plane should both

extend from beneath the IC, and be connected to exposed

ground plane on the board’s other side using as many vias

as possible. The exposed pad is internally connected to the

IC substrate.

The use of wide PC board traces at the pins, where possible,

can help conduct heat away from the IC. The four No Con-

nect pins on the TSSOP package are not electrically con-

nected to any part of the IC, and may be connected to

ground plane to help dissipate heat from the package. Judi-

cious positioning of the PC board within the end product,

along with the use of any available air flow (forced or natural

convection) can help reduce the junction temperature.

LM5010

www.national.com17

Physical Dimensions inches (millimeters) unless otherwise noted

14-Lead TSSOP Package

NS Package Number MXA14A

10-Lead LLP Package

NS Package Number SDC10A

LM5010

www.national.com 18

Notes

National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves

the right at any time without notice to change said circuitry and specifications.

For the most current product information visit us at www.national.com.

LIFE SUPPORT POLICY

NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS

WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT AND GENERAL COUNSEL OF NATIONAL SEMICONDUCTOR

CORPORATION. As used herein:

1. Life support devices or systems are devices or systems

which, (a) are intended for surgical implant into the body, or

(b) support or sustain life, and whose failure to perform when

properly used in accordance with instructions for use

provided in the labeling, can be reasonably expected to result

in a significant injury to the user.

2. A critical component is any component of a life support

device or system whose failure to perform can be reasonably

expected to cause the failure of the life support device or

system, or to affect its safety or effectiveness.

BANNED SUBSTANCE COMPLIANCE

National Semiconductor manufactures products and uses packing materials that meet the provisions of the Customer Products

Stewardship Specification (CSP-9-111C2) and the Banned Substances and Materials of Interest Specification (CSP-9-111S2) and contain

no ‘‘Banned Substances’’ as defined in CSP-9-111S2.

National Semiconductor

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Support Center

Email: new.feedback@nsc.com

Tel: 1-800-272-9959

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Fax: +49 (0) 180-530 85 86

Email: europe.support@nsc.com

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www.national.com

LM5010 High Voltage 1A Step Down Switching Regulator

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