HCPL0600, HCPL0601, HCPL0611, HCPL0637, HCPL0638, HCPL0639 High Speed-10 MBit/s Logic Gate Optocouplers Single Channel: HCPL0600, HCPL0601, HCPL0611 Dual Channel: HCPL0637, HCPL0638, HCPL0639 Features Description Compact SO8 package The HCPL06XX optocouplers consist of an AlGaAS LED, optically coupled to a very high speed integrated photo-detector logic gate with a strobable output (single channel devices). The devices are housed in a compact small-outline package. This output features an open collector, thereby permitting wired OR outputs. The HCPL0600, HCPL0601 and HCPL0611 output consists of bipolar transistors on a bipolar process while the HCPL0637, HCPL0638, and HCPL0639 output consists of bipolar transistors on a CMOS process for reduced power consumption. The coupled parameters are guaranteed over the temperature range of -40C to +85C. An internal noise shield provides superior common mode rejection. Very high speed-10 MBit/s Superior CMR Logic gate output Strobable output (single channel devices) Wired OR-open collector U.L. recognized (File # E90700) IEC60747-5-2 approved (VDE option) - HCPL0600, HCPL0601, HCPL0611 only Applications Ground loop elimination LSTTL to TTL, LSTTL or 5-volt CMOS Line receiver, data transmission Data multiplexing Switching power supplies Pulse transformer replacement Computer-peripheral interface Package Dimensions SEATING PLANE 0.164 (4.16) 0.144 (3.66) Pin 1 0.202 (5.13) 0.182 (4.63) 0.019 (0.48) 0.010 (0.25) 0.006 (0.16) 0.143 (3.63) 0.123 (3.13) 0.021 (0.53) 0.011 (0.28) 0.008 (0.20) 0.003 (0.08) 0.244 (6.19) 0.224 (5.69) 0.050 (1.27) TYP Lead Coplanarity : 0.004 (0.10) MAX Note: All dimensions are in inches (millimeters) (c)2006 Fairchild Semiconductor Corporation HCPL06XX Rev. 1.0.8 www.fairchildsemi.com HCPL06XX -- High Speed-10 MBit/s Logic Gate Optocouplers April 2009 + 1 8 VCC V F1 + 2 V 7 VE _ 2 6 VO _ 7 V01 F _ 3 3 6 V02 VF2 5 GND N/C 4 + 4 5 GND Dual-channel circuit drawing (HCPL0637, HCPL0638 and HCPL0639) Single-channel circuit drawing (HCPL0600, HCPL0601 and HCPL0611) Truth Table (Positive Logic) Input Enable Output H H L L H H H L H L L H H* NC* L* L* NC* H* *Dual channel devices or single channel devices with pin 7 not connected. A 0.1F bypass capacitor must be connected between pins 8 and 5. (See note 1) (c)2006 Fairchild Semiconductor Corporation HCPL06XX Rev. 1.0.8 www.fairchildsemi.com 2 HCPL06XX -- High Speed-10 MBit/s Logic Gate Optocouplers 8 VCC N/C 1 Symbol Parameter Value Units TSTG Storage Temperature -40 to +125 C TOPR Operating Temperature -40 to +85 C 50 mA 5.5 V 5.0 V 45 mW 7.0 V Single Channel 50 mA Dual Channel 15 EMITTER IF DC/Average Forward Input Current (each channel) Single Channel VE Enable Input Voltage Not to exceed VCC by more than 500mV Single Channel VR Reverse Input Voltage (each channel) PI Power Dissipation Dual Channel Single Channel Dual Channel DETECTOR Supply Voltage VCC (1 minute max) IO Output Current (each channel) VO Output Voltage (each channel) PO Collector Output Power Dissipation 7.0 V Single Channel 85 mW Dual Channel 85 Recommended Operating Conditions The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not recommend exceeding them or designing to absolute maximum ratings. Symbol Parameter Min. Max. Units IFL Input Current, Low Level 0 250 A IFH Input Current, High Level *6.3 15 mA VCC Supply Voltage, Output 4.5 5.5 V VEL Enable Voltage, Low Level Single Channel only 0 0.8 V VEH Enable Voltage, High Level Single Channel only 2.0 VCC V -40 +85 C Single Channel 8 TTL Loads Dual Channel 5 TA Operating Temperature N Fan Out (TTL load) RL Output Pull-up 330 4K *6.3mA is a guard banded value which allows for at least 20% CTR degradation. Initial input current threshold value is 5.0mA or less (c)2006 Fairchild Semiconductor Corporation HCPL06XX Rev. 1.0.8 www.fairchildsemi.com 3 HCPL06XX -- High Speed-10 MBit/s Logic Gate Optocouplers Absolute Maximum Ratings (No derating required up to 85C) Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. The absolute maximum ratings are stress ratings only. Individual Component Characteristics Symbol Parameter Test Conditions Min. Typ.* Max. Unit 1.8 V EMITTER VF Input Forward Voltage IF = 10mA Input Reverse Breakdown Voltage IR = 10A Input Diode Temperature Coefficient IF = 10mA High Level Supply Current IF = 0mA, VCC = 5.5V VE = 0.5 V Single Channel IF = 10mA, VCC = 5.5V VE = 0.5 V Single Channel TA = 25C BVR VF/TA 1.75 5.0 V -1.5 mV/C DETECTOR ICCH ICCL Low Level Supply Current 10 Dual Channel mA 15 13 Dual Channel mA 21 IEL Low Level Enable Current VCC = 5.5V, VE = 0.5V Single Channel -1.6 mA IEH High Level Enable Current VCC = 5.5V, VE = 2.0V Single Channel -1.6 mA VEH High Level Enable Voltage VCC = 5.5V, IF = 10mA Single Channel VEL Low Level Enable Voltage VCC = 5.5V, IF = 10mA(2) Single Channel 2.0 V 0.8 V Switching Characteristics (TA = -40C to +85C, VCC = 5 V, IF = 7.5 mA unless otherwise specified.) Symbol TPLH TPHL AC Characteristics Test Conditions Propagation Delay Time to Output High Level RL = 350, CL = Propagation Delay Time to Output Low Level RL = 350, CL = 15pF(4) |TPHL-TPLH| Pulse Width Distortion 15pF(3) TA = 25C Device Min. All 20 Typ. Max. Unit 75 (Fig. 20) ns 100 TA = 25C All 25 75 (Fig. 20) ns 100 RL = 350, CL = 15pF (Fig. 20) All 35 tr Output Rise Time (10-90%) RL = 350, CL = 15pF(5) (Fig. 20) Single Ch 50 Dual Ch 17 tf Output Fall Time (90-10%) RL = 350, CL = 15pF(6) (Fig. 20) Single Ch 12 Dual Ch 5 ns ns ns tELH Enable Propagation Delay Time to Output High Level IF = 7.5mA, VEH = 3.5V, RL = 350, CL = 15pF(7) (Fig. 21) HCPL0600 HCPL0601 HCPL0611 20 ns tEHL Enable Propagation Delay Time to Output Low Level IF = 7.5mA, VEH = 3.5V, RL = 350, CL = 15 pF(8) (Fig. 21) HCPL0600 HCPL0601 HCPL0611 20 ns Common Mode Transient Immunity (at Output High Level) RL = 350, TA =25C, IF = 0mA, VOH (Min.) = 2.0 V(9) (Fig. 22, 23) |VCM| = 10V HCPL0600 HCPL0637 |VCM| = 50V HCPL0601 HCPL0638 |CMH| V/s 5000 |VCM| = 1,000V HCPL0611 10,000 HCPL0639 25,000 |CMH| Common Mode Transient Immunity (at Output Low Level) RL = 350, TA =25C, IF = 7.5mA, VOL (Max.) = 0.8 V(10) (Fig. 22, 23) |VCM| = 10V HCPL0600 HCPL0637 |VCM| = 50V HCPL0601 HCPL0638 V/s 5000 |VCM| = 1,000V HCPL0611 10,000 HCPL0639 25,000 (c)2006 Fairchild Semiconductor Corporation HCPL06XX Rev. 1.0.8 www.fairchildsemi.com 4 HCPL06XX -- High Speed-10 MBit/s Logic Gate Optocouplers Electrical Characteristics (TA = -40C to +85C unless otherwise specified.) Symbol DC Characteristics Test Conditions Min. Typ.* Max. Unit IOH High Level Output Current VCC = 5.5V, VO = 5.5 V, IF = 250A, VE = 2.0V(2) 100 A VOL Low Level Output Voltage VCC = 5.5V, IF = 5mA, VE = 2.0V, IOL = 13mA(2) 0.6 V IFT Input Threshold Current VCC = 5.5V, VO = 0.6V, VE = 2.0V, IOL = 13mA 5 mA Isolation Characteristics (TA = -40C to +85C unless otherwise specified.) Symbol II-O Characteristics Test Conditions Min. Typ.* Max. Unit 1.0* A Input-Output Insulation Leakage Current Relative humidity = 45%, TA = 25C, t = 5s, VI-O = 3000 VDC(11) VISO Withstand Insulation Test Voltage RH < 50%, TA = 25C, II-O 2A, t = 1 min.(11) RI-O Resistance (Input to Output) VI-O = 500V(11) 1012 1MHz(11) 0.6 pF CI-O Capacitance (Input to Output) f= 3750 VRMS *All typical values are at VCC = 5 V, TA = 25C Notes: 1. The VCC supply to each optoisolator must be bypassed by a 0.1F capacitor or larger. This can be either a ceramic or solid tantalum capacitor with good high frequency characteristic and should be connected as close as possible to the package VCC and GND pins of each device. 2. Enable Input - No pull up resistor required as the device has an internal pull up resistor. 3. tPLH - Propagation delay is measured from the 3.75mA level on the HIGH to LOW transition of the input current pulse to the 1.5V level on the LOW to HIGH transition of the output voltage pulse. 4. tPHL - Propagation delay is measured from the 3.75mA level on the LOW to HIGH transition of the input current pulse to the 1.5V level on the HIGH to LOW transition of the output voltage pulse. 5. tr - Rise time is measured from the 90% to the 10% levels on the LOW to HIGH transition of the output pulse. 6. tf - Fall time is measured from the 10% to the 90% levels on the HIGH to LOW transition of the output pulse. 7. tELH - Enable input propagation delay is measured from the 1.5V level on the HIGH to LOW transition of the input voltage pulse to the 1.5V level on the LOW to HIGH transition of the output voltage pulse. 8. tEHL - Enable input propagation delay is measured from the 1.5V level on the LOW to HIGH transition of the input voltage pulse to the 1.5V level on the HIGH to LOW transition of the output voltage pulse. 9. CMH - The maximum tolerable rate of rise of the common mode voltage to ensure the output will remain in the high state (i.e., VOUT > 2.0V). Measured in volts per microsecond (V/s). 10. CML - The maximum tolerable rate of fall of the common mode voltage to ensure the output will remain in the low output state (i.e., VOUT < 0.8V). Measured in volts per microsecond (V/s). 11. Device considered a two-terminal device: Pins 1, 2, 3 and 4 shorted together, and Pins 5, 6, 7 and 8 shorted together. (c)2006 Fairchild Semiconductor Corporation HCPL06XX Rev. 1.0.8 www.fairchildsemi.com 5 HCPL06XX -- High Speed-10 MBit/s Logic Gate Optocouplers Transfer Characteristics (TA = -40C to +85C unless otherwise specified.) Fig. 1 Forward Current vs. Input Forward Voltage Fig. 2 Output Voltage vs. Forward Current 100 6 5 10 Vo - OUTPUT VOLTAGE (V) IF - FORWARD CURRENT (mA) TA = 25C VCC = 5V TA = 85C TA = -40C TA = 70C 1 TA = 25C TA = 0C 0.1 0.01 4 RL = 350 3 RL = 1k 2 1 0 0.001 0.9 1.0 1.1 1.2 1.3 1.4 1.5 1.6 0 1.7 VF - FORWARD VOLTAGE (V) 2 3 4 5 IF - FORWARD INPUT CURRENT (mA) Fig. 4 High Level Output Current vs. Temperature Fig. 3 Input Threshold Current vs. Temperature 16 IOH - HIGH LEVEL OUTPUT CURRENT (A) 5 ITH - INPUT THRESHOLD CURRENT (mA) 1 VCC = 5V VO = 0.6V 4 3 RL = 350 2 RL = 1K 1 14 12 10 8 6 4 VO = VCC = 5.5V VE = 2V IF = 250A 2 0 0 -40 -20 0 20 40 60 80 -40 100 (c)2006 Fairchild Semiconductor Corporation HCPL06XX Rev. 1.0.8 -20 0 20 40 60 80 100 TA - TEMPERATURE (C) TA - TEMPERATURE (C) www.fairchildsemi.com 6 HCPL06XX -- High Speed-10 MBit/s Logic Gate Optocouplers Typical Performance Curves (HCPL0600, HCPL0601 and HCPL0611 only) Fig. 5 Low Level Output Voltage vs. Temperature Fig. 6 Low Level Output Current vs. Temperature 60 0.8 CC = 5.5V IOL - LOW LEVEL OUTPUT CURRENT (mA) VOL - LOW LEVEL OUTPUT VOLTAGE (V) V VE = 2V IF = 5mA 0.7 0.6 0.5 IO = 12.8mA 0.4 IO = 16mA 0.3 IO = 6.4mA 0.2 IO = 9.6mA 0.1 V CC = 5V VE = 2V VOL = 0.6V 55 50 IF = 10-15mA 45 40 IF = 5mA 35 30 25 20 0.0 -40 -20 0 20 40 60 80 -40 100 -20 0 Fig. 7 Propagation Delay vs. Temperature 40 60 80 100 Fig. 8 Propagation Delay vs. Pulse Input Current 100 90 V CC = 5V V TP - PROPAGATION DELAY (ns) IF = 7.5mA 90 TP - PROPAGATION DELAY (ns) 20 TA - TEMPERATURE (C) TA - TEMPERATURE (C) 80 tPLH RL = 1k 70 60 tPLH RL = 350 50 tPHL RL = 350 & 1k 40 CC = 5V TA = 25C 80 tPLH RL = 1k 70 60 tPLH RL = 350 50 40 tPHL RL = 350 & 1k 30 30 20 20 -40 -20 0 20 40 60 80 100 5 (c)2006 Fairchild Semiconductor Corporation HCPL06XX Rev. 1.0.8 7 9 11 13 15 IF - PULSE INPUT CURRENT (mA) TA - TEMPERATURE (C) www.fairchildsemi.com 7 HCPL06XX -- High Speed-10 MBit/s Logic Gate Optocouplers Typical Performance Curves (HCPL0600, HCPL0601 and HCPL0611 only) Fig. 9 Typical Enable Propagation Delay vs. Temparature Fig. 10 Typical Rise and Fall Time vs. Temperature 240 90 CC = 5V V 70 CC = 5V IF = 7.5mA 200 tELH RL = 1k tf - FALL TIME (ns) tE - ENABLE PROPAGATION DELAY (ns) V VEH = 3V VEL = 0V IF = 7.5mA 80 60 50 tELH RL = 350 40 30 tr RL = 1k 160 120 80 tr RL = 350 tEHL RL = 350 & 1k 20 40 tf RL = 350 & 1k 10 0 0 -40 -20 0 20 40 60 80 100 -40 -20 TA - TEMPERATURE (C) 0 20 40 60 80 100 TA - TEMPERATURE (C) Fig. 11 Typical Pulse Width Distortion vs. Temperature 40 PWD - PULSE WIDTH DISTORTION (ns) V CC = 5V IF = 7.5mA 35 30 25 RL = 1k 20 15 10 RL = 350 5 0 -40 -20 0 20 40 60 80 100 TA - TEMPERATURE (C) (c)2006 Fairchild Semiconductor Corporation HCPL06XX Rev. 1.0.8 www.fairchildsemi.com 8 HCPL06XX -- High Speed-10 MBit/s Logic Gate Optocouplers Typical Performance Curves (HCPL0600, HCPL0601 and HCPL0611 only) Fig. 13 Input Threshold Current vs. Ambient Temperature Fig. 12 Input Forward Current vs. Forward Voltage 2.5 ITH - INPUT THRESHOLD CURRENT (mA) IF - FORWARD CURRENT (mA) 100 10 TA = 100C 1 TA = -40C TA = 85C 0.1 TA = 0C TA = 25C 0.01 0.001 0.8 0.9 1.0 1.1 1.2 1.3 1.4 1.5 1.6 VCC = 5.5V VO = 0.6V 2.0 RL = 350 1.5 1.0 RL = 1k RL = 4k 0.5 0.0 -40 1.7 -20 VF - FORWARD VOLTAGE (V) Fig. 14 High Level Output Current vs. Ambient Temperature IOL - LOW LEVEL OUTPUT CURRENT (mA) IOH - HIGH LEVEL OUTPUT CURRENT (nA) 40 60 80 100 40 VO = VCC = 5.5V VE = 2V (Single Channel Only) IF = 250 A 12 8 4 0 -40 -20 0 20 40 60 80 V 35 CC 30 25 20 15 10 -40 100 = 5.5V VE = 2V (Single Channel Only) VOL = 0.6V IF = 5 - 15mA -20 0 TA - AMBIENT TEMPERATURE (C) 60 80 100 80 100 70 CC V = 5.5V PWD - PULSE WIDTH DISTORTION (ns) V VE = 2V (Single Channel Only) IF = 5mA 0.4 IO = 16mA IO = 12.8mA 0.3 0.2 IO = 6.4mA IO = 9.6mA 0.1 0.0 -40 40 Fig. 17 Pulse Width Distortion vs. Ambient Temperature 0.6 0.5 20 TA - AMBIENT TEMPERATURE (C) Fig. 16 Low Level Output Voltage vs. Ambient Temperature VOL - LOW LEVEL OUTPUT VOLTAGE (V) 20 Fig. 15 Low Level Output Current vs. Ambient Temperature 20 16 0 TA - AMBIENT TEMPERATURE (C) 60 CC = 5V IF = 7.5mA 50 RL = 4k 40 30 20 RL = 1k RL = 350 10 0 -20 0 20 40 60 80 -40 100 (c)2006 Fairchild Semiconductor Corporation HCPL06XX Rev. 1.0.8 -20 0 20 40 60 TA - AMBIENT TEMPERATURE (C) TA - AMBIENT TEMPERATURE (C) www.fairchildsemi.com 9 HCPL06XX -- High Speed-10 MBit/s Logic Gate Optocouplers Typical Performance Curves (HCPL0637, HCPL0638 and HCPL0639 only) Fig. 18 Propagation Delay vs. Ambient Temperature Fig. 19 Rise and Fall Times vs. Ambient Temperature 120 CC V = 5V IF = 7.5mA 300 CC = 5V IF = 7.5mA 6 80 tPLH tPLH RL = 4k RL = 1k 60 40 tPLH 5 200 4 3 150 tf - RL = 350, 1k, 4k 2 100 RL = 350 tPHL 250 tr - RL = 1k RL = 350, 1k, 4k 20 1 50 tr - RL = 350 0 0 0 -40 -20 0 20 40 60 80 -40 100 TA - AMBIENT TEMPERATURE (C) (c)2006 Fairchild Semiconductor Corporation HCPL06XX Rev. 1.0.8 tf - FALL TIME (ns) tr - RL = 4k tr - RISE TIME (ns) TP - PROPAGATION DELAY (ns) 100 7 350 V -20 0 20 40 60 80 100 TA - AMBIENT TEMPERATURE (C) www.fairchildsemi.com 10 HCPL06XX -- High Speed-10 MBit/s Logic Gate Optocouplers Typical Performance Curves (HCPL0637, HCPL0638 and HCPL0639 only) Pulse Gen. ZO = 50 tf = tr = 5 ns +5V I F = 7.5 mA Dual Channel IF 1 2 Input Monitor (IF) 47 VCC .1f 7 Bypass 3 6 4 GND 5 VCC 8 1 8 RL Output (VO) 2 7 3 6 Output VO Monitoring Node 0.1F Bypass RM CL t PHL RL Input Monitoring Node CL* 4 GND I F = 3.75 mA Input (I F) +5 V 5 tPLH Output (VO ) 1.5 V 90% Output (VO ) 10% tf Test Circuit for HCPL0600, HCPL0601 and HCPL0611 tr Test Circuit for HCPL0637, HCPL0638 and HCPL0639 Fig. 20 Test Circuit and Waveforms for tPLH, tPHL, tr and tf. Pulse Generator tr = 5ns Z O = 50 Input Monitor (V E) +5V 3.0 V Input (VE ) VCC 1 8 2 7 3 6 4 5 1.5 V t EHL 7.5 mA .1f bypass t ELH Output (VO ) RL 1.5 V Output (VO ) CL GND Fig. 21 Test Circuit tEHL and tELH. (c)2006 Fairchild Semiconductor Corporation HCPL06XX Rev. 1.0.8 www.fairchildsemi.com 11 HCPL06XX -- High Speed-10 MBit/s Logic Gate Optocouplers Pulse Gen. tf = tr = 5 ns ZO = 50 HCPL06XX -- High Speed-10 MBit/s Logic Gate Optocouplers VCC IF A 1 8 2 7 3 6 +5V 0.1f bypass 350 B VFF 4 GND Output (VO) 5 VCM Pulse Gen Test Circuit for HCPL0600, HCPL0601, and HCPL0611 Peak VCM 0V CM H 5V Switching Pos. (A), IF = 0 VO VO (Min) VO (Max) Switching Pos. (B), IF = 7.5 mA VO 0.5 V CM L Fig. 22 Test Circuit Common Mode Transient Immunity (HCPL0600, HCPL0601 and HCPL0611) (c)2006 Fairchild Semiconductor Corporation HCPL06XX Rev. 1.0.8 www.fairchildsemi.com 12 Dual Channel B A +3.3V VCC 8 1 RL 2 7 3 6 VFF GND 4 0.1F Bypass Output VO Monitoring Node 5 VCM + - Pulse Generator ZO = 50 Test Circuit for HCPL0637, HCPL0638 and HCPL0639 VCM 0V Peak CM H 3.3V Switching Pos. (A), IF = 0 VO VO (Min) VO (Max) Switching Pos. (B), IF = 7.5 mA VO 0.5 V CM L Fig. 23 Test Circuit Common Mode Transient Immunity (HCPL0637, HCPL0638 and HCPL0639) (c)2006 Fairchild Semiconductor Corporation HCPL06XX Rev. 1.0.8 www.fairchildsemi.com 13 HCPL06XX -- High Speed-10 MBit/s Logic Gate Optocouplers IF HCPL06XX -- High Speed-10 MBit/s Logic Gate Optocouplers 8-Pin Small Outline 0.024 (0.61) 0.060 (1.52) 0.275 (6.99) 0.155 (3.94) 0.050 (1.27) (c)2006 Fairchild Semiconductor Corporation HCPL06XX Rev. 1.0.8 www.fairchildsemi.com 14 HCPL06XX -- High Speed-10 MBit/s Logic Gate Optocouplers Ordering Information Option No Suffix Order Entry Identifier Description HCPL0600 Shipped in tubes (50 units per tube) V* HCPL0600V IEC60747-5-2 approval R2 HCPL0600R2 Tape and Reel (2500 units per reel) HCPL0600R2V IEC60747-5-2 approval, Tape and Reel (2500 units per reel) R2V* *Available for HCPL0600, HCPL0601, HCPL0611 only. Marking Information 1 600 V 3 X YY S 4 2 6 5 Definitions 1 Fairchild logo 2 Device number 3 VDE mark indicates IEC60747-5-2 approval (Note: Only appears on parts ordered with VDE option - See order entry table) 4 One digit year code, e.g., `3' 5 Two digit work week ranging from `01' to `53' 6 Assembly package code (c)2006 Fairchild Semiconductor Corporation HCPL06XX Rev. 1.0.8 www.fairchildsemi.com 15 8.0 0.10 3.50 0.20 2.0 0.05 0.30 MAX O1.5 MIN 4.0 0.10 1.75 0.10 5.5 0.05 12.0 0.3 8.3 0.10 5.20 0.20 0.1 MAX 6.40 0.20 O1.5 0.1/-0 User Direction of Feed (c)2006 Fairchild Semiconductor Corporation HCPL06XX Rev. 1.0.8 www.fairchildsemi.com 16 HCPL06XX -- High Speed-10 MBit/s Logic Gate Optocouplers Carrier Tape Specifications HCPL06XX -- High Speed-10 MBit/s Logic Gate Optocouplers Reflow Profile Temperature (C) TP 260 240 TL 220 200 180 160 140 120 100 80 60 40 20 0 Max. Ramp-up Rate = 3C/S Max. Ramp-down Rate = 6C/S tP Tsmax tL Preheat Area Tsmin ts 120 240 360 Time 25C to Peak Time (seconds) Profile Freature Pb-Free Assembly Profile Temperature Min. (Tsmin) 150C Temperature Max. (Tsmax) 200C Time (tS) from (Tsmin to Tsmax) 60-120 seconds Ramp-up Rate (tL to tP) 3C/second max. Liquidous Temperature (TL) 217C Time (tL) Maintained Above (TL) 60-150 seconds Peak Body Package Temperature 260C +0C / -5C Time (tP) within 5C of 260C 30 seconds Ramp-down Rate (TP to TL) 6C/second max. Time 25C to Peak Temperature (c)2006 Fairchild Semiconductor Corporation HCPL06XX Rev. 1.0.8 8 minutes max. www.fairchildsemi.com 17 Auto-SPMTM Build it NowTM CorePLUSTM CorePOWERTM CROSSVOLTTM CTLTM Current Transfer LogicTM EcoSPARK(R) EfficentMaxTM EZSWITCHTM* TM* (R) (R) Fairchild (R) Fairchild Semiconductor FACT Quiet SeriesTM FACT(R) FAST(R) FastvCoreTM FETBenchTM FlashWriter(R)* FPSTM F-PFSTM FRFET(R) SM Global Power Resource Green FPSTM Green FPSTM e-SeriesTM GmaxTM GTOTM IntelliMAXTM ISOPLANARTM MegaBuckTM MICROCOUPLERTM MicroFETTM MicroPakTM MillerDriveTM MotionMaxTM Motion-SPMTM OPTOLOGIC(R) OPTOPLANAR(R) (R) PDP SPMTM Power-SPMTM PowerTrench(R) PowerXSTM Programmable Active DroopTM QFET(R) QSTM Quiet SeriesTM RapidConfigureTM TM Saving our world, 1mW/W/kW at a timeTM SmartMaxTM SMART STARTTM SPM(R) STEALTHTM SuperFETTM SuperSOTTM-3 SuperSOTTM-6 SuperSOTTM-8 SupreMOSTM SyncFETTM Sync-LockTM (R) * The Power Franchise(R) TinyBoostTM TinyBuckTM TinyLogic(R) TINYOPTOTM TinyPowerTM TinyPWMTM TinyWireTM TriFault DetectTM TRUECURRENTTM* SerDesTM UHC(R) Ultra FRFETTM UniFETTM VCXTM VisualMaxTM XSTM * Trademarks of System General Corporation, used under license by Fairchild Semiconductor. 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Customers who inadvertently purchase counterfeit parts experience many problems such as loss of brand reputation, substandard performance, failed applications, and increased cost of production and manufacturing delays. Fairchild is taking strong measures to protect ourselves and our customers from the proliferation of counterfeit parts. Fairchild strongly encourages customers to purchase Fairchild parts either directly from Fairchild or from Authorized Fairchild Distributors who are listed by country on our web page cited above. Products customers buy either from Fairchild directly or from Authorized Fairchild Distributors are genuine parts, have full traceability, meet Fairchild's quality standards for handling and storage and provide access to Fairchild's full range of up-to-date technical and product information. Fairchild and our Authorized Distributors will stand behind all warranties and will appropriately address any warranty issues that may arise. Fairchild will not provide any warranty coverage or other assistance for parts bought from Unauthorized Sources. Fairchild is committed to combat this global problem and encourage our customers to do their part in stopping this practice by buying direct or from authorized distributors. PRODUCT STATUS DEFINITIONS Definition of Terms Datasheet Identification Product Status Advance Information Formative / In Design Preliminary First Production No Identification Needed Full Production Obsolete Not In Production Definition Datasheet contains the design specifications for product development. Specifications may change in any manner without notice. Datasheet contains preliminary data; supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice to improve design. Datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice to improve the design. Datasheet contains specifications on a product that is discontinued by Fairchild Semiconductor. The datasheet is for reference information only. Rev. I40 (c)2006 Fairchild Semiconductor Corporation HCPL06XX Rev. 1.0.8 www.fairchildsemi.com 18 HCPL06XX -- High Speed-10 MBit/s Logic Gate Optocouplers TRADEMARKS The following includes registered and unregistered trademarks and service marks, owned by Fairchild Semiconductor and/or its global subsidiaries, and is not intended to be an exhaustive list of all such trademarks.