IB050Q096T70N1-00
IBC Module
5:1 Intermediate Bus Converter Module: Up to 750 W Output
IBC MODULE Rev 2.0 vicorpower.com
Page 1 of 15 4/2013 800 735.6200
Product Overview
The Intermediate Bus Converter (IBC) Module is a very efficient, low profile, isolated, fixed
ratio converter for power system applications in enterprise and optical access networks.
Rated at up to 500 W from 36 Vin and up to 750 W from 54 to 60 Vin, the IBC
conforms to an industry standard quarter-brick footprint while supplying power greatly
exceeding competitive quarter-bricks. Its leading efficiency enables full load operation
at 50°C with only 400 LFM airflow. Its small cross section facilitates unimpeded airflow
— above and below its thin body — to minimize the temperature rise of downstream
components. A baseplate option is available for alternative cooling schemes.
Input: 36 – 60 Vdc
Output: 9.6 Vdc at 48 Vin
Output current: up to 70 A
Output power: up to 750 W [A]
2,250 Vdc isolation
98.2% peak efficiency
Low profile: 0.42” height above board
Industry standard 1/4 Brick pinout
Sine Amplitude Converter
Low noise 1 MHz ZVS/ZCS
Features
Absolute Maximum Ratings
Min Max Unit Notes
Input voltage (+In to –In)
Operating 36 60 Vdc
Non-operating 75 Vdc <100 mS
Input voltage slew rate 5 V/μs
EN to –IN -0.5 20 Vdc
Output voltage (+Out to –Out) -0.5 13.8 Vdc
Output current 70 A Pout 750 W
Dielectric withstand
(input to output) 2,250 Vdc 1 min.
Temperature
Operating junction -40 125 °C Hottest Semiconductor
Storage -55 125 °C
[A] For lower power applications see 300 W model IB050E096T40N1-00 or 500 W model IB050E096T48N1-00
Applications
Enterprise networks
Optical access networks
Storage networks
Automated test equipment
Size:
2.30 x 1.45 x 0.42 in
58,4 x 36,8 x 10,6 mm
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Attribute Symbol Conditions / Notes Min Typ Max Unit
INPUT (Operating from DC input source)
Operating input voltage 36 48 60 Vdc
Non-operating input surge withstand <100 mS 75 Vdc
Operating input dV/dt 0.003 5 V/us
Undervoltage protection
Turn-on 31 36 Vdc
Turn-off 29 34 Vdc
Turn-on/Turn-off hysteresis 2 Vdc
Time constant 7 µs
Undervoltage blanking time UV blanking time is enabled after start up 50 100 200 µs
Overvoltage protection
Turn-off 65 69 Vdc
Turn-on 60 69 Vdc
Time constant 4 µs
Turn ON delay
Start up inhibit VIN reaching turn-on voltage 20 25 30 ms
to enable function operational, see Figure 6
Turn-on delay Enable to 10% VOUT; pre-applied VIN,50 µs
see Figure 7, 0 load capacitance
Output voltage rise time From 10% to 90% VOUT, 10% load, 50 µs
0 load capacitance
Restart turn-on delay See page 10 for restart after EN pin disable 250 ms
No Load power dissipation
Enabled 2.3 3.5 W
Disabled 0.12 0.15 W
Input current Low line, full load 14.1 A
Inrush current overshoot Using test circuit in Figure 21, 15% load, high line 16.9 A
Input reflected ripple current At max power; 750 mArms
Using test circuit in Figure 22; see Fig 5
Peak short circuit input current 40 A
Repetitive short circuit peak current 25 A
Internal input capacitance 17.6 μF
Internal input inductance 5 nH
Recommended external 200 nH maximum source inductance 47 470 μF
input capacitance
OUTPUT
DC Output voltage band No load, over Vin range 7.2 9.6 12.0 V
Output power [a]
36-54 VIN 0 500 W
48-54 VIN 0 670 W
54-60 VIN 0 750 W
Output current P 750 W 70 A
Output start up load of Iout max, maximum output capacitance 15 %
Effective output resistance 2.9 mΩ
Line regulation (K factor) VOUT = K • VIN @ no load 0.198 0.200 0.2020
Current share accuracy Full power operation; See Parallel Operation 10 %
on page 11; up to 3 units
All specifications valid at 48 VIN, 100% rated load and 25°C ambient, unless otherwise indicated.
SPECIFICATIONS
Electrical Characteristics
[a] Does not exceed IPC-9592 derating guidelines. At 70°C ambient, full power operation may exceed IPC-9592 guidelines, but does not exceed
component ratings, does not activate OTP and does not compromise reliability.
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Attribute Symbol Conditions / Notes Min Typ Max Unit
OUTPUT (Continued)
Efficiency
50% load See Figure 1,2 and 3 97.9 98.2 %
Full load See Figure 1,2 and 3 97.0 97.3 %
Internal output inductance 1.6 nH
Internal output capacitance 92.4 μF
Load capacitance 0 4500 μF
Output OVP set point Module will shutdown 12 Vdc
Output voltage ripple 20 MHz bandwidth, using test circuit in 60 150 mVp-p
Figure 23
Of Iout max., will not shutdown when started
Output Overload protection threshold into max Cout; and 15% load 105 150 %
Auto restart with duty cycle <10%
Over current protection time constant 1.2 ms
Short circuit current response time 1.5 µs
Switching frequency 1.0 MHz
Transient Response
Voltage overshoot 25% load step; 1A/μS; See Figures 13 & 14 100 mV
Response time See Figures 13 & 14 1 µs
VIN step 5 V step in 1 μS within Vin operating range 1.25 V
Pre-bias voltage Unit will start up 0 12 Vdc
into pre-bias voltage on output
Electrical Characteristics (Continued)
SPECIFICATIONS (CONT.)
Attribute Symbol Conditions / Notes Min Typ Max Unit
MTBF Calculated per Telcordia SR-332, 40°C 1.0 Mhrs
Service life Calculated at 30°C 7 Years
Over temperature shut down TJ; Converter will reset when over 125 130 135 °C
temperature condition is removed
Dielectric withstand Input to output 2,250 Vdc
Insulation resistance Input to output 30 MΩ
Mechanical
Weight 1.38 /39.1 oz/g
Length 2.30/58.4 in/mm
Width 1.45/36.8 in/mm
Height above customer board 0.42/10.6 in/mm
Clearance to customer board From lowest component on IBC 0.12/0.30 in/ mm
Agency approvals UL/ CSA 60950, EN60950 cTUVus
Low voltage directive CE
Altitude, operating Derate operating temp 1°C -500 10,000 Feet
per 1,000 feet above sea level
Relative humidity, Operating Non condensing 10 90 %
RoHS compliance Compatible with RoHS directive 2002/95/EC
General Characteristics
All specifications valid at 48 VIN , 100% rated load and 25°C ambient, unless otherwise indicated.
Conditions: 25°C case, 75% rated load and specified input voltage range unless otherwise specified.
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Test Description Test Detail Quantity Tested
Low Temp 3
High Temp 3
Rapid Thermal Cycling 3
5.2.3 HALT (Highly Accelerated Life testing) 6 DOF Random Vibration Test 3
Input Voltage Test 3
Output Load Test 3
Combined Stresses Test 3
5.2.4 THB (Temp. Humidity Bias) (72 hr presoak required) 1000 hrs – Continuous Bias 30
Power cycle - On 42 minutes
5.2.5 HTOB (High Temp. Operating Bias) Off 1 minute, On 1 minute, Off 1 minute, On 1 minute, Off 1 minute, 30
On 1 minute, Off 1 minute, On 1 minute, Off 10 minutes. Alternating
between maximum and minimum operating Voltage every hour.
5.2.6 TC (Temp. Cycling) 700 cycles , 30 minute dwell at each extreme – 20C minimum ramp rate. 30
5.2.7 Power Cycling Reference IPC-9592A 3
Random Vibration – Operating IEC 60068-2-64 (normal operation vibration) 3
Random Vibration Non-operating (transportation) IEC 60068-2-64 3
5.2.8 – 5.2.13 Shock and Vibration Shock Operating - normal operation shock IEC 60068-2-27 3
Free fall - IEC 60068-2-32 3
Drop Test 1 full shipping container (box) 12
5.2.14.1 Corrosion Resistance – Not required N/A
5.2.14 Other Environmental Tests 5.2.14.2 Dust Resistance – Unpotted class II GR-1274-CORE 3
5.2.14.3 SMT Attachment Reliability IPC-9701 - J-STD-002 3
5.2.14.4 Through Hole solderability – J-STD-002 5
ESD Classification Testing Sample size assumes CDM testing 12
Total Quantity 161
Environmental Qualification
SPECIFICATIONS (CONT.)
IPC-9592A, Based on Class II Category 2 the following detail is applicable. – Pre-conditioning required
Attribute Symbol Conditions / Notes Min Typ Max Unit
Enable (negative logic) Referenced to –IN
Module enable threshold 0.8 Vdc
Module enable current VEN = 0.8 V 130 200 µA
Module disable threshold 2.4 Vdc
Module disable current VEN = 2.4 V 10 µA
Disable hysteresis 500 mV
Enable pin open circuit voltage 2.5 3.0 Vdc
EN to –IN resistance Open circuit 35 kΩ
Enable (positive logic) Referenced to –IN
Module enable threshold 2.0 2.5 3.0 Vdc
Module disable threshold 1.45 Vdc
EN source current (operating) VEN = 5 V 2 mA
EN voltage (operating) 4.7 5 5.3 Vdc
Control & Interface Specifications
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Efficiency TAMB 25°C
Efficiency (%)
Iout (A)
38 V 48 V 55 V
V :
IN
94%
95%
96%
97%
98%
99%
0 14 28 42 56 70
Efficiency TAMB 55°C
Efficiency (%)
Iout (A)
38 V 48 V 55 V
V :
IN
94%
95%
96%
97%
98%
99%
94%
95%
96%
97%
98%
99%
0 14 28 42 56 70
Efficiency TAMB 70°C
Efficiency (%)
Iout (A)
38 V 48 V 55 V
V :
IN
94%
95%
96%
97%
98%
99%
94%
95%
96%
97%
98%
99%
0 14 28 42 56 70
Figure 1 — Efficiency vs. output current, 25°C ambient Figure 2 Efficiency vs. output current, 55°C ambient
Figure 3 Efficiency vs. output current, 70°C ambient Figure 4 Inrush current at high line 15% load; 5 A/div,
Max load capacitance
Figure 5 Input reflected ripple current at nominal line, full load.
See Fig 22 for setup.
Figure 6 Turn on delay time;
VIN turn on delay at nominal line, 15% load
SPECIFICATIONS (CONT.)
WAVEFORMS
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Figure 9 Overshoot at turn on at nominal line, 15% load
0 load capacitance
Figure 10 Undershoot at turn off at nominal line, 15% load
0 load capacitance
Figure 11 Load transient response; nominal line
Load step 75–100%
Figure 12 Load transient response; Full load to 75%; nominal line
SPECIFICATIONS (CONT.)
WAVEFORMS (CONT.)
Figure 7 — Turn on delay time; Enable turn on delay at nominal line,
15% load, 0 load capacitance
Figure 8 Output voltage rise time at nominal line, 10% load
0 load capacitance
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Figure 13 Load transient response; nominal line
Load step 0–25%; 10 A/div
Figure 14 Load transient response; 25–0%; nominal line
Figure 15 Input transient response;
Vin step low line to high line at full load
Figure 16 Output ripple; Nominal line, full load
SPECIFICATIONS (CONT.)
WAVEFORMS (CONT.)
Figure 17 Three module parallel array test. Vout change when one
module is disabled. Nominal Vin, Iout = 140 A
Figure 18 Three module parallel array test. Vout change with two
modules operating and a third module enabled. Nominal
Vin, Iout = 140 A
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SPECIFICATIONS (CONT.)
Output Current (A)
Output Current Derating
Ambient Air Temperature (°C)
200 LFM 400 LFM 600 LFM
70
60
50
40
30
20
10
0
25 35 45 55 65 75 85 95
80
Figure 19 Maximum output power derating vs ambient air temperature.
Transverse airflow, Board and junction temperatures <125°C.
Tested with IBC evaluation board IB050Q096T70N1-CB
Output Current (A)
Output Current Derating
Ambient Air Temperature (°C)
200 LFM 400 LFM 600 LFM
70
60
50
40
30
20
10
0
25 35 45 55 65 75 85 95
80
Figure 20 Maximum output power derating vs ambient air temperature.
Longitudinal airflow, Board and junction temperatures <12C.
Tested with IBC evaluation board IB050Q096T70N1-CB
Vsource
+
_
Current Probe
47 µF
IBC
+IN
EN
–IN
+OUT
–OUT
Load
C*
*Maximum load capacitance
Figure 21 Test circuit; inrush current overshoot
Vsource
+
_
Current Probe
470 µF IBC
+IN
EN
–IN
+OUT
–OUT
Load
10 µH
Figure 22 Test circuit; input reflected ripple current
WAVEFORMS (CONT.)
+IN
–IN
+OUT
–OUT
IBC E Load
Cy = 4700 pF
20 MHz BW
10 µF 0.1 µF
CybCyd
Cyc
Cya
a-d
Figure 23 Test circuit; output voltage ripple
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Figure 24 Thermal plot, 200 LFM, 25°C, 48 Vin, 670 W output power Figure 25 Thermal plot, 200 LFM, 25°C, 48 Vin, 670 W output power
Figure 26 Thermal plot, 400 LFM, 25°C, 48 Vin, 670 W output power Figure 27 Thermal plot, 400 LFM, 25°C, 48 Vin, 670 W output power
Figure 28 Thermal plot, 600 LFM, 25°C, 48 Vin, 670 W output power Figure 29 Thermal plot, 600 LFM, 25°C, 48 Vin, 670 W output power
SPECIFICATIONS (CONT.)
THERMAL DATA
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+In / -In – DC Voltage Input Pins
The IBC input voltage range should not be exceeded. An internal
undervoltage/overvoltage lockout function prevents operation outside of
the normal operating input range. The IBC turns on within an input voltage
window bounded by the “Input under-voltage turn-on” and “Input
over-voltage turn-off” levels, as specified. The IBC may be protected against
accidental application of a reverse input voltage by the addition of a
rectifier in series with the positive input, or a reverse rectifier in shunt with
the positive input located on the load side of the input fuse.
The connection of the IBC to its power source should be implemented with
minimal distribution inductance. If the interconnect inductance exceeds
100 nH, the input should be bypassed with a RC damper to retain low
source impedance and stable operation. With an interconnect inductance
of 200 nH, the RC damper may be 47 μF in series with 0.3 Ω. A single
electrolytic or equivalent low-Q capacitor may be used in place of the series
RC bypass.
EN - Enable/Disable
Negative Logic Option
If the EN port is left floating, the IBC output is disabled. Once this port is-
pulled lower than 0.8 Vdc with respect to –In, the output is enabled. The
EN port can be driven by a relay, opto-coupler, or open collector transistor.
Refer to Figures 6 and 7 for the typical enable / disable characteristics. This
port should not be toggled at a rate higher than 1 Hz. The EN port should
also not be driven by or pulled up to an external voltage source.
Positive Logic Option
If the EN port is left floating, the IBC output is enabled. Once this port is
pulled lower than 1.4 Vdc with respect to –In, the output is disabled. This
action can be realized by employing a relay, opto-coupler, or open collector
transistor. This port should not be toggled at a rate higher than 1 Hz.
The EN port should also not be driven by or pulled up to an external volt-
age source. The EN port can source up to 2 mA at 5 Vdc. The EN port
should never be used to sink current.
If the IBC is disabled using the EN pin, the module will attempt to restart
approximately every 250ms. Once the module has been disabled for at least
250ms, the turn on delay after the EN pin is enabled will be as shown in
Figure 7.
+Out / -Out – DC Voltage Output Pins
Total load capacitance at the output of the IBC should not exceed the
specified maximum. Owing to the wide bandwidth and low output
impedance of the IBC, low frequency bypass capacitance and significant
energy storage may be more densely and efficiently provided by adding
capacitance at the input of the IBC.
PIN / CONTROL FUNCTIONS
Top View
1
2
3
5
4
Pin Function
1 Vin+
2 Enable
3 Vin-
4 Vout-
5 Vout+
Figure 30 IBC Pin Designations
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Parallel Operation
The IBC will inherently current share when operated in an array. Arrays may
be used for higher power or redundancy in an application. Current sharing
accuracy is maximized when the source and load impedance presented to
each IBC within an array are equal. The recommended method to achieve
matched impedances is to dedicate common copper planes within the PCB
to deliver and return the current to the array, rather than rely upon traces
of varying lengths. In typical applications the current being delivered to the
load is larger than that sourced from the input, allowing narrower traces to
be utilized on the input side if necessary. The use of dedicated power
planes is, however, preferable.
One or more IBCs in an array may be disabled without adversely affecting
operation or reliability as long as the load does not exceed the rated power
of the enabled IBCs.
The IBC power train and control architecture allow bi-directional power
transfer, including reverse power processing from the IBC output to its
input. The IBC’s ability to process power in reverse improves the IBC tran-
sient response to an output load dump.
Thermal Considerations
The temperature distribution of the VI Brick can vary significantly
with its input/output operating conditions, thermal management and
environmental conditions. Although the PCB is UL rated to 130°C, it is
recommended that PCB temperatures be maintained at or below 125°C.
For maximum long term reliability, lower PCB temperatures are
recommended for continuous operation, however, short periods of
operation at 125°C will not negatively impact performance or reliability.
WARNING: Thermal and voltage hazards. The IBC can operate with surface
temperatures and operating voltages that may be hazardous to personnel.
Ensure that adequate protection is in place to avoid inadvertent contact.
Input Impedance Recommendations
To take full advantage of the IBC capabilities, the impedance presented to
its input terminals must be low from DC to approximately 5 MHz.
The source should exhibit low inductance and should have a critically
damped response. If the interconnect inductance is excessive, the IBC input
pins should be bypassed with an RC damper (e.g., 47 μF in series with
0.3 Ω) to retain low source impedance and proper operation. Given the
wide bandwidth of the IBC, the source response is generally the limiting
factor in the overall system response.
Anomalies in the response of the source will appear at the output of the
IBC multiplied by its K factor. The DC resistance of the source should be
kept as low as possible to minimize voltage deviations. This is especially
important if the IBC is operated near low or high line as the
overvoltage/undervoltage detection circuitry could be activated.
Input Fuse Recommendations
The IBC is not internally fused in order to provide flexibility in configuring
power systems. However, input line fusing of VI Bricks must always be
incorporated within the power system. A fast acting fuse should be placed
in series with the +In port. See safety agency approvals.
Application Notes
For IBC and VI Brick application notes on soldering, thermal management,
board layout, and system design visit vicorpower.com.
APPLICATIONS NOTE
Product Input Package Nominal Temperature Output Enable Pin Options
Family Voltage Output Voltage Grade Current Logic Length
IB 050 Q 096 T 70 N = Negative 1 = 0.145 -00 = Open frame
P = Positive 2 = 0.210 -BP = Baseplate
3 = 0.180
PART NUMBERING
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Figure 31 IBC Block diagram
Controller
+IN
Cr Lr
CIN
COUT
+OUT
-IN
EN
-OUT
UVLO
OVLO
Sensing
Reverse
Current
Protection
Switching
Regulator
Current
Sense
VB
Q
V2 (VCC)
Q
Resonant
Tank
Current
Transformer
FET Drive
Transformer
Secondary
FET Drive
Transformer
Secondary
FET Drive
Transformer
Secondary
FET Drive
Transformer
Primary
FET Drive
Transformer
Primary
IBC Block Diagram
Voltage
Sense
Current
Sense
Main
Transformer
SecondaryPrimary
Isolation
Barrier
IBC BLOCK DIAGRAM
The Sine Amplitude ConverterTM(SAC TM) uses a high frequency resonant tank to transfer energy from input to output. The resonant tank is formed by Cr and
leakage inductance from the main transformer, Lr, as shown in the block diagram. The controller regulates switching frequency of the FET drivers, monitors
current sensing, and provides undervoltage and overvoltage protection.
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Figure 33 IBC outline drawing - baseplate option
Figure 32 IBC Outline drawing
MECHANICAL DRAWINGS
[4.57]
.180 .417 ± .025
[10.58 ± .64]
.11
[2.9]
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Top View
Figure 34 IBC PCB recommended hole pattern
MECHANICAL DRAWINGS
IBC MODULE Rev 2.0 vicorpower.com
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Vicor’s comprehensive line of power solutions includes high density AC-DC and DC-DC modules and ac-
cessory components, fully configurable AC-DC and DC-DC power supplies, and complete custom power
systems.
Information furnished by Vicor is believed to be accurate and reliable. However, no responsibility is assumed by Vicor for its use. Vicor makes no
representations or warranties with respect to the accuracy or completeness of the contents of this publication. Vicor reserves the right to make
changes to any products, specifications, and product descriptions at any time without notice. Information published by Vicor has been checked and
is believed to be accurate at the time it was printed; however, Vicor assumes no responsibility for inaccuracies. Testing and other quality controls are
used to the extent Vicor deems necessary to support Vicor’s product warranty. Except where mandated by government requirements, testing of all
parameters of each product is not necessarily performed.
Specifications are subject to change without notice.
Vicor’s Standard Terms and Conditions
All sales are subject to Vicor’s Standard Terms and Conditions of Sale, which are available on Vicor’s webpage or upon request.
Product Warranty
In Vicor’s standard terms and conditions of sale, Vicor warrants that its products are free from non-conformity to its Standard Specifications (the “Ex-
press Limited Warranty”). This warranty is extended only to the original Buyer for the period expiring two (2) years after the date of shipment and is
not transferable.
UNLESS OTHERWISE EXPRESSLY STATED IN A WRITTEN SALES AGREEMENT SIGNED BY A DULY AUTHORIZED VICOR SIGNATORY, VICOR DISCLAIMS
ALL REPRESENTATIONS, LIABILITIES, AND WARRANTIES OF ANY KIND (WHETHER ARISING BY IMPLICATION OR BY OPERATION OF LAW) WITH RE-
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PARTICULAR PURPOSE, INFRINGEMENT OF ANY PATENT, COPYRIGHT, OR OTHER INTELLECTUAL PROPERTY RIGHT, OR ANY OTHER MATTER.
This warranty does not extend to products subjected to misuse, accident, or improper application, maintenance, or storage. Vicor shall not be liable
for collateral or consequential damage. Vicor disclaims any and all liability arising out of the application or use of any product or circuit and assumes
no liability for applications assistance or buyer product design. Buyers are responsible for their products and applications using Vicor products and
components. Prior to using or distributing any products that include Vicor components, buyers should provide adequate design, testing and operat-
ing safeguards.
Vicor will repair or replace defective products in accordance with its own best judgment. For service under this warranty, the buyer must contact
Vicor to obtain a Return Material Authorization (RMA) number and shipping instructions. Products returned without prior authorization will be re-
turned to the buyer. The buyer will pay all charges incurred in returning the product to the factory. Vicor will pay all reshipment charges if the prod-
uct was defective within the terms of this warranty.
Life Support Policy
VICOR’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS
PRIOR WRITTEN APPROVAL OF THE CHIEF EXECUTIVE OFFICER AND GENERAL COUNSEL OF VICOR CORPORATION. As used herein, life support de-
vices or systems are devices which (a) are intended for surgical implant into the body, or (b) support or sustain life and whose failure to perform
when properly used in accordance with instructions for use provided in the labeling can be reasonably expected to result in a significant injury to the
user. A critical component is any component in a life support device or system whose failure to perform can be reasonably expected to cause the
failure of the life support device or system or to affect its safety or effectiveness. Per Vicor Terms and Conditions of Sale, the user of Vicor products
and components in life support applications assumes all risks of such use and indemnifies Vicor against all liability and damages.
Intellectual Property Notice
Vicor and its subsidiaries own Intellectual Property (including issued U.S. and Foreign Patents and pending patent applications) relating to the prod-
ucts described in this data sheet. No license, whether express, implied, or arising by estoppel or otherwise, to any intellectual property rights is
granted by this document. Interested parties should contact Vicor's Intellectual Property Department.
The products described on this data sheet are protected by the following U.S. Patents Numbers:
5,945,130; 6,403,009; 6,710,257; 6,911,848; 6,930,893; 6,934,166; 6,940,013; 6,969,909; 7,038,917;
7,166,898; 7,187,263; 7,361,844; D496,906; D505,114; D506,438; D509,472; and for use under 6,975,098 and 6,984,965.
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email
Customer Service: custserv@vicorpower.com
Technical Support: apps@vicorpower.com