TIBPAL20L8-15C, TIBPAL20R4-15C, TIBPAL20R6-15C, TIBPAL20R8-15C TIBPAL20L8-20M, TIBPAL20R4-20M, TIBPAL20R6-20M, TIBPAL20R8-20M HIGH-PERFORMANCE IMPACT PAL CIRCUITS SRPS021 - D2920, JUNE 1986 - REVISED AUGUST 1989 * * * (TOP VIEW) High-Performance . . . 45 MHz Min I I I I I I I I I I I GND Reduced ICC of 180 mA Max Functionally Equivalent, but Faster Than PAL20L8, PAL20R4, PAL20R6, PAL20R8 Power-Up Clear on Registered Devices (All Register Outputs are Set Low, but Voltage Levels at the Output Pins Go High) Preload Capability on Output Registers Simplifies Testing Package Options Include Both Plastic and Ceramic Chip Carriers in Addition to Plastic and Ceramic DIPs DEVICE I INPUTS 3-STATE O OUTPUTS REGISTERED Q OUTPUTS I/O PORT S PAL20L8 14 2 0 6 PAL20R4 12 0 4 (3-state buffers) 4 PAL20R6 12 0 6 (3-state buffers) 2 PAL20R8 12 0 8 (3-state buffers) 0 description These programmable array logic devices feature high speed and functional equivalency when compared with currently available devices. These IMPACT circuits combine the latest Advanced Low-Power Schottky technology with proven titanium-tungsten fuses to provide reliable, high-performance substitutes for conventional TTL logic. Their easy programmability allows for quick design of custom functions and typically results in a more compact circuit board. In addition, chip carriers are available for futher reduction in board space. 1 24 2 23 3 22 4 21 5 20 6 19 7 18 8 17 9 16 10 15 11 14 12 13 VCC I O I/O I/O I/O I/O I/O I/O O I I TIBPAL20L8' C SUFFIX . . . FN PACKAGE M SUFFIX . . . FK PACKAGE (TOP VIEW) I I I NC VCC I O * * * TIBPAL20L8' C SUFFIX . . . JT OR NT PACKAGE M SUFFIX . . . JT OR W PACKAGE High-Performance: fmax (w/o feedback) TIBPAL20R' -15C Series . . . 45 MHz TIBPAL20R' -20M Series . . . 41.6 MHz I I I NC I I I 4 5 3 2 1 28 27 26 25 6 24 7 23 8 22 9 21 10 20 11 19 12 13 14 15 16 17 18 I/O I/O I/O NC I/O I/O I/O I I GND NC I I O * NC - No internal connection Pin assignments in operating mode Extra circuitry has been provided to allow loading of each register asynchronously to either a high or low state. This feature simplifies testing because the registers can be set to an initial state prior to executing the test sequence. The TIBPAL20' C series is characterized from 0C to 75C. The TIBPAL20' M series is characterized for operation over the full military temperature range of -55C to 125C. These devices are covered by U.S. Patent 4,410,987. IMPACT is a trademark of Texas Instruments Incorporated. PAL is a registered trademark of Advanced Micro Devices Inc. Copyright 1989, Texas Instruments Incorporated PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 1 TIBPAL20R4-15C, TIBPAL20R6-15C, TIBPAL20R8-15C TIBPAL20R4-20M, TIBPAL20R6-20M, TIBPAL20R8-20M HIGH-PERFORMANCE IMPACT PAL CIRCUITS SRPS021 - D2920, JUNE 1986 - REVISED AUGUST 1989 (TOP VIEW) (TOP VIEW) 24 23 22 21 20 19 18 17 16 15 14 13 VCC I I/O I/O Q Q Q Q I/O I/O I OE I I I NC I I I 4 3 2 1 28 27 26 5 25 6 24 7 23 8 22 9 21 10 20 11 19 12 13 14 15 16 17 18 (TOP VIEW) (TOP VIEW) VCC I I/O Q Q Q Q Q Q I/O I OE I I I NC I I I 4 3 2 1 28 27 26 5 25 6 24 7 23 8 22 9 21 10 20 11 19 12 13 14 15 16 17 18 (TOP VIEW) (TOP VIEW) VCC I Q Q Q Q Q Q Q Q I OE I I I NC I I I 4 3 2 1 28 27 26 5 25 6 24 7 23 8 22 9 21 10 20 11 19 12 13 14 15 16 17 18 NC Pin assignments in operating mode 2 POST OFFICE BOX 655303 OE I Q 24 23 22 21 20 19 18 17 16 15 14 13 I I GND NC 1 2 3 4 5 6 7 8 9 10 11 12 VCC I Q TIBPAL20R8' C SUFFIX . . . FN PACKAGE M SUFFIX . . . FK PACKAGE I I CLK NC TIBPAL20R8' C SUFFIX . . . JT OR NT PACKAGE M SUFFIX . . . JT OR W PACKAGE CLK I I I I I I I I I I GND - No internal connection * DALLAS, TEXAS 75265 Q Q Q NC Q Q Q OE I I/O 24 23 22 21 20 19 18 17 16 15 14 13 I I GND NC 1 2 3 4 5 6 7 8 9 10 11 12 VCC I I/O TIBPAL20R6' C SUFFIX . . . FN PACKAGE M SUFFIX . . . FK PACKAGE I I CLK NC TIBPAL20R6' C SUFFIX . . . JT OR NT PACKAGE M SUFFIX . . . JT OR W PACKAGE CLK I I I I I I I I I I GND I/O Q Q NC Q Q I/O OE I I/O 1 2 3 4 5 6 7 8 9 10 11 12 I I GND NC CLK I I I I I I I I I I GND VCC I I/O TIBPAL20R4' C SUFFIX . . . FN PACKAGE M SUFFIX . . . FK PACKAGE I I CLK NC TIBPAL20R4' C SUFFIX . . . JT OR NT PACKAGE M SUFFIX . . . JT OR W PACKAGE Q Q Q NC Q Q Q TIBPAL20L8-15C, TIBPAL20R4-15C TIBPAL20L8-20M, TIBPAL20R4-20M HIGH-PERFORMANCE IMPACT PAL CIRCUITS SRPS021 - D2920, JUNE 1986 - REVISED AUGUST 1989 functional block diagrams (positive logic) TIBPAL20L8' & 40 X 64 20 x I 14 20 6 20 EN 1 7 O 7 O 7 I/O 7 I/O 7 I/O 7 I/O 7 I/O 7 I/O 6 TIBPAL20R4' OE CLK EN 2 C1 & 40 X 64 20 x I 12 1 8 I=0 2 Q 1D 8 Q 8 Q 8 Q 20 4 4 20 EN 1 7 I/O 7 I/O 7 I/O 7 I/O 4 4 denotes fused inputs POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 3 TIBPAL20R6-15C, TIBPAL20R8-15C TIBPAL20R6-20M, TIBPAL20R8-20M HIGH-PERFORMANCE IMPACT PAL CIRCUITS SRPS021 - D2920, JUNE 1986 - REVISED AUGUST 1989 functional block diagrams (positive logic) TIBPAL20R6' OE CLK EN 2 C1 & 40 X 64 20 x I 12 1 8 I=0 2 Q 1D 8 Q 8 Q 8 Q 8 Q 8 Q 20 6 2 20 EN 1 7 I/O I/O 7 2 6 TIBPAL20R8' OE CLK EN 2 C1 & 40 X 64 20 x I 12 8 1 I=0 2 8 Q 8 Q 8 Q 8 Q 8 Q 8 Q 8 Q 20 8 20 8 denotes fused inputs 4 Q 1D POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 TIBPAL20L8-15C TIBPAL20L8-20M HIGH-PERFORMANCE IMPACT PAL CIRCUITS SRPS021 - D2920, JUNE 1986 - REVISED AUGUST 1989 logic diagram (positive logic) I 1 Increment 0 I 4 8 12 16 20 24 28 32 2 36 39 23 I First Fuse Numbers I I I I I I I I I 3 4 5 6 7 8 9 10 0 40 80 120 160 200 240 280 22 320 360 400 440 480 520 560 600 21 640 680 720 760 800 840 880 920 20 960 1000 1040 1080 1120 1160 1200 1240 19 1280 1320 1360 1400 1440 1480 1520 1560 18 1600 1640 1680 1720 1760 1800 1840 1880 17 1920 1960 2000 2040 2080 2120 2160 2200 16 2240 2280 2320 2360 2400 2440 2480 2520 15 14 11 13 O I/O I/O I/O I/O I/O I/O O I I Fuse number = First fuse number + Increment Pin numbers shown are for JT, NT, and W packages. POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 5 TIBPAL20R4-15C TIBPAL20R4-20M HIGH-PERFORMANCE IMPACT PAL CIRCUITS SRPS021 - D2920, JUNE 1986 - REVISED AUGUST 1989 logic diagram (positive logic) CLK 1 Increment 0 I 4 8 12 16 20 24 28 32 36 39 2 23 I First Fuse Numbers I I I I I I I I I 3 4 5 6 7 8 9 10 0 40 80 120 160 200 240 280 22 320 360 400 440 480 520 560 600 21 640 680 720 760 800 840 880 920 I=0 1D 960 1000 1040 1080 1120 1160 1200 1240 I=0 1D 1280 1320 1360 1400 1440 1480 1520 1560 I=0 1D 1600 1640 1680 1720 1760 1800 1840 1880 I=0 1D I/O Q C1 19 Q C1 18 Q C1 17 Q C1 1920 1960 2000 2040 2080 2120 2160 2200 16 2240 2280 2320 2360 2400 2440 2480 2520 15 11 14 13 Fuse number = First fuse number + Increment Pin numbers shown are for JT, NT, and W packages. 6 20 I/O POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 I/O I/O I OE TIBPAL20R6-15C TIBPAL20R6-20M HIGH-PERFORMANCE IMPACT PAL CIRCUITS SRPS021 - D2920, JUNE 1986 - REVISED AUGUST 1989 logic diagram (positive logic) CLK 1 Increment 0 I 4 8 12 16 20 24 28 32 36 39 2 23 I First Fuse Numbers I I I I I I I I I 3 4 5 6 7 8 9 10 0 40 80 120 160 200 240 280 22 320 360 400 440 480 520 560 600 I=0 1D 640 680 720 760 800 840 880 920 I=0 1D 960 1000 1040 1080 1120 1160 1200 1240 I=0 1D 1280 1320 1360 1400 1440 1480 1520 1560 I=0 1D 1600 1640 1680 1720 1760 1800 1840 1880 I=0 1D 1920 1960 2000 2040 2080 2120 2160 2200 I=0 1D 21 I/O Q C1 20 Q C1 19 Q C1 18 Q C1 17 Q C1 16 Q C1 2240 2280 2320 2360 2400 2440 2480 2520 15 11 14 13 Fuse number = First fuse number + Increment Pin numbers shown are for JT, NT, and W packages. POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 I/O I OE 7 TIBPAL20R8-15C TIBPAL20R8-20M HIGH-PERFORMANCE IMPACT PAL CIRCUITS SRPS021 - D2920, JUNE 1986 - REVISED AUGUST 1989 logic diagram (positive logic) CLK 1 Increment 0 I 4 8 12 16 20 24 28 32 36 39 2 23 I First Fuse Numbers I I I I I I I I I 3 4 5 6 7 8 9 10 0 40 80 120 160 200 240 280 I=0 1D 320 360 400 440 480 520 560 600 I=0 1D 640 680 720 760 800 840 880 920 I=0 1D 960 1000 1040 1080 1120 1160 1200 1240 I=0 1D 1280 1320 1360 1400 1440 1480 1520 1560 I=0 1D 1600 1640 1680 1720 1760 1800 1840 1880 I=0 1D 1920 1960 2000 2040 2080 2120 2160 2200 I=0 1D 2240 2280 2320 2360 2400 2440 2480 2520 I=0 1D Q C1 21 Q C1 20 Q C1 19 Q C1 18 Q C1 17 Q C1 16 Q C1 15 Q C1 11 14 13 Fuse number = First fuse number + Increment Pin numbers shown are for JT, NT, and W packages. 8 22 POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 I OE TIBPAL20L8-15C, TIBPAL20R4-15C, TIBPAL20R6-15C, TIBPAL20R8-15C HIGH-PERFORMANCE IMPACT PAL CIRCUITS SRPS021 - D2920, JUNE 1986 - REVISED AUGUST 1989 absolute maximum ratings over operating free-air temperature range (unless otherwise noted) Supply voltage, VCC (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V Input voltage (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.5 V Voltage applied to disabled output (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.5 V Operating free-air temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0C to 75C Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . - 65C to 150C NOTE 1: These ratings apply except for programming pins during a programming cycle. recommended operating conditions MIN NOM MAX UNIT 4.75 5 5.25 V 5.5 V VCC VIH Supply voltage VIL IOH Low-level input voltage High-level output current - 3.2 mA IOL fclock Low-level output current 24 mA 45 MHz High-level input voltage 2 0.8 Clock frequency 0 tw Pulse duration, clock tsu th Setup time, input or feedback before clock High 10 Low 12 Hold time, input or feedback after clock 0 0 POST OFFICE BOX 655303 ns 15 TA Operating free-air temperature fclock, tw, tsu, and th do not apply for TIBPAL20L8'. * DALLAS, TEXAS 75265 V ns ns 25 75 C 9 TIBPAL20L8-15C, TIBPAL20R4-15C, TIBPAL20R6-15C, TIBPAL20R8-15C HIGH-PERFORMANCE IMPACT PAL CIRCUITS SRPS021 - D2920, JUNE 1986 - REVISED AUGUST 1989 electrical characteristics over recommended operating free-air temperature range PARAMETER TEST CONDITIONS VIK VOH VOL O, Q outputs IOZH VCC = 4.75 V, VCC = 4.75 V, II = - 18 mA IOH = - 3.2 mA VCC = 4.75 V, IOL = 24 mA VCC = 5.25 V, VO = 2.7 V VCC = 5.25 V, VO = 0.4 V VCC = 5.25 V, VCC = 5.25 V, VI = 5.5 V VI = 2.7 V IOS VCC = 5.25 V, VCC = 5.25 V, VI = 0.4 V VO = 0.5 V ICC VCC = 5.25 V, Outputs open, VI = 0, OE at VIH I/O ports O, Q outputs IOZL I/O ports II IIH IIL MIN TYP MAX UNIT -0.8 - 1.5 V 2.4 V 0.3 0.5 20 100 - 20 - 250 0.1 - 30 V A A mA 25 A - 0.25 mA -70 - 130 mA 120 180 mA switching characteristics over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) FROM (INPUT) PARAMETER fmax TO (OUTPUT) MIN TYP With feedback 37 40 Without feedback 45 50 TEST CONDITION UNIT MHz tpd tpd I, I/O O, I/O R1 = 200 , 12 15 ns CLK Q R2 = 390 , 8 12 ns ten tdis OE Q See Figure 3 10 15 ns OE Q 8 12 ns I, I/O O, I/O 12 18 ns I, I/O O, I/O 12 15 ns ten tdis All typical values are at VCC = 5 V, TA = 25C. For I/O ports, the parameters IIH and IIL include the off-state output current. Not more than one output should be shorted at a time, and the duration of the short-circuit should not exceed one second. 1 , , f max(with feedback) 1 t su t (CLK to Q) f max(without feedback) t w high t w low pd fmax does not apply for TIBPAL20L8,. + 10 MAX + ) POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 ) TIBPAL20L8-20M, TIBPAL20R4-20M, TIBPAL20R6-20M, TIBPAL20R8-20M HIGH-PERFORMANCE IMPACT PAL CIRCUITS SRPS021 - D2920, JUNE 1986 - REVISED AUGUST 1989 absolute maximum ratings over operating free-air temperature range (unless otherwise noted) Supply voltage, VCC (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V Input voltage (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.5 V Voltage applied to disabled output (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.5 V Operating free-air temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . - 55C to 125C Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . - 65C to 150C NOTE 1: These ratings apply except for programming pins during a programming cycle. recommended operating conditions MIN NOM MAX 4.5 5 5.5 UNIT V 5.5 V VCC VIH Supply voltage VIL IOH Low-level input voltage 0.8 V High-level output current -2 mA IOL fclock Low-level output current 12 mA 41.6 MHz High-level input voltage 2 Clock frequency 0 tw Pulse duration, clock tsu th Setup time, input or feedback before clock High 12 Low 12 20 Hold time, input or feedback after clock 0 TA Operating free-air temperature fclock, tw, tsu, and th do not apply for TIBPAL20L8'. -55 POST OFFICE BOX 655303 ns * DALLAS, TEXAS 75265 ns ns 25 125 C 11 TIBPAL20L8-20M, TIBPAL20R4-20M, TIBPAL20R6-20M, TIBPAL20R8-20M HIGH-PERFORMANCE IMPACT PAL CIRCUITS SRPS021 - D2920, JUNE 1986 - REVISED AUGUST 1989 electrical characteristics over recommended operating free-air temperature range PARAMETER TEST CONDITIONS VIK VOH VCC = 4.5 V, VCC = 4.5 V, II = - 18 mA IOH = - 2 mA VOL IOZH VCC = 4.5 V, VCC = 5.5 V, IOL = 12 mA VO = 2.7 V VCC = 5.5 V, VO = 0.4 V VCC = 5.5 V, VI = 5.5 V O, Q outputs IOZL I/O ports II I/O ports IIH VCC = 5.5 V, VI = 2.7 V IIL IOS VCC = 5.5 V, VCC = 5.5 V, VI = 0.4 V VO = 0.5 V ICC VCC = 5.5 V, Outputs open, VI = 0, OE = VIH All others MIN 2.4 TYP MAX UNIT -0.8 - 1.5 V 3.2 0.3 V 0.5 V 100 A - 20 A - 250 1 mA 100 A 25 - 30 - 0.25 mA -70 - 250 mA 120 180 mA switching characteristics over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) FROM (INPUT) PARAMETER fmax tpd tpd ten tdis ten tdis TO (OUTPUT) MIN TYP With feedback 28.5 40 Without feedback 41.6 50 TEST CONDITION MAX UNIT MHz I, I/O O, I/O R1 = 390 , 12 20 ns CLK Q R2 = 750 , 8 15 ns OE Q See Figure 3 10 20 ns OE Q 8 20 ns I, I/O O, I/O 12 25 ns I, I/O O, I/O 12 20 ns All typical values are at VCC = 5 V, TA = 25C. For I/O ports, the parameters IIH and IIL include the off-state output current. Not more than one output should be shorted at a time, and the duration of the short-circuit should not exceed one second. Set VO at 0.5 V to avoid test equipment ground degradation. 1 , , f max(with feedback) 1 t su t (CLK to Q) f max(without feedback) t w high t w low pd fmax does not apply for TIBPAL20L8,. + 12 + ) POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 ) TIBPAL20L8-15C, TIBPAL20R4-15C, TIBPAL20R6-15C, TIBPAL20R8-15C TIBPAL20L8-20M, TIBPAL20R4-20M, TIBPAL20R6-20M, TIBPAL20R8-20M HIGH-PERFORMANCE IMPACT PAL CIRCUITS SRPS021 - D2920, JUNE 1986 - REVISED AUGUST 1989 programming information Texas Instruments programmable logic devices can be programmed using widely available software and inexpensive device programmers. Complete programming specifications, algorithms, and the latest information on hardware, software, and firmware are available upon request. Information on programmers capable of programming Texas Instruments programmable logic is also available, upon request, from the nearest TI field sales office, local authorized TI distributor, or by calling Texas Instruments at (214) 997-5666. preload procedure for registered outputs (see Figure 1 and Notes 2 and 3) The output registers can be preloaded to any desired state during device testing. This permits any state to be tested without having to step through the entire state-machine sequence. Each register is preloaded individually by following the steps given below. Step 1. Step 2. Step 3. Step 4. With VCC at 5 volts and Pin 1 at VIL, raise Pin 13 to VIHH. Apply either VIL or VIH to the output corresponding to the register to be preloaded. Pulse Pin 1, clocking in preload data. Remove output voltage, then lower Pin 13 to VIL. Preload can be verified by observing the voltage level at the output pin. VIHH Pin 13 VIL td tsu tw td VIH Pin 1 VIL VIH Registered I/O Input VOH Output VIL VOL Figure 1. Preload Waveforms NOTES: 2. Pin numbers shown are for JT, NT, and W packages only. If chip carrier socket adapter is not used, pin numbers must be changed accordingly. 3. td = tsu = th = 100 ns to 1000 ns VIHH = 10.25 V to 10.75 v POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 13 TIBPAL20L8-15C, TIBPAL20R4-15C, TIBPAL20R6-15C, TIBPAL20R8-15C TIBPAL20L8-20M, TIBPAL20R4-20M, TIBPAL20R6-20M, TIBPAL20R8-20M HIGH-PERFORMANCE IMPACT PAL CIRCUITS SRPS021 - D2920, JUNE 1986 - REVISED AUGUST 1989 power-up reset (see Figure 2) Following power up, all registers are reset to zero. This feature provides extra flexibility to the system designer and is especially valuable in simplifying state-machine initialization. To ensure a valid power-up reset, it is important that the rise of VCC be monotonic. Following power-up reset, a low-to-high clock transition must not occur until all applicable input and feedback setup times are met. VCC 5V 4V tpd (600 ns TYP, 1000 ns MAX) VOH Active Low Registered Output 1.5 V VOL tsu VIH CLK 1.5 V 1.5 V VIL tw This is the power-up reset time and applies to registered outputs only. The values shown are from characterization data. This is the setup time for input or feedback. Figure 2. Power-Up Reset Waveforms 14 POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 TIBPAL20L8-15C, TIBPAL20R4-15C, TIBPAL20R6-15C, TIBPAL20R8-15C TIBPAL20L8-20M, TIBPAL20R4-20M, TIBPAL20R6-20M, TIBPAL20R8-20M HIGH-PERFORMANCE IMPACT PAL CIRCUITS SRPS021 - D2920, JUNE 1986 - REVISED AUGUST 1989 PARAMETER MEASUREMENT INFORMATION 5V S1 R1 From Output Under Test Test Point CL (see Note A) R2 LOAD CIRCUIT FOR 3-STATE OUTPUTS 1.5 V 1.5 V tw th (3.5 V) [3 V] Data Input 1.5 V (3.5 V) [3 V] (0.3 V) [0] In-Phase Output VOH 1.5 V VOL tpd tpd 1.5 V VOH 1.5 V VOL (3.5 V) [3 V] 1.5 V Waveform 1 S1 Closed (see Note B) tdis 1.5 V 3.3 V VOL +0.5 V VOL tdis ten Waveform 2 S1 Open (see Note B) VOLTAGE WAVEFORMS PROPAGATION DELAY TIMES 1.5 V (0.3 V) [0] ten tpd 1.5 V 1.5 V (0.3 V) [0] Output Control (low-level enabling) 1.5 V tpd 1.5 V VOLTAGE WAVEFORMS PULSE DURATIONS VOLTAGE WAVEFORMS SETUP AND HOLD TIMES 1.5 V (3.5 V) [3 V] Low-Level Pulse 1.5 V (0.3 V) [0] Input 1.5 V (0.3 V) [0] (0.3 V) [0] tsu Out-of-Phase Output (see Note D) (3.5 V) [3 V] High-Level Pulse (3.5 V) [3 V] Timing Input VOH 1.5 V VOH -0.5 V 0V VOLTAGE WAVEFORMS ENABLE AND DISABLE TIMES, 3-STATE OUTPUTS NOTES: A. CL includes probe and jig capacitance and is 50 pF for tpd and ten, 5 pF for tdis. B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control. C. All input pulses have the following characteristics: For C suffix, use the voltage levels indicated in parentheses ( ). PRR 1 MHz, tr = tf 2 ns, duty cycle = 50%. For M suffix, use the voltage levels indicated in brackets [ ]. PRR 10 MHz, tr and tf 2 ns, duty cycle = 50%. D. When measuring propagation delay times of 3-state outputs, switch S1 is closed. E. Equivalent loads may be used for testing. Figure 3. Load Circuit and Voltage Waveforms POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 15 TI Authorized TI North American Sales North American Offices Distributors ALABAMA: Huntsville: (205) 837-7530 ARIZONA: Phoenix: (602) 995-1007 CALIFORNIA: Irvine: (714) 660-1200 San Diego: (619) 278-9600 Santa Clara: (408) 980-9000 Woodland Hills: (818) 704-8100 COLORADO: Aurora: (303) 368-8000 CONNECTICUT: Wallingford: (203) 269-0074 FLORIDA: Altamonte Springs: (407) 260-2116 Fort Lauderdale: (305) 973-8502 Tampa: (813) 885-7588 GEORGIA: Norcross: (404) 662-7967 ILLINOIS: Arlington Heights: (708) 640-3000 INDIANA: Carmel: (317) 573-6400 Fort Wayne: (219) 489-4697 KANSAS: Overland Park: (913) 451-4511 MARYLAND: Columbia: (410) 964-2003 MASSACHUSETTS: Waltham: (617) 895-9100 MICHIGAN: Farmington Hills: (313) 553-1581 MINNESOTA: Eden Prairie: (612) 828-9300 MISSOURI: St. Louis: (314) 821-8400 NEW JERSEY: Iselin: (908) 750-1050 NEW MEXICO: Albuquerque: (505) 345-2555 NEW YORK: East Syracuse: (315) 463-9291 Fishkill: (914) 897-2900 Melville: (516) 454-6600 Pittsford: (716) 385-6770 NORTH CAROLINA: Charlotte: (704) 527-0930 Raleigh: (919) 876-2725 OHIO: Beachwood: (216) 765-7258 Beavercreek: (513) 427-6200 OREGON: Beaverton: (503) 643-6758 PENNSYLVANIA: Blue Bell: (215) 825-9500 PUERTO RICO: Hato Rey: (809) 753-8700 TEXAS: Austin: (512) 250-6769 Dallas: (214) 917-1264 Houston: (713) 778-6592 Midland: (915) 561-7137 UTAH: Salt Lake CIty: (801) 466-8972 WISCONSIN: Waukesha: (414) 798-1001 CANADA: Nepean: (613) 726-1970 Richmond Hill: (416) 884-9181 St. Laurent: (514) 335-8392 TI Regional Technology Centers CALIFORNIA: Irvine: (714) 660-8140 Santa Clara: (408) 748-2222 GEORGIA: Norcross: (404) 662-7945 ILLINOIS: Arlington Heights: (708) 640-2909 INDIANA: Indianapolis: (317) 573-6400 MASSACHUSETTS: Waltham: (617) 895-9196 MEXICO: Mexico City: 491-70834 MINNESOTA: Minneapolis: (612) 828-9300 TEXAS: Dallas: (214) 917-3881 CANADA: Nepean: (613) 726-1970 Alliance Electronics, Inc. (military product only) Almac/Arrow Anthem Electronics Arrow/Schweber Future Electronics (Canada) GRS Electronics Co., Inc. Hall-Mark Electronics Marshall Industries Newark Electronics Rochester Electronics, Inc. (obsolete product only (508) 462-9332) Wyle Laboratories Zeus Components TI Distributors ALABAMA: Arrow/Schweber (205) 837-6955; Hall-Mark (205) 837-8700; Marshall (205) 881-9235. ARIZONA: Anthem (602) 966-6600; Arrow/Schweber (602) 437-0750; Hall-Mark (602) 431-0030; Marshall (602) 496-0290; Wyle (602) 437-2088. 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MASSACHUSETTS: Anthem (508) 657-5170; Arrow/Schweber (508) 658-0900; Hall-Mark (508) 667-0902; Marshall (508) 658-0810; Wyle (617) 272-7300; Zeus (617) 246-8200. MICHIGAN: Detroit: Arrow/Schweber (313) 462-2290; Hall-Mark (313) 416-5800; Marshall (313) 525-5850; Newark (313) 967-0600. MINNESOTA: Anthem (612) 944-5454; Arrow/Schweber (612) 941-5280; Hall-Mark (612) 881-2600; Marshall (612) 559-2211. MISSOURI: Arrow/Schweber (314) 567-6888; Hall-Mark (314) 291-5350; Marshall (314) 291-4650. NEW JERSEY: Anthem (201) 227-7960; Arrow/Schweber (201) 227-7880, (609) 596-8000; Hall-Mark (201) 515-3000, (609) 235-1900; Marshall (201) 882-0320, (609) 234-9100. NEW MEXICO: Alliance (505) 292-3360. NEW YORK: Long Island: Anthem (516) 864-6600; Arrow/Schweber (516) 231-1000; Hall-Mark (516) 737-0600; Marshall (516) 273-2424; Zeus (914) 937-7400. Rochester: Arrow/Schweber (716) 427-0300; Hall-Mark (716) 425-3300; Marshall (716) 235-7620. Syracuse: Marshall (607) 785-2345. NORTH CAROLINA: Arrow/Schweber (919) 876-3132; Hall-Mark (919) 872-0712; Marshall (919) 878-9882. OHIO: Cleveland: Arrow/Schweber (216) 248-3990; Hall-Mark (216) 349-4632; Marshall (216) 248-1788. Columbus: Hall-Mark (614) 888-3313. Dayton: Arrow/Schweber (513) 435-5563; Marshall (513) 898-4480; Zeus (513) 293-6162. OKLAHOMA: Arrow/Schweber (918) 252-7537; Hall-Mark (918) 254-6110. OREGON: Almac/Arrow (503) 629-8090; Anthem (503) 643-1114; Marshall (503) 644-5050; Wyle (503) 643-7900. PENNSYLVANIA: Anthem (215) 443-5150; Arrow/Schweber (215) 928-1800; GRS (215) 922-7037; (609) 964-8560; Marshall (412) 788-0441. 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Toronto: Arrow/Schweber (416) 670-7769; Future (416) 612-9200; Marshall (416) 458-8046. Vancouver: Arrow/Schweber (604) 421-2333; Future (604) 294-1166. TI Die Processors Chip Supply Elmo Semiconductor Minco Technology Labs (407) 298-7100 (818) 768-7400 (512) 834-2022 Customer Response Center TOLL FREE: OUTSIDE USA: (800) 336-5236 (214) 995-6611 (8:00 a.m. - 5:00 p.m. CST) D0892 1992 Texas Instruments Incorporated SRPS021 IMPORTANT NOTICE Texas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue any product or service without notice, and advise customers to obtain the latest version of relevant information to verify, before placing orders, that information being relied on is current and complete. All products are sold subject to the terms and conditions of sale supplied at the time of order acknowledgement, including those pertaining to warranty, patent infringement, and limitation of liability. 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Copyright 1998, Texas Instruments Incorporated 1 of 3 Products Development Tools Applications Search >> Semiconductor Home > Products > Digital Logic > Programmable Logic > PALS > TIBPAL20L8-20M, HIGH-PERFORMANCE IMPACT(TM) PAL(R) CIRCUITS Device Status: Active > Description > Features > Datasheets > Pricing/Samples/Availability > Application Notes > Related Documents Description These programmable array logic devices feature high speed and functional equivalency when compared with currently available devices. These IMPACTTM circuits combine the latest Advanced Low-Power Schottky technology with proven titanium-tungsten fuses to provide reliable, high-performance substitutes for conventional TTL logic. Their easy programmability allows for quick design of custom functions and typically results in a more compact circuit board. In addition, chip carriers are available for further reduction in board space. Extra circuitry has been provided to allow loading of each register asynchronously to either a high or low state. This feature simplifies testing because the registers can be set to an initial state prior to executing the test sequence. The TIBPAL20' C series is characterized from 0C to 75C. The TIBPAL20' M series is characterized for operation over the full military temperature range of -55C to 125C. Features l l l l l High-Performance: fmax (w/o feedback) TIBPAL20R' -15C Series . . . 45 MHz TIBPAL20R' -20M Series . . . 41.6 MHz High-Performance . . . 45 MHz Min Reduced ICC of 180 mA Max Functionally Equivalent, but Faster Than PAL20L8, PAL20R4, PAL20R6, PAL20R8 Power-Up Clear on Registered Devices (All Register Outputs are Set Low, but Voltage Levels at the Output Pins Go High) 2 of 3 l l Preload Capability on Output Registers Simplifies Testing Package Options Include Both Plastic and Ceramic Chip Carriers in Addition to Plastic and Ceramic DIPs I/O I 3-STATE REGISTERED DEVICE PORT INPUTS O OUTPUTS Q OUTPUTS S PAL20L8 14 2 0 6 PAL20R4 12 0 4 (3-state buffers) 4 PAL20R6 12 0 6 (3-state buffers) 2 PAL20R8 12 0 8 (3-state buffers) 0 These devices are covered by U.S Patent 4,410,987. IMPACT is a trademark of Texas Instruments Incorporated. PAL is a registered trademark of Advanced Micro Devices Inc. To view the following documents, Acrobat Reader 3.x is required. To download a document to your hard drive, right-click on the link and choose 'Save'. Datasheets Full datasheet in Acrobat PDF: srps021.pdf (184 KB) Full datasheet in Zipped PostScript: srps021.psz (191 KB) Pricing/Samples/Availability Orderable Device Package Pins Temp (C) Status Price/unit USD (100999) Pack Qty DSCC Number Availability / Samples 5962-87671013A FD 28 -55 TO 125 ACTIVE 16.87 1 Check stock or order 8412901KA W 24 -55 TO 125 ACTIVE 16.87 1 Check stock or order 8412901LA JT 24 -55 TO 125 ACTIVE 9.77 1 Check stock or order JM38510/50501BLA JT 24 -55 TO 125 ACTIVE 41.75 1 Check stock or order TIBPAL20L820MFKB FK 28 -55 TO 125 ACTIVE 15.03 1 TIBPAL20L8-20MJT JT 24 -55 TO 125 ACTIVE 11.36 1 TIBPAL20L820MJTB JT 24 -55 TO 125 ACTIVE 13.36 1 59628767101LA Check stock or order TIBPAL20L820MWB W 24 -55 TO 125 ACTIVE 32.57 1 59628767101KA Check stock or order Application Reports 8412901XA Check stock or order Check stock or order 3 of 3 View Application Reports for Digital Logic l TEST CONSIDERATIONS FOR PLD'S (SRPA001 - Updated: 12/02/1999) Related Documents l l l DOCUMENTATION RULES (SAP) AND ORDERING INFORMATION (SZZU001B, 4 KB - Updated: 05/06/1999) LOGIC SELECTION GUIDE SECOND HALF 2000 (SDYU001N, 5035 KB - Updated: 04/17/2000) MORE POWER IN LESS SPACE - TECHNICAL ARTICLE (SCAU001A, 850 KB - Updated: 03/01/1996) Table Data Updated on: 8/10/2000 (c) Copyright 2000 Texas Instruments Incorporated. All rights reserved. Trademarks | Privacy Policy 1 of 3 Products Development Tools Applications Search >> Semiconductor Home > Products > Digital Logic > Programmable Logic > PALS > TIBPAL20R4-20M, HIGH-PERFORMANCE IMPACT(TM) PAL(R) CIRCUITS Device Status: Active > Description > Features > Datasheets > Pricing/Samples/Availability > Application Notes > Related Documents Description These programmable array logic devices feature high speed and functional equivalency when compared with currently available devices. These IMPACTTM circuits combine the latest Advanced Low-Power Schottky technology with proven titanium-tungsten fuses to provide reliable, high-performance substitutes for conventional TTL logic. Their easy programmability allows for quick design of custom functions and typically results in a more compact circuit board. In addition, chip carriers are available for further reduction in board space. Extra circuitry has been provided to allow loading of each register asynchronously to either a high or low state. This feature simplifies testing because the registers can be set to an initial state prior to executing the test sequence. The TIBPAL20' C series is characterized from 0C to 75C. The TIBPAL20' M series is characterized for operation over the full military temperature range of -55C to 125C. Features l l l l l High-Performance: fmax (w/o feedback) TIBPAL20R' -15C Series . . . 45 MHz TIBPAL20R' -20M Series . . . 41.6 MHz High-Performance . . . 45 MHz Min Reduced ICC of 180 mA Max Functionally Equivalent, but Faster Than PAL20L8, PAL20R4, PAL20R6, PAL20R8 Power-Up Clear on Registered Devices (All Register Outputs are Set Low, but Voltage Levels at the Output Pins Go High) 2 of 3 l l Preload Capability on Output Registers Simplifies Testing Package Options Include Both Plastic and Ceramic Chip Carriers in Addition to Plastic and Ceramic DIPs I/O I 3-STATE REGISTERED DEVICE PORT INPUTS O OUTPUTS Q OUTPUTS S PAL20L8 14 2 0 6 PAL20R4 12 0 4 (3-state buffers) 4 PAL20R6 12 0 6 (3-state buffers) 2 PAL20R8 12 0 8 (3-state buffers) 0 These devices are covered by U.S Patent 4,410,987. IMPACT is a trademark of Texas Instruments Incorporated. PAL is a registered trademark of Advanced Micro Devices Inc. To view the following documents, Acrobat Reader 3.x is required. To download a document to your hard drive, right-click on the link and choose 'Save'. Datasheets Full datasheet in Acrobat PDF: srps021.pdf (184 KB) Full datasheet in Zipped PostScript: srps021.psz (191 KB) Pricing/Samples/Availability Orderable Device Package Pins Temp (C) Status Price/unit USD (100999) Pack Qty DSCC Number Availability / Samples 5962-87671043A FD 28 -55 TO 125 ACTIVE 16.87 1 Check stock or order 8412904KA W 24 -55 TO 125 ACTIVE 16.87 1 Check stock or order 8412904LA JT 24 -55 TO 125 ACTIVE 9.77 1 Check stock or order 8412904XA FK 28 -55 TO 125 ACTIVE 16.87 1 Check stock or order JM38510/50504BLA JT 24 -55 TO 125 ACTIVE 41.75 1 Check stock or order TIBPAL20R420MFKB FK 28 -55 TO 125 ACTIVE 16.87 1 TIBPAL20R4-20MJT JT 24 -55 TO 125 ACTIVE 10.22 1 TIBPAL20R420MJTB JT 24 -55 TO 125 ACTIVE 12.02 1 59628767104LA Check stock or order TIBPAL20R420MWB W 24 -55 TO 125 ACTIVE 16.87 1 59628767104KA Check stock or order 8412904XA Check stock or order Check stock or order 3 of 3 Application Reports View Application Reports for Digital Logic l TEST CONSIDERATIONS FOR PLD'S (SRPA001 - Updated: 12/02/1999) Related Documents l l l DOCUMENTATION RULES (SAP) AND ORDERING INFORMATION (SZZU001B, 4 KB - Updated: 05/06/1999) LOGIC SELECTION GUIDE SECOND HALF 2000 (SDYU001N, 5035 KB - Updated: 04/17/2000) MORE POWER IN LESS SPACE - TECHNICAL ARTICLE (SCAU001A, 850 KB - Updated: 03/01/1996) Table Data Updated on: 8/10/2000 (c) Copyright 2000 Texas Instruments Incorporated. All rights reserved. Trademarks | Privacy Policy 1 of 3 Products Development Tools Applications Search >> Semiconductor Home > Products > Digital Logic > Programmable Logic > PALS > TIBPAL20R6-20M, HIGH-PERFORMANCE IMPACT(TM) PAL(R) CIRCUITS Device Status: Active > Description > Features > Datasheets > Pricing/Samples/Availability > Application Notes > Related Documents Description These programmable array logic devices feature high speed and functional equivalency when compared with currently available devices. These IMPACTTM circuits combine the latest Advanced Low-Power Schottky technology with proven titanium-tungsten fuses to provide reliable, high-performance substitutes for conventional TTL logic. Their easy programmability allows for quick design of custom functions and typically results in a more compact circuit board. In addition, chip carriers are available for further reduction in board space. Extra circuitry has been provided to allow loading of each register asynchronously to either a high or low state. This feature simplifies testing because the registers can be set to an initial state prior to executing the test sequence. The TIBPAL20' C series is characterized from 0C to 75C. The TIBPAL20' M series is characterized for operation over the full military temperature range of -55C to 125C. Features l l l l l High-Performance: fmax (w/o feedback) TIBPAL20R' -15C Series . . . 45 MHz TIBPAL20R' -20M Series . . . 41.6 MHz High-Performance . . . 45 MHz Min Reduced ICC of 180 mA Max Functionally Equivalent, but Faster Than PAL20L8, PAL20R4, PAL20R6, PAL20R8 Power-Up Clear on Registered Devices (All Register Outputs are Set Low, but Voltage Levels at the Output Pins Go High) 2 of 3 l l Preload Capability on Output Registers Simplifies Testing Package Options Include Both Plastic and Ceramic Chip Carriers in Addition to Plastic and Ceramic DIPs I/O I 3-STATE REGISTERED DEVICE PORT INPUTS O OUTPUTS Q OUTPUTS S PAL20L8 14 2 0 6 PAL20R4 12 0 4 (3-state buffers) 4 PAL20R6 12 0 6 (3-state buffers) 2 PAL20R8 12 0 8 (3-state buffers) 0 These devices are covered by U.S Patent 4,410,987. IMPACT is a trademark of Texas Instruments Incorporated. PAL is a registered trademark of Advanced Micro Devices Inc. To view the following documents, Acrobat Reader 3.x is required. To download a document to your hard drive, right-click on the link and choose 'Save'. Datasheets Full datasheet in Acrobat PDF: srps021.pdf (184 KB) Full datasheet in Zipped PostScript: srps021.psz (191 KB) Pricing/Samples/Availability Orderable Device Package Pins Temp (C) Status Price/unit USD (100999) Pack Qty DSCC Number Availability / Samples 5962-87671033A FD 28 -55 TO 125 ACTIVE 16.87 1 Check stock or order 8412903KA W 24 -55 TO 125 ACTIVE 16.87 1 Check stock or order 8412903LA JT 24 -55 TO 125 ACTIVE 9.77 1 Check stock or order JM38510/50503BLA JT 24 -55 TO 125 ACTIVE 41.75 1 Check stock or order TIBPAL20R620MFKB FK 28 -55 TO 125 ACTIVE 16.87 1 TIBPAL20R6-20MJT JT 24 -55 TO 125 ACTIVE 10.22 1 TIBPAL20R620MJTB JT 24 -55 TO 125 ACTIVE 12.02 1 59628767103LA Check stock or order TIBPAL20R620MWB W 24 -55 TO 125 ACTIVE 16.87 1 59628767103KA Check stock or order Application Reports 8412903XA Check stock or order Check stock or order 3 of 3 View Application Reports for Digital Logic l TEST CONSIDERATIONS FOR PLD'S (SRPA001 - Updated: 12/02/1999) Related Documents l l l DOCUMENTATION RULES (SAP) AND ORDERING INFORMATION (SZZU001B, 4 KB - Updated: 05/06/1999) LOGIC SELECTION GUIDE SECOND HALF 2000 (SDYU001N, 5035 KB - Updated: 04/17/2000) MORE POWER IN LESS SPACE - TECHNICAL ARTICLE (SCAU001A, 850 KB - Updated: 03/01/1996) Table Data Updated on: 8/10/2000 (c) Copyright 2000 Texas Instruments Incorporated. All rights reserved. Trademarks | Privacy Policy 1 of 3 Products Development Tools Applications Search >> Semiconductor Home > Products > Digital Logic > Programmable Logic > PALS > TIBPAL20R8-20M, HIGH-PERFORMANCE IMPACT(TM) PAL(R) CIRCUITS Device Status: Active > Description > Features > Datasheets > Pricing/Samples/Availability > Application Notes > Related Documents Description These programmable array logic devices feature high speed and functional equivalency when compared with currently available devices. These IMPACTTM circuits combine the latest Advanced Low-Power Schottky technology with proven titanium-tungsten fuses to provide reliable, high-performance substitutes for conventional TTL logic. Their easy programmability allows for quick design of custom functions and typically results in a more compact circuit board. In addition, chip carriers are available for further reduction in board space. Extra circuitry has been provided to allow loading of each register asynchronously to either a high or low state. This feature simplifies testing because the registers can be set to an initial state prior to executing the test sequence. The TIBPAL20' C series is characterized from 0C to 75C. The TIBPAL20' M series is characterized for operation over the full military temperature range of -55C to 125C. Features l l l l l High-Performance: fmax (w/o feedback) TIBPAL20R' -15C Series . . . 45 MHz TIBPAL20R' -20M Series . . . 41.6 MHz High-Performance . . . 45 MHz Min Reduced ICC of 180 mA Max Functionally Equivalent, but Faster Than PAL20L8, PAL20R4, PAL20R6, PAL20R8 Power-Up Clear on Registered Devices (All Register Outputs are Set Low, but Voltage Levels at the Output Pins Go High) 2 of 3 l l Preload Capability on Output Registers Simplifies Testing Package Options Include Both Plastic and Ceramic Chip Carriers in Addition to Plastic and Ceramic DIPs I/O I 3-STATE REGISTERED DEVICE PORT INPUTS O OUTPUTS Q OUTPUTS S PAL20L8 14 2 0 6 PAL20R4 12 0 4 (3-state buffers) 4 PAL20R6 12 0 6 (3-state buffers) 2 PAL20R8 12 0 8 (3-state buffers) 0 These devices are covered by U.S Patent 4,410,987. IMPACT is a trademark of Texas Instruments Incorporated. PAL is a registered trademark of Advanced Micro Devices Inc. To view the following documents, Acrobat Reader 3.x is required. To download a document to your hard drive, right-click on the link and choose 'Save'. Datasheets Full datasheet in Acrobat PDF: srps021.pdf (184 KB) Full datasheet in Zipped PostScript: srps021.psz (191 KB) Pricing/Samples/Availability Orderable Device Package Pins Temp (C) Status Price/unit USD (100999) Pack Qty DSCC Number Availability / Samples 5962-87671023A FD 28 -55 TO 125 ACTIVE 16.87 1 Check stock or order 8412902KA W 24 -55 TO 125 ACTIVE 16.87 1 Check stock or order 8412902LA JT 24 -55 TO 125 ACTIVE 9.77 1 Check stock or order JM38510/50502BLA JT 24 -55 TO 125 ACTIVE 41.75 1 Check stock or order TIBPAL20R820MFKB FK 28 -55 TO 125 ACTIVE 16.87 1 TIBPAL20R8-20MJT JT 24 -55 TO 125 ACTIVE 10.22 1 TIBPAL20R820MJTB JT 24 -55 TO 125 ACTIVE 12.02 1 59628767102LA Check stock or order TIBPAL20R820MWB W 24 -55 TO 125 ACTIVE 16.87 1 59628767102KA Check stock or order Application Reports 8412902XA Check stock or order Check stock or order 3 of 3 View Application Reports for Digital Logic l TEST CONSIDERATIONS FOR PLD'S (SRPA001 - Updated: 12/02/1999) Related Documents l l l DOCUMENTATION RULES (SAP) AND ORDERING INFORMATION (SZZU001B, 4 KB - Updated: 05/06/1999) LOGIC SELECTION GUIDE SECOND HALF 2000 (SDYU001N, 5035 KB - Updated: 04/17/2000) MORE POWER IN LESS SPACE - TECHNICAL ARTICLE (SCAU001A, 850 KB - Updated: 03/01/1996) Table Data Updated on: 8/10/2000 (c) Copyright 2000 Texas Instruments Incorporated. All rights reserved. Trademarks | Privacy Policy