SN74CBTS3384
10-BIT FET BUS SWITCH
WITH SCHOTTKY DIODE CLAMPING
SCDS024H – MAY 1995 – REVISED JULY 1999
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
D
Functionally Equivalent to QS3384 and
QS3L384
D
5-Ω Switch Connection Between Two Ports
D
TTL-Compatible Input Levels
D
Package Options Include Plastic
Small-Outline (DW), Shrink Small-Outline
(DB, DBQ), Thin Very Small-Outline (DGV),
and Thin Shrink Small-Outline (PW)
Packages
description
The SN74CBTS3384 provides ten bits of
high-speed TTL-compatible bus switching with
Schottky diodes on the I/Os to clamp undershoot.
The low on-state resistance of the switch allows
connections to be made with minimal propagation
delay.
The device is organized as two 5-bit bus switches with separate output-enable (OE) inputs. When OE is low,
the switch is on and port A is connected to port B. When OE is high, the switch is open and a high-impedance
state exists between the two ports.
The SN74CBTS3384 is characterized for operation from –40°C to 85°C.
FUNCTION TABLE
(each 5-bit bus switch)
INPUTS INPUTS/OUTPUTS
1OE 2OE 1B1–1B5 2B1–2B5
L L 1A1–1A5 2A1–2A5
L H 1A1–1A5 Z
HLZ2A1–2A5
H H Z Z
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Copyright 1999, Texas Instruments Incorporated
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
DB, DBQ, DGV, DW, OR PW PACKAGE
(TOP VIEW)
1OE
1B1
1A1
1A2
1B2
1B3
1A3
1A4
1B4
1B5
1A5
GND
VCC
2B5
2A5
2A4
2B4
2B3
2A3
2A2
2B2
2B1
2A1
2OE
1
2
3
4
5
6
7
8
9
10
11
12
24
23
22
21
20
19
18
17
16
15
14
13
SN74CBTS3384
10-BIT FET BUS SWITCH
WITH SCHOTTKY DIODE CLAMPING
SCDS024H – MAY 1995 – REVISED JULY 1999
2POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
logic diagram (positive logic)
32
1A1 1B1
11
1A5
1
1OE
10 1B5
14 15
2A1 2B1
22
2A5
13
2OE
23 2B5
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)†
Supply voltage range, VCC –0.5 V to 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input voltage range, VI (see Note 1) –0.5 V to 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Continuous channel current 128 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input clamp current, IIK (VI/O < 0) –50 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Package thermal impedance, θJA (see Note 2): DB package 104°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
DBQ package 113°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
DGV package 139°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
DW package 81°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
PW package 120°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Storage temperature range, Tstg –65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
†Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only , and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may af fect device reliability.
NOTES: 1. The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed.
2. The package thermal impedance is calculated in accordance with JESD 51.
recommended operating conditions (see Note 3)
MIN MAX UNIT
VCC Supply voltage 4 5.5 V
VIH High-level control input voltage 2 V
VIL Low-level control input voltage 0.8 V
TAOperating free-air temperature –40 85 °C
NOTE 3: All unused control inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs
, literature number SCBA004.
SN74CBTS3384
10-BIT FET BUS SWITCH
WITH SCHOTTKY DIODE CLAMPING
SCDS024H – MAY 1995 – REVISED JULY 1999
3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP†MAX UNIT
VIK VCC = 4.5 V, II = –18 mA –0.6 V
II
IIL VCC = 5.5 V, VI = GND –1
µA
I
IIIH VCC = 5.5 V, VI = 5.5 V 150 µ
A
ICC VCC = 5.5 V, IO = 0, VI = VCC or GND 3 µA
∆ICC‡Control inputs VCC = 5.5 V, One input at 3.4 V, Other inputs at VCC or GND 2.5 mA
CiControl inputs VI = 3 V or 0 6 pF
Cio(OFF) VO = 3 V or 0, OE = VCC 6.5 pF
§
VCC = 4 V,
TYP at VCC = 4 V VI = 2.4 V, II = 15 mA 14 20
r
on§
VI=0
II = 64 mA 5 7 Ω
on
VCC = 4.5 V
V
I =
0
II = 30 mA 5 7
VI = 2.4 V, II = 15 mA 10 15
†All typical values are at VCC = 5 V (unless otherwise noted), TA = 25°C.
‡This is the increase in supply current for each input that is at the specified TTL voltage level rather than VCC or GND.
§Measured by the voltage drop between the A and B terminals at the indicated current through the switch. On-state resistance is determined by
the lowest voltage of the two (A or B) terminals.
switching characteristics over recommended operating free-air temperature range, CL = 50 pF
(unless otherwise noted) (see Figure 1)
PARAMETER FROM
(INPUT)
TO
(OUTPUT)
VCC = 4 V VCC = 5 V
± 0.5 V UNIT
(INPUT)
(OUTPUT)
MIN MAX MIN MAX
tpd¶A or B B or A 0.35 0.25 ns
ten OE A or B 6.2 1.9 5.7 ns
tdis OE A or B 5.5 2.1 5.2 ns
¶The propagation delay is the calculated RC time constant of the typical on-state resistance of the switch and the specified load capacitance, when
driven by an ideal voltage source (zero output impedance).
SN74CBTS3384
10-BIT FET BUS SWITCH
WITH SCHOTTKY DIODE CLAMPING
SCDS024H – MAY 1995 – REVISED JULY 1999
4POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
PARAMETER MEASUREMENT INFORMATION
VOH
VOL
From Output
Under Test
CL = 50 pF
(see Note A)
LOAD CIRCUIT
S1 7 V
Open
GND
500 Ω
500 Ω
tPLH tPHL
Output
Control
(low-level
enabling)
Output
W aveform 1
S1 at 7 V
(see Note B)
Output
W aveform 2
S1 at Open
(see Note B)
tPZL
tPZH
tPLZ
tPHZ
1.5 V
1.5 V
1.5 V 1.5 V 3 V
0 V
1.5 V 1.5 V VOH
VOL
0 V
1.5 V VOL + 0.3 V
1.5 V VOH – 0.3 V
0 V
Input
3 V
3.5 V
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
Output
tpd
tPLZ/tPZL
tPHZ/tPZH
Open
7 V
Open
TEST S1
NOTES: A. CL includes probe and jig capacitance.
B. W aveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
W aveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω, tr ≤ 2.5 ns, tf ≤ 2.5 ns.
D. The outputs are measured one at a time with one transition per measurement.
E. tPLZ and tPHZ are the same as tdis.
F. tPZL and tPZH are the same as ten.
G. tPLH and tPHL are the same as tpd.
Figure 1. Load Circuit and Voltage Waveforms
IMPORTANT NOTICE
Texas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue
any product or service without notice, and advise customers to obtain the latest version of relevant information
to verify, before placing orders, that information being relied on is current and complete. All products are sold
subject to the terms and conditions of sale supplied at the time of order acknowledgement, including those
pertaining to warranty, patent infringement, and limitation of liability.
TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in
accordance with TI’s standard warranty. Testing and other quality control techniques are utilized to the extent
TI deems necessary to support this warranty . Specific testing of all parameters of each device is not necessarily
performed, except those mandated by government requirements.
CERTAIN APPLICATIONS USING SEMICONDUCTOR PRODUCTS MAY INVOLVE POTENTIAL RISKS OF
DEATH, PERSONAL INJURY, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE (“CRITICAL
APPLICATIONS”). TI SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, AUTHORIZED, OR
WARRANTED TO BE SUITABLE FOR USE IN LIFE-SUPPORT DEVICES OR SYSTEMS OR OTHER
CRITICAL APPLICA TIONS. INCLUSION OF TI PRODUCTS IN SUCH APPLICATIONS IS UNDERSTOOD TO
BE FULLY AT THE CUSTOMER’S RISK.
In order to minimize risks associated with the customer’s applications, adequate design and operating
safeguards must be provided by the customer to minimize inherent or procedural hazards.
TI assumes no liability for applications assistance or customer product design. TI does not warrant or represent
that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other
intellectual property right of TI covering or relating to any combination, machine, or process in which such
semiconductor products or services might be or are used. TI’s publication of information regarding any third
party’s products or services does not constitute TI’s approval, warranty or endorsement thereof.
Copyright 1999, Texas Instruments Incorporated
