RT2853BHGQW - Richtek Technology - Datasheet.Directory

RT2853A/B

DS2853A/B-03 January 2018 www.richtek.com

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Design

3A, 18V, 650kHz, ACOTTM Synchronous Step-Down Converter

Features

zFa st Transient Response

zSteady 650kHz Switching Frequency

zEnhanced Efficiency at Light Load (RT2853A)

zAdvanced Constant On-Time (ACOTTM) Control

zOptimized for Ceramic Output Capacitors

z4.5V to 18V Input Voltage Range

zInternal 110mΩΩ

ΩΩ

Ω Switch and 30mΩΩ

ΩΩ

Ω Synchronous

Rectifier

z0.765V to 7V Adjustable Output Voltage

zExternally-a djusta ble, Pre-biased Compatible Soft-

Start

zCycle-by-Cycle Current Limit

zOptional Output Discharge Function

zOutput Over- and Under-voltage Shut-down

` Latched (RT2853ALGQW/RT2853BLGQW Only)

` With Hiccup Mode (RT2853AHGQW/

RT2853BHGQW Only)

General Description

The RT2853A/B are high-perf orma nce 650kHz 3A step-

down regulators with internal power switches and

synchronous rectifiers. They feature quick transient

response using their Advanced Constant On-Time

(ACOTTM) control architecture that provides stable

operation with small cera mic output capacitors and without

complicated external compensation, a mong other benefits.

The input voltage range is from 4.5V to 18V and the output

is adjustable from 0.765V to 7V.

The proprietary ACOTTM control improves upon other fa st-

response constant on-time architectures, a chieving nearly

consta nt switching frequency over line, loa d, and output

voltage ranges. Since there is no internal clock, response

to transients is nearly insta ntaneous a nd inductor current

can ramp quickly to maintain output regulation without

large bulk output ca pacitance. The RT2853A/B are stable

with a nd optimized f or ceramic output ca pacitors.

With internal 110mΩ switches and 30mΩ synchronous

rectifiers, the RT2853A/B display excellent efficiency and

good behavior a cross a ra nge of a pplication s, especially

for low output voltages and low duty cycles. Cycle-by-

cycle current limit, input under-voltage lock-out, externally-

adjustable soft-start, output under- and over-voltage

protection, and thermal shutdown provide safe and smooth

operation in all operating conditions.

The RT2853A and RT2853B are each available in

WQFN-16L 3x3 package, with exposed thermal pads.

Simplified Application Circuit

PGOOD

RT2853A/B

VREG5

VCC

VIN

BOOT

VIN

GND PGND

VOUT

Input Signal

Power Good

VREG5

Fast-Transient Response

Time (100µs/Div)

IOUT

(1A/Div)

VOUT

(50mV/Div)

VIN = 12V, VOUT = 1.05V, IOUT = 0 to 3A

RT2853B

Applications

zIndustrial a nd Commercial Low Power Syste ms

zComputer Peripherals

zLCD Monitors and TVs

zPoint of Load Regulation for High-Performance DSPs,

FPGAs, a nd ASICs

RT2853A/B

2DS2853A/B-03 January 2018www.richtek.com

Pin Configurations

(TOP VIEW)

WQFN-16L 3x3

GND

REG5 BOO

GOOD

PGND

VIN

13141516

8765

GND

Ordering Information

Note :

Richtek products are :

` RoHS compliant and compatible with the current require-

ments of IPC/JEDEC J-STD-020.

` Suitable for use in SnPb or Pb-free soldering processes.

Marking Information

T2853A/B

Package Type

QW : WQFN-16L 3x3 (W-Type)

Lead Plating System

G : Green (Halogen Free and Pb Free)

A : Enhanced Light Load Efficiency

B : Continuous Switching Mode

H : Hiccup Mode OVP & UVP

L : Latched OVP & UVP

2H= : Product Code

YMDNN : Date Code

RT2853BHGQW

2H=YM

DNN

2G= : Product Code

YMDNN : Date Code

RT2853BLGQW

2G=YM

DNN

2J= : Product Code

YMDNN : Date Code

RT2853ALGQW

2J=YM

DNN

2K= : Product Code

YMDNN : Date Code

2K=YM

DNN

RT2853AHGQW

RT2853A/B

DS2853A/B-03 January 2018 www.richtek.com

(VIN = 12V, TA = −40°C to 85°C, unless otherwise specified)

Electrical Characteristics

Recommended Operating Conditions (Note 4)

zSupply V oltage, VIN -----------------------------------------------------------------------------------------------4.5V to 18V

zJunction T emperature Range------------------------------------------------------------------------------------- −40°C to 125°C

zAmbient T emperature Range------------------------------------------------------------------------------------- −40°C to 85°C

Absolute Maximum Ratings (Note 1)

zSupply Voltage, VIN, VCC --------------------------------------------------------------------------------------- −0.3V to 21V

zSwitch Voltage, SW ----------------------------------------------------------------------------------------------- −0.8V to (VVIN + 0.3V)

< 10ns ---------------------------------------------------------------------------------------------------------------- −5V to 25V

zBOOT to SW -------------------------------------------------------------------------------------------------------- −0.3V to 6V

zVREG5 to VIN or VCC -------------------------------------------------------------------------------------------- −18V to 0.3V

zOther Pins Voltage ------------------------------------------------------------------------------------------------- −0.3V to 21V

zPower Dissipation, PD @ TA = 25°C

WQFN-16L 3x3 -----------------------------------------------------------------------------------------------------2.1W

zPa ckage Thermal Resista nce (Note 2)

WQFN-16L 3x3, θJA ------------------------------------------------------------------------------------------------47.4°C/W

WQFN-16L 3x3, θJC -----------------------------------------------------------------------------------------------7.5°C/W

zJunction T emperature Range-------------------------------------------------------------------------------------150°C

zLead Temperature (Soldering, 10 sec.)------------------------------------------------------------------------260°C

zStorage T emperature Range ------------------------------------------------------------------------------------- −65°C to 150°C

zESD Susceptibility (Note 3)

HBM (Human Body Model)---------------------------------------------------------------------------------------2kV

Parameter Symbol Test Conditions Min Typ Max

Unit

Supply Current

Shutdown Cur r en t ISHDN T

A = 25°C, VEN = 0V -- 1 10 µA

Quiescent Current IQ T

A = 25°C, VEN = 5V , VFB = 0.8V -- 1 1.3 mA

Logic Threshold

Logic-High 2 -- 18

EN Voltage Logic-Low -- -- 0.4 V

VFB Voltage and Discharge Resistance TA = 25°C 0.757

0.765

0.773

Feedback Threshold Voltage VFB TA = −40°C to 85°C 0.755

-- 0.775

Feedbac k Input C urr e nt IFB V

FB = 0.8V, TA = 25°C -- 0.01

0.1 µA

VS Dischar ge Resistance RDIS V

EN = 0V, VS = 0.5V -- 50 100

Ω

VREG5 Output

VREG5 Output Voltage VREG5 TA = 25°C, 6V ≤ VIN ≤ 18V,

0 < IVREG5 < 5mA 4.8 5.1 5.4 V

Line Regulation 6V ≤ VIN ≤ 18V, IVREG5 = 5mA -- -- 20 mV

Load Regulation 0 < IVREG5 < 5 mA -- -- 100

Output Current IVREG5 V

IN = 6 V, VREG5 = 4V, TA = 25°C -- 70 -- mA

RT2853A/B

4DS2853A/B-03 January 2018www.richtek.com

Note 1. Stresses beyond those listed “Absolute Maximum Ratings” may cause permanent damage to the device. These are

stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in

the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions may

affect device reliability.

Note 2. θJA is measured at TA = 25°C on a high effective thermal conductivity four-layer test board per JEDEC 51-7. θJC is

measured at the exposed pad of the package.

Note 3. Devices are ESD sensitive. Handling precaution is recommended.

Note 4. The device is not guaranteed to function outside its operating conditions.

Parameter Symbol Test Conditions Min

Typ

Max

Unit

RDS(ON)

High-Side RDS(ON)_H TA = 25°C (VBOOT − VSW) = 5.5V -- 110

Switch On

Resistan ce Low-Side RDS(ON)_L TA = 25°C -- 30 --

mΩ

Cur rent Limit

Current Limit ILIM LSW = 1 .4µH 4 4.5 6 A

Thermal Shutdown

T her m al Shutdown T hre sh old

TSD Shutdown Temperature -- 150

T her m al Shutdow n H yst er e sis

∆TSD -- 20 --

°C

On- Tim e Timer Contr ol

On-Time tON V

OUT = 1.05V -- 135

-- ns

M inimu m Off-Tim e tOFF(MIN) VFB = 0.7V, T A = 25°C -- 260

310

Soft-Start

SS Charge Current VSS = 0V 1.4 2 2.6 µA

SS Discharge Current VSS = 0.5V 0.1 0.2 -- mA

UVLO

UVLO Threshold Wake U p VREG5 3.6 3.85

4.1

Hysteresis 0.13

0.35

0.47

Power Good VFB Rising 85 90 95

PGOOD Threshold VFB Fal ling -- 85 -- %

PGOOD Sink Current PGOOD = 0.5V 2.5 5 -- mA

Output Under Voltage and Over Voltage Protection

OVP Trip Threshold OVP Detect 115 120

125

OVP Prop Dela y -- 5 --

µs

UVP Trip Threshold 65 70 75

UVP Hysteresis -- 10 --

UVP Prop Dela y -- 250

-- µs

UVP Enable Delay tUVPEN Relative to Soft-Start Time -- tSS

x 1.7

-- ms

RT2853A/B

DS2853A/B-03 January 2018 www.richtek.com

Typical Operating Characteristics

Efficiency vs. Load Current

100

0.001 0.01 0.1 1 10

Load C urren t (A)

Efficiency (%)

VOUT = 5V

VOUT = 1.05V

VIN = 12V

RT2853A

Efficiency vs. Load Current

100

0.001 0.01 0.1 1 10

Load C urren t (A)

Efficiency (%)

VOUT = 5V

VOUT = 1.05V

VIN = 12V

RT2853B

Output Voltage vs. Load Current

1.00

1.02

1.04

1.06

1.08

1.10

0 0.5 1 1.5 2 2.5 3

Load C urren t (A)

Output Volt age (V)

VIN = 12V, VOUT = 1.05V, IOUT = 0 to 3A

RT2853A

Output Voltage vs. Load Current

1.00

1.02

1.04

1.06

1.08

1.10

0 0.5 1 1.5 2 2.5 3

Load C urren t (A)

Output Voltage (V)

VIN = 12V, VOUT = 1.05V, I OUT = 0 to 3A

RT2853B

Switc hing Frequency vs . Load Current

100

200

300

400

500

600

700

800

0 0.5 1 1.5 2 2.5 3

Load Cur rent (A)

Switching Frequency (kHz) 1

VIN = 12V, VOUT = 1.05V, I OUT = 0 to 3A

RT2853A

Switching Frequency vs. Loa d Current

100

200

300

400

500

600

700

800

0 0.5 1 1.5 2 2.5 3

Load Cur rent (A)

Switching Frequency (kH z) 1

VIN = 12V, VOUT = 1.05V, IOUT = 0 to 3A

RT2853B

RT2853A/B

6DS2853A/B-03 January 2018www.richtek.com

Current Limit vs. Input Voltage

3.0

3.5

4.0

4.5

5.0

5.5

6.0

6.5

7.0

4 6 81012141618

Input V o ltage (V)

Current Lim it (A )

VIN = 12V, VOUT = 1.05V

Upper Threshold

Lower Threshold

Shutdown Current vs. Tempe rature

-50 -25 0 25 50 75 100 125

Temperat ure (°C)

Shut dow n Current (µA) 1

VIN = 12V, VOUT = 1.05V, IOUT = 0A

Quiescent Current vs. Temperature

600

650

700

750

800

850

900

950

1000

-50 -25 0 25 50 75 100 125

Temperatu re (°C )

Quiescent C urrent (µA)

VIN = 12V, VOUT = 1.05V, IOUT = 0A

Feedback Voltage v s. Input Voltage

0.740

0.748

0.756

0.764

0.772

0.780

4 6 81012141618

Input V o ltage (V)

Feedback Vol tage (V)

VIN = 12V, VOUT = 0.765V, IOUT = 0.6A

Feedback Voltage v s. Temperature

0.70

0.72

0.74

0.76

0.78

0.80

-50 -25 0 25 50 75 100 125

Temperat ur e (°C )

Feedback Vol tage (V)

VIN = 12V, VOUT = 0.765V, IOUT = 0.6A

Maximum Output Current vs. Temperatur

3.0

3.5

4.0

4.5

5.0

5.5

6.0

-50 -25 0 25 50 75 100 125

Temperature (°C)

Maxi mum Output Current (A) 1

VIN = 12V

VOUT = 1.05V

VIN = 18V

RT2853A/B

DS2853A/B-03 January 2018 www.richtek.com

Power Off from VIN

Time (5ms/Div)

VOUT

(5V/Div)

VIN

(10V/Div)

VIN = 12V, VOUT = 1.05V, I OUT = 3A

PGOOD

(5V/Div)

ISW

(2A/Div)

Power On from EN

Time (1ms/Div)

VOUT

(1V/Div)

(2V/Div)

VIN = 12V, VOUT = 1.05V, IOUT = 3A

PGOOD

(5V/Div)

IOUT

(2A/Div)

Output Ripple Voltage

Time (500ns/Div)

VSW

(5V/Div)

VOUT

(10mV/Div)

VIN = 12V, VOUT = 1.05V, IOUT = 3A

Load Transient Response

Time (100µs/Div)

IOUT

(1A/Div)

VOUT

(50mV/Div)

VIN = 12V, VOUT = 1.05V, IOUT = 0 to 3A

RT2853B

Power On from VIN

Time (1ms/Div)

VOUT

(5V/Div)

VIN

(10V/Div)

VIN = 12V, VOUT = 1.05V, IOUT = 3A

PGOOD

(5V/Div)

IOUT

(2A/Div)

Load Transient Response

Time (100µs/Div)

IOUT

(1A/Div)

VOUT

(50mV/Div)

VIN = 12V, VOUT = 1.05V, IOUT = 1A to 3A

RT2853A

RT2853A/B

8DS2853A/B-03 January 2018www.richtek.com

Power Off from EN

Time (5ms/Div)

VOUT

(2V/Div)

VIN = 12V, VOUT = 1.05V, I OUT = 3A

PGOOD

(5V/Div)

ISW

(2A/Div)

RT2853A/B

DS2853A/B-03 January 2018 www.richtek.com

Functional Pin Description

Pin No. Pin Name Pin Function

1 FB Feedback Input Voltage. Connect FB to the midpoint of the external feedback

resis tiv e div ider to se ns e t he output vol tag e. Pl ac e the res istive di vid er wi thi n

5mm fr om the FB pin. The IC regulates VFB at 0.765 V (t y pic al ).

2 VREG5

Internal Regulator Output. Connect a 1µF capacitor to GND to stabilize

output voltage.

3 SS S o ft- Star t C o ntr o l. C on nec t an e xter nal ca pac ito r betw e en t his p in a nd G ND

to set the soft-start time.

4 GND Ground.

5 PGOOD

O pe n Dra in Po wer - goo d Ou tpu t. P GO O D c onnec ts to PG ND whenev er VFB

is less than 90% of its regulation threshold (typical).

6 EN Enable Control Input. A logic-high enables the converter; a logic-low forces

the IC into shutdown mode reducing the supply current to less than 10µA.

7, 8,

17 (Exposed pad)

PGND

Power Ground. PGND connects to the source of the internal N-channel

M OSF ET s yn chr onous r ec tif ier an d to ot he r po w er gr ou nd nod es of t h e IC.

T he ex pos ed p ad a nd the 2 P G ND p ins sho uld be w e ll so lde r ed to t he i npu t

and output capacitors and to a large PCB area for good power dissipation.

9, 10, 11 SW

Sw itc hi ng N od e. SW is the s our c e of the in ternal N- ch ann el MO SFE T s w itc h

and the drain of the internal N-Channel MOSFET synchronous rectifier.

Connect SW to the inductor with a wide short PCB trace and minimize its

area to reduc e EM I.

12 BOOT

Bootstrap Supply for High-Side Gate Driver. Connect a 0.1µF capacitor

between BOOT and SW to power the internal gate driver.

13, 14 VIN Power Input. The input voltage range is from 4.5V to 18V. Must bypass with a

suitably large (≥10µF x 2) ceramic capacitors at this pin.

15 VCC

Internal Linear Regulator Supply Input. VCC supplies power for the internal

linear regulator that powers the IC. Connect VIN to the input voltage and

bypass to ground with a 0.1µF ceramic capacitor.

16 VS Optional Output Voltage Discharge Connection. The open drain output

connects to ground when the device is disabled. If output voltage discharge is

desired, connect VS to the output voltage.

RT2853A/B

10 DS2853A/B-03 January 2018www.richtek.com

Function Block Diagram

Detailed Description

The RT2853A/B are high-perf orma nce 650kHz 3A step-

down regulators with internal power switches and

synchronous rectifiers. They feature an Advanced Constant

On-Time (ACOTTM) control architecture that provides

stable operation with ceramic output capacitors without

complicated external compensation, a mong other benefits.

The input voltage range is from 4.5V to 18V and the output

is adjusta ble from 0.765V to 7V.

The proprietary ACOTTM control scheme improves upon

other constant on-time architectures, achieving nearly

consta nt switching frequency over line, loa d, and output

voltage ranges. The RT2853A/B are optimized for cera mic

output capacitors. Since there is no internal clock,

response to transients is nearly instantaneous and inductor

current can ramp quickly to maintain output regulation

without large bulk output ca pa cita nce.

Constant On-Time (COT) Control

The heart of any COT architecture is the on-time one-

shot. Each on-time is a pre-determined “fixed” period

that is triggered by a feedback comparator. This robust

arrangement ha s high noise immunity a nd is ideal for low

duty cycle a pplications. After the on-time one-shot period,

there is a minimum off-time period before any further

regulation decisions can be considered. This arrangement

avoids the need to make any decisions during the noisy

time periods just after switching events, when the

switching node (SW) rises or falls. Because there is no

fixed clock, the high-side switch can turn on almost

immediately after load transients and further switching

pulses ca n ra mp the inductor current higher to meet load

requirements with minimal delays.

Traditional current mode or voltage mode control schemes

typically must monitor the feedback voltage, current

signals (also for current limit), and internal ramps and

compensation signals, to determine when to turn off the

high-side switch and turn on the synchronous rectifier.

W eighing these small signals in a switching environment

is difficult to do just after switching large currents, making

those architectures problematic at low duty cycles a nd in

less tha n ideal board layouts.

Because no switching decisions are made during noisy

time periods, COT architectures are preferable in low duty

cycle and noisy applications. However, traditional COT

UGATE

LGATE

Driver

BOOT

VREG5

Switch

Controller

On-Time

Over Current

Protection

Comparator

PGND

Internal Regulator

VBIASVREF

VCC

VREG5

Under & Over

Voltage

Protection

0.9 VREF +

PGOO

2µA

PVCC Ripple

Gen.

VIN

PGOOD

Comparator

SS VS

Discharge

RT2853A/B

DS2853A/B-03 January 2018 www.richtek.com

control schemes suffer from some disadvantages that

preclude their use in many cases. Many a pplications require

a known switching frequency range to avoid interference

with other sensitive circuitry . True constant on-time control,

where the on-time is actually fixed, exhibits variable

switching frequency. In a step-down converter, the duty

factor is proportional to the output voltage and inversely

proportional to the input voltage. Therefore, if the on-time

is fixed, the off-time (and therefore the frequency) must

change in response to cha nges in input or output voltage.

Modern pseudo-fixed frequency COT architectures greatly

improve COT by making the one-shot on-time proportional

to VOUT a nd inversely proportional to VIN. In this way, an

on-time is chosen as approximately what it would be for

an ideal fixed-frequency PWM in similar input/output

voltage conditions. The result is a big improvement but

the switching frequency still varies considerably over line

and loa d due to losses in the switches and inductor and

other para sitic ef fects.

Another problem with many COT architectures is their

dependence on adequate ESR in the output capacitor,

ma king it difficult to use highly-desirable, small, low-cost,

but low-ESR cera mic capa citors. Most COT architectures

use AC current information from the output capacitor,

generated by the inductor current passing through the

ESR, to function in a way like a current mode control

system. With ceramic capacitors the inductor current

information is too small to keep the control loop stable,

like a current mode system with no current information.

ACOTTM Control Architecture

Making the on-time proportional to VOUT and inversely

proportional to VIN is not sufficient to achieve good

constant-frequency behavior for several reasons. First,

voltage drops across the MOSFET switches a nd inductor

cause the effective input voltage to be less than the

mea sured input voltage and the effective output voltage to

be greater than the mea sured output voltage. As the load

changes, the switch voltage drops change causing a

switching frequency variation with load current. Also, at

light loads if the inductor current goes negative, the switch

dead-time between the synchronous rectifier turn-off and

the high-side switch turn-on allows the switching node to

rise to the input voltage. This increases the effective on-

time and causes the switching frequency to drop

noticeably.

One way to reduce these effects is to mea sure the actual

switching frequency and compare it to the desired range.

This ha s the added benefit eliminating the need to sense

the actual output voltage, potentially saving one pin

connection. ACOTTM uses this method, measuring the

actual switching frequency (at SW) a nd modifying the on-

time with a feedba ck loop to kee p the average switching

frequency in the desired range.

T o achieve good stability with low-ESR cera mic capacitors,

ACOTTM uses a virtual inductor current ramp generated

inside the IC. This internal ra mp signal repla ces the ESR

ramp normally provided by the output capacitor's ESR.

The ramp signal and other internal compensations are

optimized f or low-ESR ceramic output ca pacitors.

ACOTTM One-shot Operation

The RT2853A/B control algorithm is simple to understand.

The feedback voltage, with the virtual inductor current ra mp

added, is compared to the reference voltage. When the

combined signal is less than the reference the on-time

one-shot is triggered, as long as the minimum off-time

one-shot is clear and the measured inductor current

(through the synchronous rectifier) is below the current

limit. The on-time one-shot turns on the high-side switch

and the inductor current ramps up linearly. After the on-

time, the high-side switch is turned off and the synchronous

rectifier is turned on a nd the inductor current ramps down

linearly . At the same time, the minimum off-time one-shot

is triggered to prevent a nother immediate on-ti me during

the noisy switching time and allow the feedback voltage

and current sense signals to settle. The minimum off-time

is kept short (260ns typical) so that rapidly-repeated on-

times can raise the inductor current quickly when needed.

Discontinuous Operating Mode (RT2853A Only)

After soft start, the RT2853B operates in fixed frequency

mode to minimize interference a nd noise problems. The

RT2853A uses variable-frequency discontinuous switching

at light loads to i mprove efficiency. During discontinuous

switching, the on-time is immediately increased to add

RT2853A/B

12 DS2853A/B-03 January 2018www.richtek.com

“hysteresis” to discourage the IC from switching ba ck to

continuous switching unless the load increases

substantially.

The IC returns to continuous switching a s soon a s an on-

time is generated before the inductor current reaches zero.

The on-time is reduced back to the length needed for

650kHz switching a nd encouraging the circuit to remain

in continuous conduction, preventing repetitive mode

transitions between continuous switching and

discontinuous switching.

Current Limit

The RT2853A/B current limit is a cycle-by-cycle “valley”

type, measuring the inductor current through the

synchronous rectifier during the off-time while the inductor

current ramps down. The current is determined by

measuring the voltage between source and drain of the

synchronous rectifier , adding temperature compensation

for greater accuracy. If the current exceeds the upper

current limit, the on-time one-shot is inhibited until the

inductor current ra mps down below the upper current limit

plus a wide hysteresis band of about 1A until it drops

below the lower current limit level. Thus, only when the

inductor current is well below the upper current limit is

another on-time permitted. This arrangement prevents the

average output current from greatly exceeding the

guara nteed upper current li mit value, as typically occurs

with other valley-type current limits. If the output current

exceeds the available inductor current (controlled by the

current limit mecha nism), the output voltage will drop. If it

drops below the output under-voltage protection level (see

next section) the IC will stop switching to avoid excessive

heat.

The RT2853B also includes a negative current limit to

protect the IC against sinking excessive current and

possibly damaging the IC. If the voltage across the

synchronous rectifier indicates the negative current is too

high, the synchronous rectifier turns off until after the next

high-side on-time. The RT2853A does not sink current

a nd therefore does not need a negative current limit.

Hiccup Mode

The RT2853AHGQW/ RT2853BHGQW, use hiccup mode

OVP and UVP. When the protection function is triggered,

the IC will shut down for a period of time and then attempt

to recover automatically. Hiccup mode allows the circuit

to operate safely with low input current and power

dissipation, and then resume normal operation as soon

a s the overload or short circuit is removed. During hiccup

mode, the shutdown time is determined by the capa citor

at SS. A 0.5µA current source discharges VSS from its

starting voltage (normally VREG5). The IC remains shut

down until VSS reaches 0.2V, about 40ms for a 3.9nF

capacitor. At that point the IC begins to charge the SS

ca pa citor at 2µA, a nd a normal start-up occurs. If the fault

remains, OVP a nd UVP protection will be ena bled when

VSS reaches 2.2V (typical). The IC will then shut down

and discharge the SS ca pacitor from the 2.2V level, ta king

about 17ms f or a 3.9nF SS capa citor.

Latch-Off Mode

The RT2853ALGQW/ RT2853BLGQW, use latch-off mode

OVP a nd UVP. When the prote ction function is triggered

the IC will shut down. The IC stops switching, leaving

both switches open, and is latched off. To restart operation,

toggle EN or power the IC off a nd then on again.

Input Under-voltage Lock-out

In addition to the enable function, the RT2853A/B feature

a n under-voltage lock-out (UVLO) function that monitors

the internal linear regulator output (V REG5). To prevent

operation without fully-enhanced internal MOSFET

switches, this function inhibits switching when VREG5

drops below the UVLO-falling threshold. The IC resumes

switching when VREG5 exceeds the UVLO-rising

threshold.

Shut-down, Start-up and Enable (EN)

The enable input (EN) ha s a logic-low level of 0.4V . When

VEN is below this level the IC enters shutdown mode an d

supply current drops to less than 10µA. When VEN exceeds

its logic-high level of 2V the IC is fully operational.

RT2853A/B

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Between these 2 levels there are 2 thresholds (0.8V typical

and 1.2V typical). When VEN exceeds the lower threshold

the internal bias regulators begin to function and supply

current increases above the shutdown current level.

Switching operation begins when VEN exceeds the upper

threshold. Unlike many competing devices, EN is a high

voltage input that can be safely connected to VIN (up to

18V) for automatic start-up.

Soft-Start (SS)

The RT2853A/B soft-start uses an external pin (SS) to

clamp the output voltage and allow it to slowly rise. After

VEN is high and VREG5 exceeds its UVLO threshold, the

IC begins to source 2µA from the SS pin. An external

capacitor at SS is used to adjust the soft-start timing.

The available capa cita nce ra nge is from 2.7nF to 220nF.

Do not leave SS unconnected.

During start-up, while the SS capacitor charges, the

RT2853A/B operate in discontinuous mode with very small

pulses. This prevents negative inductor currents and keeps

the circuit from sinking current. Therefore, the output

voltage may be pre-biased to some positive level before

start-up. Once the VSS ra mp charges enough to raise the

internal reference above the feedba ck voltage, switching

will begin and the output voltage will smoothly rise from

the pre-biased level to its regulated level. After VSS rises

above about 2.2V output over-and under-voltage protections

are enabled and the RT2853B begins continuous-switching

operation.

An internal linear regulator (VREG5) produces a 5.1V

supply from VIN that powers the internal gate drivers, PWM

logic, reference, analog circuitry, and other blocks. If VIN

is 6V or greater, VREG5 is guaranteed to provide significant

power for external loads.

PGOOD Comparator

PGOOD is an open drain output controlled by a comparator

connected to the feedba ck sign al. If FB exceeds 90% of

the internal reference voltage, PGOOD will be high

impeda nce. Otherwise, the PGOOD output is connected

to PGND.

External Bootstrap Capacitor

Connect a 0.1µF low ESR ceramic capacitor between

BOOT and SW . This bootstrap ca pacitor provides the gate

driver supply voltage for the high-side N-channel MOSFET

switch.

Over Temperature Protection

The RT2853A/B includes a n over temperature protection

(OTP) circuitry to prevent overheating due to excessive

power dissipation. The OTP will shut down switching

operation when the junction temperature exceeds 150°C.

Once the junction temperature cools down by

approximately 20°C the IC will resume normal operation

with a complete soft-start. For continuous operation,

provide adequate cooling so that the junction temperature

does not exceed 150°C.

Output Discharge Control

When EN pin is low, the RT2853A/B will discharge the

output with an internal 50Ω MOSFET connected between

VS to G ND pin.

OVP/UVP Protection

The RT2853A/B detects over and under voltage conditions

by monitoring the feedback voltage on FB pin. The two

functions are enabled after approximately 1.7 times the

soft-start time. When the feedback voltage becomes

higher than 120% of the target voltage, the OVP

comparator will go high to turn off both internal high-side

and low-side MOSFETs. When the feedback voltage is

lower tha n 70% of the target voltage for 250µs, the UVP

comparator will go high to turn off both internal high-side

and low-side MOSFETs.

RT2853A/B

14 DS2853A/B-03 January 2018www.richtek.com

Typical Application Circuit

Table 1. Suggested Component Values (V IN = 12V)

VOUT (V) R1 (kΩ) R2 (kΩ) C3 (pF) L1 (µH) C7 (µF)

1 6.81 22.1 -- 1.4 22 to 68

1.05 8.25 22.1 -- 1.4 22 to 68

1.2 12.7 22.1 -- 1.4 22 to 68

1.8 30.1 22.1 5 to 22 2 22 to 68

2.5 49.9 22.1 5 to 22 2 22 to 68

3.3 73.2

22.1 5 t o 22 2 22 t o 68

5 124

22.1 5 t o 22 3.3 22 to 68

7 180

22.1 5 t o 22 3.3 22 to 68

PGOOD

RT2853A/B

VREG5

VCC

VIN 10µF x 2

C1 0.1µF

C2 BOOT

1.4µH

0.1µF

22µF x 2

3.3nF

C5 1µF

VOUT

1.05V/3A

22.1k

VREG5

VIN

13, 14

9, 10, 11

VS 8.25k

7, 8, 17 (Exposed Pad)

GND

4PGND

Input Signal

Output Signal R3 100k

VREG5

RT2853A/B

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Design Procedure

Inductor Selection

Selecting an inductor involves specifying its inductance

and also its required peak current. The exact inductor value

is generally flexible and is ultimately chosen to obtain the

best mix of cost, physical size, and circuit efficiency.

Lower inductor values benefit from reduced size and cost

and they can improve the circuit's transient response, but

they increa se the inductor ripple current and output voltage

ripple a nd reduce the efficiency due to the resulting higher

peak currents. Conversely, higher inductor values increase

eff iciency , but the inductor will either be physically larger

or have higher resistance since more turns of wire are

required and transient response will be slower since more

time is required to change current (up or down) in the

inductor. A good compromise between size, efficiency,

and transient response is to use a ripple current (∆IL) about

20-50% of the desired full output load current. Calculate

the a pproximate inductor value by selecting the input and

output voltages, the switching frequency (fSW), the

maximum output current (IOUT(MAX)) a nd e sti mating a ∆IL

as some percentage of that current.

()

×−

××∆

OUT IN OUT

IN SW L

VVV

= Vf I

Once an inductor value is chosen, the ripple current (∆IL)

is calculated to determine the required peak inductor

current.

()

×− ∆

∆+

××

OUT IN OUT

L L(PEAK) OUT(MAX)

IN SW

VVV

I = and I = I

Vf L 2

To guarantee the required output current, the inductor

needs a saturation current rating and a thermal rating that

exceeds IL(PEAK). These are minimum requirements. To

maintain control of inductor current in overload a nd short-

circuit conditions, some applications may desire current

ratings up to the current limit value. However, the IC's

output under-voltage shutdown feature make this

unnecessary f or most applications.

IL(PEAK) should not exceed the minimum value of IC's upper

current limit level or the IC may not be able to meet the

desired output current. If needed, reduce the inductor ripple

current (∆IL) to increa se the average inductor current (and

the output current) while ensuring that IL(PEAK) does not

exceed the upper current limit level.

For best efficiency, choose an inductor with a low DC

resistance that meets the cost and size requirements.

For low inductor core losses some type of ferrite core is

usually best a nd a shielded core type, although possibly

larger or more expensive, will probably give fewer EMI

a nd other noise problems.

Considering the T ypical Operating Circuit for 1.05V output

at 3A and an input voltage of 12V, using a n inductor ripple

of 1A (33%), the calculated inducta nce value is :

()

×−

××

1.05V 12V 1.05V

= = 1.47µ

12V 650kHz 1A

The ripple current was selected at 1A a nd, as long a s we

use the calculated 1.47µH inductance, that should be the

actual ripple current a mount. Typically the exact calculated

inducta nce is not rea dily available and a nearby value is

chosen. In this case 1.4µH was available and actually used

in the typical circuit. To illustrate the next calculation,

assume that for some reason is was necessary to select

a 1.8µH inductor (for example). We would then calculate

the ripple current a nd required pea k current a s below :

()

×−

∆××

L1.05V 12V 1.05V

I = = 0.82A

12V 650kHz 1.8µH

L(PEAK) 0.82

and I = 3A = 3.41A

For the 1.8µH value, the inductor's saturation and thermal

rating should exceed 3.41A. Since the a ctual value used

wa s 1.4µH and the ripple current exactly 1A, the required

peak current is 3.53A.

Input Capacitor Selection

The input filter capacitors are needed to smooth out the

switched current drawn from the input power source a nd

to reduce voltage ripple on the input. The actual

ca pacitance value is less importa nt than the RMS current

rating (and voltage rating, of course). The RMS input ripple

current (IRMS) is a function of the input voltage, output

voltage, and load current :

()

×−

OUT VIN OUT

RMS OUT VIN

VVV

= I V

Cera mic ca pa citors are most often used because of their

low cost, small size, high RMS current ratings, and robust

surge current ca pabilities. However, take care when these

RT2853A/B

16 DS2853A/B-03 January 2018www.richtek.com

capa citors are used at the input of circuits supplied by a

wall ada pter or other supply connected through long, thin

wires. Current surges through the inductive wires can

induce ringing at the RT2853A/B's input which could

potentially cause large, damaging voltage spikes VIN. If

this phenomenon is observed, some bulk input ca pacitance

may be required. Ceramic capacitors (to meet the RMS

current requirement) ca n be pla ced in parallel with other

types such a s tantalum, electrolytic, or polymer (to reduce

ringing and overshoot).

Choose capacitors rated at higher temperatures than

required. Several cera mic capa citors may be paralleled to

meet the RMS current, size, a nd height requirements of

the application. The typical operating circuit uses two 10µF

a nd one 0.1µF low ESR cera mic capa citors on the input.

Output Capacitor Selection

The RT2853A/B are optimized for ceramic output

capacitors and best performance will be obtained using

them. The total output capacitance value is usually

determined by the desired output voltage ripple level and

tra nsient respon se requirements for sag (undershoot on

positive load steps) and soar (overshoot on negative load

steps).

Output Ripple

Output ripple at the switching frequency is caused by the

inductor current ripple and its effect on the output

capacitor's ESR and stored charge. These two ripple

components are called ESR ripple a nd capa citive ri pple.

Since ceramic capacitors have extremely low ESR and

relatively little capa cita nce, both components are similar

in amplitude and both should be considered if ripple is

critical. +

RIPPLE RIPPLE(ESR) RIPPLE(C)

V = V V

∆×

RIPPLE(ESR) L ESR

V = IR

∆

××

RIPPLE(C)

OUT SW

V =

8C f

For the T ypical Operating Circuit for 1.05V output a nd an

inductor ripple of 1A, with 2 x 22µF output capacitance

each with about 10mΩ ESR including PCB trace

resista nce, the output voltage ripple components are :

×Ω

RIPPLE(ESR)

V = 1A 5m = 5mV

××

RIPPLE(C) 1A

V= = 4.4mV

844µF0.65MHz

RIPPLE

V = 5mV 4.4mV = 9.4mV

Output T ransient Undershoot a nd Overshoot

In addition to voltage ripple at the switching frequency,

the output capacitor and its ESR also affect the voltage

sag (undershoot) and soar (overshoot) when the load steps

up and down abruptly. The ACOT transient response is

very quick and output transients are usually small.

However, the combination of small ceramic output

capacitors (with little capacitance), low output voltages

(with little stored charge in the output capacitors), and

low duty cycle a pplications (which require high inductance

to get rea sonable ripple currents with high input voltages)

increases the size of voltage variations in response to

very quick load changes. Typically, load changes occur

slowly with respect to the IC's 650kHz switching frequency .

But some modern digital loads can exhibit nearly

instantaneous load changes and the following section

shows how to calculate the worst-ca se voltage swings in

response to very fast load steps.

The output voltage transient undershoot and overshoot each

have two components : the voltage steps caused by the

output ca pacitor's ESR, and the voltage sag and soar due

to the finite output capacitance and the inductor current

slew rate. Use the following f ormula s to check if the ESR

is low enough (typically not a problem with ceramic

ca pacitors) a nd the output capa citance is large enough to

prevent excessive sag and soar on very fast load step

edges, with the chosen inductor value.

The a mplitude of the ESR step up or down is a function of

the load step and the ESR of the output ca pacitor:

∆×

ESR_STEP OUT ESR

V = IR

The amplitude of the capacitive sag is a function of the

load step, the output capa citor value, the inductor value,

the input-to-output voltage differential, and the maximum

duty cycle. The maximum duty cycle during a fa st transient

is a function of the on-time a nd the minimum off-time since

the ACOTTM control scheme will ramp the current using

on-tim es spaced apart with minimum of f-ti m es, which is

RT2853A/B

DS2853A/B-03 January 2018 www.richtek.com

as fast as allowed. Calculate the approximate on-time

(neglecting para sitics) and maximum duty cycle for a given

input a nd output voltage a s :

×+

OUT ON

ON MAX

IN SW ON OFF(MIN)

t = and D =

Vf t t

The actual on-time will be slightly longer as the IC

compensates f or voltage drops in the circuit, but we ca n

neglect both of these since the on-time increase

compensates for the voltage losses. Calculate the output

voltage sag a s :

()

×∆

×× ×−

OUT

SAG

OUT IN(MIN) MAX OUT

L(I )

2C V D V

The amplitude of the capacitive soar is a function of the

load step, the output capacitor value, the inductor value

and the output voltage :

×∆

××

OUT

SOAR

OUT OUT

L(I )

2C V

For the Typical Operating Circuit for 1.05V output, the

circuit has an inductor 1.4µH and 2 x 22µF output

capacitance with 5mΩ ESR each. The ESR step is 3A x

2.5mΩ = 7.5mV which is small, as expected. The output

voltage sag and soar in response to full 0A-3A-0A

insta nta neous tran sients are :

()

×××−

SAG 1.4µH(3A)

V = = 47mV

244µF 12V 0.34 1.05V

ON 1.05V

t = = 135ns

12V 650kHz

××

SOAR 1.4µH(3A)

V = = 136mV

244µF1.05V

The sag is about 4% of the output voltage a nd the soar is

a full 13% of the output voltage. The ESR step is negligible

here but it does partially add to the soar, so keep that in

mind whenever using higher-ESR output ca pacitors.

The soar is typically much worse than the sag in high-

input, low-output step-down converters because the high

input voltage dema nds a large inductor value which stores

lots of energy that is all transferred into the output if the

load stops drawing current. Also, for a given inductor , the

soar for a low output voltage is a greater voltage cha nge

MAX 135ns

and D = = 0.34

135ns 260ns

and an even greater percentage of the output voltage. This

is illustrated by comparing the previous to the next

example.

The Typical Operating Circuit for 12V to 3.3V with a 2µH

inductor and 2 x 22µF output ca pa citance can be used to

illustrate the effect of a higher output voltage. The output

voltage sag and soar in response to full 0A-3A-0A

insta nta neous tra nsients are calculated as follows :

ON 3.3V

t = = 423ns

12V 650kHz

MAX 423ns

and D = = 0.62

423ns 260ns

()

×××−

SAG 2µH(3A)

V = = 49.5mV

244µF 12V 0.62 3.3V

××

SOAR 2µH(3A)

V = = 62mV

2 44µF3.3V

In this case the sag is about 1.5% of the output voltage

a nd the soar is only 2% of the output voltage.

Any sag is always short-lived, since the circuit quickly

sources current to regain regulation in only a few switching

cycles. With the RT2853B, any overshoot transient is

typically also short-lived since the converter will sink

current, reversing the inductor current sharply until the

output reaches regulation again. The RT2853A's

discontinuous operation at light loads prevents sinking

current so, for that IC, the output voltage will soar until

load current or lea kage brings the voltage down to normal.

Most applications never experience instantaneous full load

steps and the RT2853A/B's high switching frequency a nd

fast transient response can easily control voltage regulation

at all times. Also, since the sag and soar both are

proportional to the square of the load change, if load steps

were reduced to 1A (from the 3A exa mples preceding) the

voltage cha nges would be reduced by a fa ctor of almost

ten. For these rea sons sag and soar are seldom a n issue

except in very low-voltage CPU core or DDR memory

supply a pplications, particularly for devices with high clock

frequencies and quick changes into and out of sleep

modes. In such a pplications, simply increa sing the amount

of ceramic output capacitor (sag and soar are directly

proportional to capacitance) or adding extra bulk

capacitance can easily eliminate any excessive voltage

transients.

RT2853A/B

18 DS2853A/B-03 January 2018www.richtek.com

In any application with large quick transients, always

calculate soar to ma ke sure that over-voltage protection

will not be triggered. U nder-voltage is not likely since the

threshold is very low (70%), that function ha s a long delay

(250µs), and the IC will quickly return the output to

regulation. Over-voltage protection has a minimum

threshold of 1 15% and short delay of 5µs and can actually

be triggered by incorrect component choices, particularly

for the RT2853A which does not sink current.

Output Capacitors Stability Criteria

The RT2853A/B's ACOTTM control architecture uses an

internal virtual inductor current ramp and other

compensation that ensures sta bility with a ny reasonable

output capacitor. The internal ramp allows the IC to operate

with very low ESR capacitors and the IC is stable with

very small capacitances. Therefore, output capacitor

selection is nearly always a matter of meeting output

voltage ripple and transient response requirements, as

discussed in the previous sections. For the sake of the

unusual application where ripple voltage is unimportant

and there are few tra nsients (perha ps battery charging or

LED lighting) the stability criteria are discussed below.

The equations giving the mini mum required ca pacitance

for stable operation include a term that depends on the

output capacitor's ESR. The higher the ESR, the lower

the capacitance can be and still ensure stability. The

equations can be greatly simplified if the ESR term is

removed by setting ESR to zero. The resulting equation

gives the worst-ca se mini mum required ca pa cita nce and

it is usually sufficiently small that there is usually no need

for the more exa ct equation.

The required output capacitance (COUT) is a function of

the inductor value (L) a nd the input voltage (VIN) :

−

≥×

OUT IN

5.23 10

The worst-case high capacitance requirement is for low

VIN and small inductance, so a 5V to 3.3V converter is

used for a n exa mple. Using the inducta nce equation in a

previous section to determine the required inducta nce :

()

×−

××

3.3V 5V 3.3V

= = 1.73µ

5V 650kHz 1A

−

≥×

OUT 5.23 10

= 6µ

5V 1.73µH

Therefore, the required mini mum capa cita nce f or the 5V

to 3.3V converter is :

−

≥×

OUT 5.24 10

= 3.1µ

12V 1.4µH

Using the 12V to 1.05V typical application as another

example :

≥××× + ××

OUT

SW IN ESR OUT

2 f V (R 13647 L V )

Any ESR in the output capacitor lowers the required

minimum output capacitance, sometimes considerably.

For the rare a pplication where that is needed a nd useful,

the equation including ESR is given here :

As ca n be seen, setting RESR to zero a nd si mplifying the

equation yields the previous simpler equation. To allow

for the capacitor's temperature and bias voltage coefficients,

use at lea st double the calculated ca pa citance a nd use a

good quality dielectric such as X5R or X7R with an

adequate voltage rating since ceramic ca p acitors exhibit

considera ble capa citance reduction as their bi as voltage

increases.

Feed-forward Capacitor (C3)

The RT2853A/B are optimized for ceramic output

capacitors and for low duty cycle applications. This

optimization makes circuit stability easy to achieve with

reasona ble output ca pa citors. However , the optimization

affects the quality fa ctor (Q) of the circuit and therefore its

transient response. To avoid an under-da mped response

(high Q) and its potential ringing, the internal compensation

was chosen to achieve perfect damping for low output

voltages, where the FB divider ha s low attenuation (VOUT

is close to VREF). For high-output voltages, with high

feedback attenuation, the circuit's response becomes over-

damped and transient response can be slowed. In high-

output voltage circuits (VOUT > 1.5V) transient response

is improved by adding a small “feed-forward” capacitor

(C3) a cross the upper FB divider resistor, to increa se the

circuit's Q a nd reduce da mping to speed up the tran sient

response without affecting the steady-state stability of

the circuit. Choose a ca pa citor value that gives, together

with the divider impedance at FB, a time-constant between

100ns and 0.5µs. The divider impedance at FB is R1 in

parallel with R2. C3 can be safely left out in low-output

voltage circuits and if fast transient response is not required.

RT2853A/B

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Applications Information

Current-Sinking Applications (RT2853B)

The RT2853B's is not recommended for current sinking

applications even though its continuous switching

operation allows the IC to sink some current. Sinking

enables a fast recovery from output voltage overshoot

caused by load transients and is normally useful for

a pplications requiring negative currents, such a s DDR VTT

bus termination a pplications and changing-output voltage

applications where the output voltage needs to slew

quickly from one voltage to another. However, the IC's

negative current limit is set low (about 1.6A) and the current

limit behavior latches the synchronous rectifier off until

the high-side switch's next pulse, to prevent the possibility

of IC damage from large negative currents. Therefore,

sinking current is not necessarily available at all times.

If implementing applications where current-sinking may

occur, take care to allow for the current that is delivered

to the input supply. A step-down converter in sinking

operation functions like a backwards step-up converter.

The current that is sunk at its output terminals is delivered

up to its input terminals. If this current has no outlet, the

input voltage will rise.

A good arrangement for long-term sinking a pplications is

for a sinking supply (supply A) that is sinking current

sourced from supply B, to both be powered by the same

input supply. That way, any current delivered ba ck to the

input by supply A is current that just left the input through

supply B. In this way, the current simply makes a round

trip and the input supply will not rise.

In ca se s where this is not possible, make sure that there

are sufficient other loads on the input supply to prevent

that supply's voltage from rising high enough to cause

damage to itself or any of its loads. In cases where the

sinking is not long-term, such as output-voltage slewing

a pplications, make sure there is sufficient input ca pacitance

to control a ny input voltage rise. The worst-case voltage

rise is : ×∆

∆

OUT OUT

IN IN

V = C

Soft-Start (SS)

The RT2853A/B soft-start uses an external capacitor at

SS to adjust the soft-start timing according to the following

equation : ×

SS SS

C (nF) 1.065V

t(ms) = I (µA)

The available ca pacitance ra nge is from 2.7nF to 220nF . If

a 3.9nF capacitor is used, the typical soft-start will be

2ms. Do not leave SS unconnected.

Enable Operation (EN)

For automatic start-up the high-voltage EN pin can be

connected to VIN, either directly or through a 100kΩ

resistor. Its large hysteresis band makes EN useful for

simple delay and timing circuits. EN can be externally

pulled to VIN by adding a resistor-capacitor delay (REN

and CEN in Figure 1). Calculate the delay time using EN's

internal threshold where switching operation begins (1.4V,

typical).

An external MOSFET ca n be added to i mplement digital

control of EN when no system voltage above 2V is available

(Figure 2). In this case, a 100kΩ pull-up resistor , REN, is

connected between VIN and the EN pin. MOSFET Q1 will

be under logic control to pull down the EN pin. To prevent

ena bling circuit when VIN is smaller tha n the VOUT target

value or some other desired voltage level, a resistive voltage

divider can be placed between the input voltage and ground

a nd connected to EN to create an additional input under-

voltage lockout threshold (Figure 3).

Figure 1. External Timing Control

Figure 2. Digital Ena ble Control Circuit

RT2853A/B

GND

IN REN

CEN

RT2853A/B

GND

100k

VIN

REN

nable

RT2853A/B

20 DS2853A/B-03 January 2018www.richtek.com

Figure 3. Resistor Divider for Lockout Threshold Setting

Output Voltage Setting

Set the desired output voltage using a resistive divider

from the output to ground with the midpoint connected to

FB. The output voltage is set according to the following

equation :

)

OUT

V = 0.765 (1

×+

Figure 4. Output Voltage Setting

Pla ce the FB resistors within 5mm of the FB pin. Choose

R2 between 10kΩ and 100kΩ to minimize power

consumption without excessive noise pick-up and

calculate R1 as follows :

×−

OUT

R2 (V 0.765V)

1 = 0.765V

For output voltage accuracy , use divider resistors with 1%

or better tolerance.

Under Voltage Lockout Protection

The RT2853A/B feature an under-voltage lock-out (UVLO)

function that monitors the internal linear regulator output

(VREG5) a nd prevents operation if VREG5 is too low. In

some multiple input voltage applications, it may be

desirable to use a power input that is too low to allow

VREG5 to exceed the UVLO threshold. In this case, if

there is another low-power supply available that is high

enough to operate the VREG5 regulator , connecting that

supply to VCC will allow the IC to operate, using the lower-

voltage high-power supply for the DC/DC power path.

Because of the internal linear regulator, any supply

regulated or unregulated) between 4.5V and 18V will

operate the IC.

Extern al BOOT Bootstrap Diode

When the input voltage is lower than 5.5V it is

recommended to add an external bootstrap diode between

VIN (or VCC) and the BOOT pin to improve enhancement

of the internal MOSFET switch and improve efficiency.

The bootstrap diode can be a low cost one such a s 1N4148

or BA T54.

Figure 5. External Bootstra p Diode

External BOOT Capacitor Series Resistance

The internal power MOSFET switch gate driver is

optimized to turn the switch on fa st enough for low power

loss and good efficiency , but also slow enough to reduce

EMI. Switch turn-on is when most EMI occurs since VSW

rises rapidly. During switch turn-of, SW is discharged

relatively slowly by the inductor current during the dead-

time between high-side a nd low-switch on-tim es.

In some ca ses it is desirable to reduce EMI further , at the

expense of some additional power dissipation. The switch

turn-on can be slowed by placing a small (<10Ω)

resistance between BOOT and the external bootstrap

capa citor . This will slow the high-side switch turn-on an d

VSW's rise. To remove the resistor from the capacitor

charging path (avoiding poor enhancement due to under-

charging the BOOT capacitor), use the external diode

shown in Figure 5 to charge the BOOT ca pacitor and place

the resistance between BOOT and the capacitor/diode

connection.

VREG5 Capacitor Selection

Decouple VREG5 to PGND with a 1µF cera mic ca pacitor.

High grade dielectric (X7R, or X5R) ceramic capacitors

are recommended for their stable temperature and bias

voltage characteristics.

RT2853A/B

GND

IN REN1

REN2

GND

VOUT

RT2853A/B

BOOT

0.1µ

RT2853A/B

DS2853A/B-03 January 2018 www.richtek.com

Figure 6. Derating Curve of Maximum Power Dissipation

Thermal Considerations

For continuous operation, do not exceed absolute

maximum junction temperature. The maximum power

dissipation depends on the thermal resistance of the IC

package, PCB layout, rate of surrounding airflow, and

difference between junction and a mbient temperature. The

maximum power dissipation can be calculated by the

following formula :

PD(MAX) = (TJ(MAX) − TA) / θJA

where TJ(MAX) is the maximum junction temperature, TA is

the a mbient temperature, and θJA is the junction to a mbient

thermal resistance.

For recommended operating condition specifications, the

maximum junction temperature is 125°C. The junction to

a mbient thermal resistance, θJA, is layout dependent. For

WQFN-16L 3x3 package, the thermal resistance, θJA, is

47.4°C/W on a sta ndard JEDEC 51-7 f our-layer thermal

test board. The maxi mum power dissipation at TA = 25°C

ca n be calculated by the f ollowing formula :

PD(MAX) = (125°C − 25°C) / (47.4°C/W) = 2.1W for

WQF N-16L 3x3 pa ckage

The maximum power dissipation depends on the operating

ambient temperature for fixed TJ(MAX) and thermal

resistance, θJA. The derating curve in Figure 6 allows the

designer to see the ef fect of rising ambient temperature

on the maximum power dissipation.

0.0

0.5

1.0

1.5

2.0

2.5

0 25 50 75 100 125

Ambient Tem perat ure (°C)

Maximum Power Dissipation (W) 1

Four-Layer PCB

Layout Considerations

Follow the PCB layout guidelines for optimal performance

of the RT2853A/B.

`Keep the tra ces of the main current paths a s short a nd

wide as possible.

`Put the input ca pacitor a s close as possible to the device

pins (VIN and PGND).

`The high-frequency switching node (SW) has large

voltage swings and fast edges and can easily radiate

noise to adjacent components. Keep its area small to

prevent excessive EMI, while providing wide copper

traces to minimize para sitic resistance and inducta nce.

Keep sensitive components away from the SW node or

provide ground traces between for shielding, to prevent

stray capa citive noise pickup.

`Connect the feedback network to the output ca pa citors

rather than the inductor. Place the feedback components

near the FB pin.

`The exposed pad, PGND, and GND should be connected

to large copper areas for heat sinking and noise

protection. Provide dedicated wide copper traces for the

power path ground between the IC and the input and

output ca p a citor grounds, rather tha n connecting ea ch

of these individually to an internal ground pla ne.

`Avoid using via s in the power path connections that have

switched currents (from CIN to PGND and CIN to VIN)

a nd the switching node (SW).

RT2853A/B

22 DS2853A/B-03 January 2018www.richtek.com

Figure 7. PCB Layout Guide

GND

VREG5 BOOT

PGOOD

PGND

VCC

VIN

13141516

8765

GND

PGND

CIN

CBOOT

VOUT

COUT

CSS

CREG5

VOUT

lace the feedback c omponents as close

o the FB as poss i ble for better regulation. Place the input capacitors as

close to t he I C as possible.

SW should be connected

to inductor by wide and

short trace. Keep sensitive

components away from thi

trace.

Place the output capacitors as

close to the IC as possible.

RT2853A/B

DS2853A/B-03 January 2018 www.richtek.com

Richtek Technology Corporation

14F, No. 8, Tai Yuen 1st Street, Chupei City

Hsinchu, Taiwan, R.O.C.

Tel: (8863)5526789

Richtek products are sold by description only. Richtek reserves the right to change the circuitry and/or specifications without notice at any time. Customers should

obtain the latest relevant information and data sheets before placing orders and should verify that such information is current and complete. Richtek cannot

assume responsibility for use of any circuitry other than circuitry entirely embodied in a Richtek product. Information furnished by Richtek is believed to be

accurate and reliable. However, no responsibility is assumed by Richtek or its subsidiaries for its use; nor for any infringements of patents or other rights of third

parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Richtek or its subsidiaries.

Outline Dimension

SEE DETAIL A

Dimensio ns In M illimeters

D im ensions I n In ches

Symbol Min Max Min Max

A 0.700 0.800 0.028 0.031

A1 0.000 0.050 0.000 0.002

A3 0.175 0.250 0.007 0.010

b 0.180 0.300 0.007 0.012

D 2.950 3.050 0.116 0.120

D2 1.300 1.750 0.051 0.069

E 2.950 3.050 0.116 0.120

E2 1.300 1.750 0.051 0.069

e 0.500 0.020

L 0.350 0.450

0.014 0.018

W-Type 16L QFN 3x3 Package

Note : The configuration of the Pin #1 identifier is optional,

but must be located within the zone indicated.

DETAIL A

Pin #1 ID a nd T ie Bar M ark Options