MAX9673
Maxim Integrated Products. All rights reserved. Page 1
RELIABILITY REPORT
FOR
MAX9673ETI+T
PLASTIC ENCAPSULATED DEVICES
April 1, 2012
MAXIM INTEGRATED PRODUCTS
120 SAN GABRIEL DR.
SUNNYVALE, CA 94086
Approved by
Richard Aburano
Quality Assura nce
Manager, Reliability Engineering
MAX9673
Maxim Integrated Products. All rights reserved. Page 2
Conclusion
The MAX9673ETI+T successfully meets the quality and reliability standards required of all Maxim products. In addition, Maxim's
continuous reliability monitoring program ensures that all outgoing product will continue to meet Maxim's quality and reliability standards.
Table of Conte n ts
I. ........Device Description V. ........Quality Assurance Information
II. ........Manufacturing Information VI. .......Reliability Evaluation
III. .......Packaging Information IV. .......Die Information
.....Attachments
I. Device Description
A. General
The MAX9672/MAX9673/MAX96 74 output 12/14/16 voltage r eferences for gamma co rrecti on in TFT LCDs and one voltage reference for VCOM. Each
gamma reference voltage has its own 10-bit DAC and buffer to ensure a stable voltage. The VCOM reference voltage has its own 10-bit DAC and an
amplifier to ensure a stable voltage when critical levels and patterns are displayed. The MAX9672/MAX9673 MAX9674 feature integrated multiple-time
programmable (MTP) memory to store gamma and VCOM values on the chip, eliminating the need for external EEPROM. The
MAX9672/MAX9673/MAX9674 support up to 300 write operations to the on-chip nonvolatile memory. The gamma outputs can drive 200mA peak
transient current and settle within 1µs. The VCOM output can provide 600mA peak transient current and also settles within 1µs. The analog supply
voltage range extends from 9V to 20V, and the digital supply voltage range extends from 2.7V to 3.6V. Gamma values and the VCOM value ar e
programmed into registers through the I²C interface.
MAX9673
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II. Manufacturing Information
A. Description/Funct ion: 10-Bit, Programmable Gamma Reference Systems with MTP for TFT LCDs
B. Process: S45
C. Number of Device Transistors: 4548
D. Fabrication Location: USA
E. Assembly Location: China, Taiwan and Thailand
F. Date of Initial Production: July 25, 2009
III. Packaging Information
A. Package Type: 28-pin TQFN 5x5
B. Lead Frame: Copper
C. Lead Finish: 100% matte Tin
D. Die Attach: Conductive
E. Bondwire: Au (1 mil dia.)
F. Mold Material: Epoxy with silica filler
G. Assembly Diagram: #05-900 0-3809
H. Flammability Rating: Class UL94-V0
I. Classification of Moisture Sensitivity per
JEDEC standard J-STD-020-C
Level 1
J. Single Layer Theta Ja: 47°C/W
K. Single Layer Theta Jc: 2°C/W
L. Multi Layer Theta Ja: 29°C/W
M. Multi Layer Theta Jc: 2°C/W
IV. Die Information
A. Dimensions: 99 X 101 mils
B. Passivation: Si3N4/SiO2 (Silicon nitride/ Silicon dioxide)
C. Interconnect: Al/0.5%Cu with Ti/TiN Barrier
D. Backside Metallization: None
E. Minimum Metal Width: Metal1 = 0.5 / Metal2 = 0.6 / Metal3 = 0.6 microns (as drawn)
F. Minimum Metal Spacing: Metal1 = 0.45 / Metal2 = 0.5 / Metal3 = 0.6 microns (as drawn)
G. Bondpad Dimensions:
H. Isolation Dielectric: SiO2
I. Die Separation Method: Wafer Saw
MAX9673
Maxim Integrated Products. All rights reserved. Page 4
V. Quality Assurance Information
A. Quality Assurance Contacts: Richard Aburano (Manager, Reliability Engineering)
Don Lipps (Manager, Reliability Engineering)
Bryan Preeshl (Vice Presiden t of QA)
B. Outgoing Inspection Level: 0.1% for all electrical parameters guaranteed by the Datasheet.
0.1% For all Visual Defects.
C. Observed Outgoing Defect Rate: < 50 ppm
D. Sampling Plan: Mil-Std-105D
VI. Reliability Evaluation
A. Accelerated Life Test
The results of the 135C biased (static) life test are shown in Table 1. Using these results, the Failure Rate ( ) is calculated as follows:
= 1 = 1.83 (Chi square value for MTTF upper limit)
MTTF 192 x 4340 x 48 x 2
(where 4340 = Temperature Acceleration factor assuming an activation energy of 0.8eV)
= 22.9 x 10-9
= 22.9 F.I.T. (60% confidence level @ 25°C)
The following failure rate represents data collected from Maxim's reliability monitor program. Maxim performs quarterly life test
monitors on its processes. This data is published in the Reliability Report found at http://www.maxim-ic.com/qa/reliability/monitor.
Cumulative monitor data for the S45 Process results in a FIT Rate of 0.06 @ 25C and 1.00 @ 55C (0.8 eV, 60% UCL)
B. E.S.D. and Latch-Up Testing
The DV26 die type has been found to have all pins able to withstand a transient pulse of:
ESD-HBM: +/- 2500V per JEDEC JESD22-A114 (lot TYXZAQ001E, D/C 0924)
ESD-CDM: +/- 750V per JEDEC JESD22-C101 (lot TYXZAQ001E, D/C 0924)
ESD-MM: +/- 250V per JEDEC JESD22-A115 (lot TYXZAQ001B, D/C 0924)
Latch-Up testing has shown that this device withstands a current of +/- 250mA and overvoltage per JEDEC JESD78 (lot
TYXZAQ001D, D/C 0924).
MAX9673
Maxim Integrated Products. All rights reserved. Page 5
Table 1
Reliability Evaluation Test Results
MAX9673ETI+T
TEST ITEM TEST CONDITION FAILURE
IDENTIFICATION SAMPLE SIZE NUMBER OF COMMENTS
FAILURES
Static Life Test (Note 1)
Ta = 135C
Biased
Time = 192 hrs.
DC Parameters 48 0 TYXZAQ001C, D/C 0923
& functionality
Note 1: Life Test Data may represent plastic DIP qualification lots.
