THS4521IDGKR - Texas Instruments - Datasheet.Directory

THS4522

THS4521

THS4524

THS4521 ADS1278 (CH1)

49.9 W

1kW49.9 W

VOCM

VIN+

VIN-

5V

VCOM

1kW

2.2nF

AINN1

AINP1

0.1 Fm

1/2

OPA2350

1.5nF

1kW

100

120

140

160

Magnitude(dBFS)

04812 16 20 24 26

Frequency(kHz)

1-kHzFFT

G=1

R =R =1k

C =1.5nF

V =5V

Load=2x49.9 +2.2nF

F G

THS4521andADS1278CombinedPerformance

Tone

(Hz)

1k

Signal

(dBFS)

0.50-

SNR(dBc)

109.1

THD(dBc)

107.9-

SINAD

(dBc)

105.5

SFDR

(dBc)

113.7

THS4521

THS4522

THS4524

www.ti.com

SBOS458F –DECEMBER 2008–REVISED SEPTEMBER 2011

VERY LOW POWER, NEGATIVE RAIL INPUT, RAIL-TO-RAIL OUTPUT,

FULLY DIFFERENTIAL AMPLIFIER

Check for Samples: THS4521,THS4522,THS4524

1FEATURES APPLICATIONS

23•Fully Differential Architecture •Low-Power SAR and ΔΣ ADC Drivers

•Bandwidth: 145 MHz •Low-Power Differential Drivers

•Slew Rate: 490 V/μs•Low-Power Differential Signal Conditioning

•HD2:–133 dBc at 10 kHz (1 VRMS, RL=1kΩ)•Low-Power, High-Performance Differential

Audio Amplifiers

•HD3:–140 dBc at 10 kHz (1 VRMS, RL=1kΩ)

•Input Voltage Noise: 4.6 nV/√Hz (f = 100 kHz) DESCRIPTION

•THD+N: –112dBc (0.00025%) at 1 kHz (22-kHz The THS4521, THS4522, and THS4524 family of

BW,G=1,5VPP)devices are very low-power, fully differential op amps

•Open-Loop Gain: 119 dB with rail-to-rail output and an input common-mode

range that includes the negative rail. These amplifiers

•NRI—Negative Rail Input are designed for low-power data acquisition systems

•RRO—Rail-to-Rail Output and high-density applications where power

•Output Common-Mode Control (with Low dissipation is a critical parameter, and provide

Offset and Drift) exceptional performance in audio applications.

•Power Supply: The family includes single (THS4521), dual

–Voltage: +2.5 V (±1.25 V) to +5.5 V (±2.75 V) (THS4522), and quad (THS4524) versions.

–Current: 1.14 mA/ch These fully differential op amps feature accurate

•Power-Down Capability: 20 μA (typ) output common-mode control that allows for

dc-coupling when driving analog-to-digital converters

(ADCs). This control, coupled with an input

common-mode range below the negative rail as well

as rail-to-rail output, allows for easy interfacing

between single-ended, ground-referenced signal

sources. Additionally, these devices are ideally suited

for driving both successive-approximation register

(SAR) and delta-sigma (ΔΣ) ADCs using only a single

+2.5V to +5V and ground power supply.

The THS4521, THS4522, and THS4524 family of fully

differential op amps is characterized for operation

over the full industrial temperature range from –40°C

to +85°C.

PRODUCTS

THD

(dBc)

BW at 100 VNRAIL-

DEVICE (MHz) IQ(mA) kHz (nV/√Hz) TO-RAIL

THS4520 570 15.3 –114 2 Out

THS4121 100 16 –79 5.4 In/Out

THS4130 150 16 –107 1.3 No

1Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas

Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

2I2S is a trademark of NXP Semiconductor.

3All other trademarks are the property of their respective owners.

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

THS4521

THS4522

THS4524

SBOS458F –DECEMBER 2008–REVISED SEPTEMBER 2011

www.ti.com

This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with

appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.

ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more

susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.

PACKAGE/ORDERING INFORMATION(1)

SPECIFIED

PACKAGE- PACKAGE TEMPERATURE PACKAGE ORDERING TRANSPORT MEDIA,

PRODUCT LEAD DESIGNATOR RANGE MARKING NUMBER QUANTITY

THS4521ID Rails, 75

SOIC-8 D TH4521 THS4521IDR Tape and reel, 2500

THS4521 –40°C to +85°CTHS4521IDGKT Tape and reel, 250

MSOP-8 DGK 4521 THS4521IDGKR Tape and reel, 2500

THS4522IPW Rails, 90

THS4522 TSSOP-16 PW –40°C to +85°C THS4522 THS4522IPWR Tape and reel, 2000

THS4524IDBT Rails, 50

THS4524 TSSOP-38 DBT –40°C to +85°C THS4524 THS4524IDBTR Tape and reel, 2000

(1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the

relevant product folders at www.ti.com.

ABSOLUTE MAXIMUM RATINGS(1)

Over operating free-air temperature range (unless otherwise noted). THS4521, THS4522. THS4524 UNIT

Supply Voltage, VS–to VS+ 5.5 V

Input/Output Voltage, VI(VIN±, VOUT±, VOCM pins) (VS–)–0.7 to (VS+) + 0.7V V

Differential Input Voltage, VID 1 V

Output Current, IO100 mA

Input Current, II(VIN±, VOCM pins) 10 mA

Continuous Power Dissipation See Thermal Characteristic Specifications

Maximum Junction Temperature, TJ+150 °C

Maximum Junction Temperature, TJ(continuous operation, long-term reliability) +125 °C

Operating Free-air Temperature Range, TA–40 to +85 °C

Storage Temperature Range, TSTG –65 to +150 °C

Human Body Model (HBM) 1300 V

ESD Charge Device Model (CDM) 1000 V

Rating: Machine Model (MM) 50 V

(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings

only, and functional operation of the device at these or any other conditions beyond those indicated is not implied. Exposure to

absolute-maximum-rated conditions for extended periods may affect device reliability.

Product Folder Link(s): THS4521 THS4522 THS4524

THS4521

THS4522

THS4524

www.ti.com

SBOS458F –DECEMBER 2008–REVISED SEPTEMBER 2011

ELECTRICAL CHARACTERISTICS: VS+ –VS–= 3.3 V

At VS+ = +3.3 V, VS–= 0 V, VOCM = open, VOUT = 2 VPP (differential), RL= 1 kΩdifferential, G = 1 V/V, single-ended input,

differential output, and input and output referenced to midsupply, unless otherwise noted.

THS4521, THS4522, THS4524 TEST

PARAMETER CONDITIONS MIN TYP MAX UNIT LEVEL(1)

AC PERFORMANCE

Small-Signal Bandwidth VOUT = 100 mVPP, G = 1 135 MHz C

VOUT = 100 mVPP, G = 2 49 MHz C

VOUT = 100 mVPP, G = 5 18.6 MHz C

VOUT = 100 mVPP, G = 10 9.3 MHz C

Gain Bandwidth Product VOUT = 100 mVPP, G = 10 93 MHz C

Large-Signal Bandwidth VOUT = 2 VPP, G = 1 95 MHz C

Bandwidth for 0.1-dB Flatness VOUT = 2 VPP, G = 1 20 MHz C

Rising Slew Rate (Differential) VOUT = 2-V Step, G = 1, RL= 200 Ω420 V/μs C

Falling Slew Rate (Differential) VOUT = 2-V Step, G = 1, RL= 200 Ω460 V/μs C

Overshoot VOUT = 2-V Step, G = 1, RL= 200 Ω1.2 % C

Undershoot VOUT = 2-V Step, G = 1, RL= 200 Ω2.1 % C

Rise Time VOUT = 2-V Step, G = 1, RL= 200 Ω4 ns C

Fall Time VOUT = 2-V Step, G = 1, RL= 200 Ω3.5 ns C

Settling Time to 1% VOUT = 2-V Step, G = 1, RL= 200 Ω13 ns C

Harmonic Distortion

f = 1 kHz, VOUT = 1 VRMS, G = 1(2),

2nd harmonic –122 dBc C

differential input

f = 1 MHz, VOUT = 2 VPP, G = 1 –85 dBc C

f = 1 kHz, VOUT = 1 VRMS, G = 1(2),

3rd harmonic –141 dBc C

differential input

f = 1 MHz, VOUT = 2 VPP, G = 1 –90 dBc C

Two-tone, f1= 2 MHz, f2= 2.2 MHz,

Second-Order Intermodulation Distortion –83 dBc C

VOUT = 2-VPP envelope

Two-tone, f1= 2 MHz, f2= 2.2 MHz,

Third-Order Intermodulation Distortion –90 dBc C

VOUT = 2-VPP envelope

Input Voltage Noise f >10 kHz 4.6 nV/√Hz C

Input Current Noise f >100 kHz 0.6 pA/√Hz C

Overdrive Recovery Time Overdrive = ±0.5 V 80 ns C

Output Balance Error VOUT = 100 mV, f ≤2 MHz (differential input) –57 dB C

Closed-Loop Output Impedance f = 1 MHz (differential) 0.3 ΩC

Channel-to-Channel Crosstalk (THS4522, f = 10 kHz, measured differentially –125 dB C

THS4524)

DC PERFORMANCE

Open-Loop Voltage Gain (AOL) 100 116 dB A

Input-Referred Offset Voltage TA= +25°C±0.2 ±2 mV A

TA=–40°C to +85°C±0.5 ±3.5 mV B

Input offset voltage drift(3) TA=–40°C to +85°C±2μV/°C C

Input Bias Current TA= +25°C 0.65 0.85 μA B

TA=–40°C to +85°C 0.75 0.95 μA B

Input bias current drift(3) TA=–40°C to +85°C±1.75 ±2 nA/°C B

Input Offset Current TA= +25°C±30 ±180 nA B

TA=–40°C to +85°C±30 ±215 nA B

Input offset current drift(3) TA=–40°C to +85°C±100 ±600 pA/°C B

(1) Test levels: (A) 100% tested at +25°C. Over temperature limits set by characterization and simulation. (B) Limits set by characterization

and simulation. (C) Typical value only for information.

(2) Not directly measureable; calculated using noise gain of 101 as described in the Applications section, Audio Performance.

(3) Input Offset Voltage Drift, Input Bias Current Drift, and Input Offset Current Drift are average values calculated by taking data at –40°C

and +85°C, computing the difference, and dividing by 125.

Product Folder Link(s): THS4521 THS4522 THS4524

THS4521

THS4522

THS4524

SBOS458F –DECEMBER 2008–REVISED SEPTEMBER 2011

www.ti.com

ELECTRICAL CHARACTERISTICS: VS+ –VS–= 3.3 V (continued)

At VS+ = +3.3 V, VS–= 0 V, VOCM = open, VOUT = 2 VPP (differential), RL= 1 kΩdifferential, G = 1 V/V, single-ended input,

differential output, and input and output referenced to midsupply, unless otherwise noted.

THS4521, THS4522, THS4524 TEST

PARAMETER CONDITIONS MIN TYP MAX UNIT LEVEL(1)

INPUT

Common-Mode Input Voltage Low TA= +25°C–0.2 –0.1 V A

TA=–40°C to +85°C–0.1 0 V B

Common-Mode Input Voltage High TA= +25°C 1.9 2 V A

TA=–40°C to +85°C 1.8 1.9 V B

Common-Mode Rejection Ratio (CMRR) 80 100 dB A

Input Resistance 110∥1.5 kΩ∥pF C

OUTPUT

Output Voltage Low TA= +25°C 0.08 0.15 V A

TA=–40°C to +85°C 0.09 0.2 V B

Output Voltage High TA= +25°C 3.0 3.1 V A

TA=–40°C to +85°C 2.95 3.05 V B

Output Current Drive (for linear operation) RL= 50 Ω ±35 mA C

POWER SUPPLY

Specified Operating Voltage 2.5 5.5 V B

Quiescent Operating Current, per channel TA= +25°C 0.9 1.0 1.2 mA A

TA=–40°C to +85°C 0.85 1.0 1.25 mA B

Power-Supply Rejection Ratio (±PSRR) 80 100 dB A

POWER DOWN

Enable Voltage Threshold Assured on above 2.1 V 1.6 2.1 V A

Disable Voltage Threshold Assured off below 0.7 V 0.7 1.6 V A

Disable Pin Bias Current 1 μA C

Power Down Quiescent Current 10 μA C

Time to VOUT = 90% of final value, VIN= 2 V,

Turn-On Time Delay 108 ns B

RL= 200 Ω

Time to VOUT = 10% of original value, VIN= 2

Turn-Off Time Delay 88 ns B

V, RL= 200 Ω

VOCM VOLTAGE CONTROL

Small-Signal Bandwidth 23 MHz C

Slew Rate 55 V/μs C

Gain 0.98 0.99 1.02 V/V A

Measured at VOUT with VOCM input driven,

Common-Mode Offset Voltage from VOCM Input ±2.5 ±4 mV B

VOCM = 1.65 V ±0.5 V

Input Bias Current VOCM = 1.65 V ±0.5 V ±5±8μA B

VOCM Voltage Range 1 0.8 to 2.5 2.3 V A

Input Impedance 72∥1.5 kΩ∥pF C

Default Output Common-Mode Voltage Offset from Measured at VOUT with VOCM input open ±1.5 ±5 mV A

(VS+–VS–)/2

THERMAL CHARACTERISTICS

Specified Operating Range, All Packages –40 to +85 °C C

Thermal Resistance, θJA Junction-to-ambient

THS4521 D SO-8 194 °C/W C

DGK MSOP-8 269 °C/W C

THS4522 PW TSSOP-16 116 °C/W C

THS4524 DBT TSSOP-38 81 °C/W C

Product Folder Link(s): THS4521 THS4522 THS4524

THS4521

THS4522

THS4524

www.ti.com

SBOS458F –DECEMBER 2008–REVISED SEPTEMBER 2011

ELECTRICAL CHARACTERISTICS: VS+ –VS–= 5 V

At VS+ = +5 V, VS–= 0 V, VOCM = open, VOUT = 2 VPP (differential), RF= 1 kΩ, RL= 1 kΩdifferential, G = 1 V/V, single-ended

input, differential output, input and output referenced to midsupply, unless otherwise noted.

THS4521, THS4522, THS4524 TEST

PARAMETER CONDITIONS MIN TYP MAX UNIT LEVEL(1)

AC PERFORMANCE

Small-Signal Bandwidth VOUT = 100 mVPP, G = 1 145 MHz C

VOUT = 100 mVPP, G = 2 50 MHz C

VOUT = 100 mVPP, G = 5 20 MHz C

VOUT = 100 mVPP, G = 10 9.5 MHz C

Gain Bandwidth Product VOUT = 100 mVPP, G = 10 95 MHz C

Large-Signal Bandwidth VOUT = 2 VPP, G = 1 145 MHz C

Bandwidth for 0.1-dB Flatness VOUT = 2 VPP, G = 1 30 MHz C

Rising Slew Rate (Differential) VOUT = 2-V Step, G = 1, RL= 200 Ω490 V/μs C

Falling Slew Rate (Differential) VOUT = 2-V Step, G = 1, RL= 200 Ω600 V/μs C

Overshoot VOUT = 2-V Step, G = 1, RL= 200 Ω1 % C

Undershoot VOUT = 2-V Step, G = 1, RL= 200 Ω2.6 % C

Rise Time VOUT = 2-V Step, G = 1, RL= 200 Ω3.4 ns C

Fall Time VOUT = 2-V Step, G = 1, RL= 200 Ω3 ns C

Settling Time to 1% VOUT = 2-V Step, G = 1, RL= 200 Ω10 ns C

Harmonic Distortion

f = 1 kHz, VOUT = 1 VRMS, G = 1(2),

2nd harmonic –122 dBc C

differential input

f = 1 MHz, VOUT = 2 VPP, G = 1 –85 dBc C

f = 1 kHz, VOUT = 1 VRMS, G = 1(2),

3rd harmonic –141 dBc C

differential input

f = 1 MHz, VOUT = 2 VPP, G = 1 –91 dBc C

Two-tone, f1= 2 MHz, f2= 2.2 MHz,

Second-Order Intermodulation Distortion –86 dBc C

VOUT = 2-VPP envelope

Two-tone, f1= 2 MHz, f2= 2.2 MHz,

Third-Order Intermodulation Distortion –93 dBc C

VOUT = 2-VPP envelope

Input Voltage Noise f >10 kHz 4.6 nV/√Hz C

Input Current Noise f >100 kHz 0.6 pA/√Hz C

VOUT = 5 VPP, 20 Hz to 22 kHz BW,

SNR 114 dBc C

differential input

f = 1 kHz , VOUT = 5 VPP, 20 Hz to 22 kHz

THD+N 112 dBc C

BW, differential input

Overdrive Recovery Time Overdrive = ±0.5 V 75 ns C

Output Balance Error VOUT = 100 mV, f <2 MHz, VIN differential –57 dB C

Closed-Loop Output Impedance f = 1 MHz (differential) 0.3 ΩC

Channel-to-Channel Crosstalk (THS4522. THS4524) f = 10 kHz, measured differentially –125 dB C

DC PERFORMANCE

Open-Loop Voltage Gain (AOL) 100 119 dB A

Input-Referred Offset Voltage TA= +25°C±0.24 ±2 mV A

TA=–40°C to +85°C±0.5 ±3.5 mV B

Input offset voltage drift(3) TA=–40°C to +85°C±2μV/°C C

Input Bias Current TA= +25°C 0.7 0.9 μA B

TA=–40°C to +85°C 0.9 1.1 μA B

Input bias current drift(3) TA=–40°C to +85°C±1.8 ±2.2 nA/°C B

(1) Test levels: (A) 100% tested at +25°C. Over temperature limits set by characterization and simulation. (B) Limits set by characterization

and simulation. (C) Typical value only for information.

(2) Not directly measureable; calculated using noise gain of 101 as described in the Applications section, Audio Performance.

(3) Input Offset Voltage Drift, Input Bias Current Drift, and Input Offset Current Drift are average values calculated by taking data at –40°C

and +85°C, computing the difference, and dividing by 125.

Product Folder Link(s): THS4521 THS4522 THS4524

THS4521

THS4522

THS4524

SBOS458F –DECEMBER 2008–REVISED SEPTEMBER 2011

www.ti.com

ELECTRICAL CHARACTERISTICS: VS+ –VS–= 5 V (continued)

At VS+ = +5 V, VS–= 0 V, VOCM = open, VOUT = 2 VPP (differential), RF= 1 kΩ, RL= 1 kΩdifferential, G = 1 V/V, single-ended

input, differential output, input and output referenced to midsupply, unless otherwise noted.

THS4521, THS4522, THS4524 TEST

PARAMETER CONDITIONS MIN TYP MAX UNIT LEVEL(1)

Input Offset Current TA= +25°C±30 ±180 nA B

TA=–40°C to +85°C±30 ±215 nA B

Input offset current drift(4) TA=–40°C to +85°C±100 ±600 pA/°C B

INPUT

Common-Mode Input Voltage Low TA= +25°C–0.2 –0.1 V A

TA=–40°C to +85°C–0.1 0 V B

Common-Mode Input Voltage High TA= +25°C 3.6 3.7 V A

TA=–40°C to +85°C 3.5 3.6 V B

Common-Mode Rejection Ratio (CMRR) 80 102 dB A

Input Impedance 100∥0.7 kΩ∥pF C

OUTPUT

Output Voltage Low TA= +25°C 0.10 0.15 V A

TA=–40°C to +85°C 0.115 0.2 V B

Output Voltage High TA= +25°C 4.7 4.75 V A

TA=–40°C to +85°C 4.65 4.7 V B

Output Current Drive (for linear operation) RL= 50 Ω ±55 mA C

POWER SUPPLY

Specified Operating Voltage 2.5 5.5 V B

Quiescent Operating Current, per channel TA= +25°C 0.95 1.14 1.25 mA A

TA=–40°C to +85°C 0.9 1.15 1.3 mA B

Power-Supply Rejection Ratio (±PSRR) 80 100 dB A

POWER DOWN

Enable Voltage Threshold Ensured on above 2.1 V 1.6 2.1 V A

Disable Voltage Threshold Ensured off below 0.7 V 0.7 1.6 V A

Disable Pin Bias Current 1 μA C

Power Down Quiescent Current 20 μA C

Time to VOUT = 90% of final value,

Turn-On Time Delay 70 ns B

VIN= 2 V, RL= 200 Ω

Time to VOUT = 10% of original value,

Turn-Off Time Delay 60 ns B

VIN= 2 V, RL= 200 Ω

VOCM VOLTAGE CONTROL

Small-Signal Bandwidth 23 MHz C

Slew Rate 55 V/μs C

Gain 0.98 0.99 1.02 V/V A

Measured at VOUT with VOCM input driven,

Common-Mode Offset Voltage from VOCM Input ±5±9 mV B

VOCM = 2.5V ±1 V

Input Bias Current VOCM = 2.5V ±1 V ±20 ±25 μA B

VOCM Voltage Range 1 0.8 to 4.2 4 V A

Input Impedance 46∥1.5 kΩ∥pF C

Default Output Common-Mode Voltage Offset from Measured at VOUT with VOCM input open ±1±5 mV A

(VS+–VS–)/2

THERMAL CHARACTERISTICS

Specified Operating Range All Packages –40 +85 °C C

Thermal Resistance, θJA Junction-to-ambient

THS4521 D SO-8 194 °C/W C

DGK MSOP-8 269 °C/W C

THS4522 PW TSSOP-16 116 °C/W C

THS4524 DBT TSSOP-38 81 °C/W C

(4) Input Offset Voltage Drift, Input Bias Current Drift, and Input Offset Current Drift are average values calculated by taking data at –40°C

and +85°C, computing the difference, and dividing by 125.

Product Folder Link(s): THS4521 THS4522 THS4524

VIN+

VS-

VOUT-

VIN-

VOCM

VS+

VOUT+

VS-

VOUT1-

VOUT1+

VS1+

VS-

VOUT2-

VOUT2+

VS2+

PD1

VIN1+

VIN1-

VOCM1

PD2

VIN2+

VIN2-

VOCM2

THS4521

THS4522

THS4524

www.ti.com

SBOS458F –DECEMBER 2008–REVISED SEPTEMBER 2011

DEVICE INFORMATION

THS4521 THS4522

SOIC-8, MSOP-8 (D, DGK PACKAGES) TSSOP-16 (PW PACKAGE)

(TOP VIEW) (TOP VIEW)

TERMINAL FUNCTIONS: THS4521

SOIC-8, MSOP-8

PIN NO. NAME DESCRIPTION

1 VIN–Inverting amplifier input

2 VOCM Common-mode voltage input

3 VS+ Amplifier positive power-supply input

4 VOUT+ Noninverting amplifier output

5 VOUT–Inverting amplifier output

6 VS–Amplifier negative power-supply input. Note that VS–is tied together on multi-channel devices.

Power down. PD = logic low puts device into low-power mode. PD = logic high or open for normal

7 PD operation.

8 VIN+ Noninverting amplifier input

TERMINAL FUNCTIONS: THS4522

TSSOP-16

PIN NO. NAME DESCRIPTION

Power down 1. PD = logic low puts device into low-power mode. PD = logic high or open for normal

1 PD 1operation.

2 VIN1+ Noninverting amplifier 1 input

3 VIN1–Inverting amplifier 1 input

4 VOCM1 Common-mode voltage input 1

Power down 2. PD = logic low puts device into low-power mode. PD = logic high or open for normal

5 PD 2operation.

6 VIN2+ Noninverting amplifier 2 input

7 VIN2–Inverting amplifier 2 input

8 VOCM2 Common-mode voltage input 2

9 VS+2 Amplifier 2 positive power-supply input

10 VOUT2+ Noninverting amplifier 2 output

11 VOUT2–Inverting amplifier 2 output

12 VS–Negative power-supply input. Note that VS–is tied together on multi-channel devices.

13 VS+1 Amplifier 1 positive power-supply input

14 VOUT1+ Noninverting amplifier 1 output

15 VOUT1–Inverting amplifier 1 output

Product Folder Link(s): THS4521 THS4522 THS4524

VOUT3+

VS3+

VS-

VOUT4-

VOUT4+

VS4+

VIN3+

VIN3-

VOCM3

PD4

VIN4+

VIN4-

VOCM4

VS2+

VS-

VOUT3-

PD2

PD3

VS-

VOUT1-

VOUT1+

VS1+

VS-

VOUT2-

VOUT2+

PD1

VIN1+

VIN1-

VOCM1

VS-

VIN2+

VIN2-

VOCM2

VS-

VS-VS-

VS-

THS4521

THS4522

THS4524

SBOS458F –DECEMBER 2008–REVISED SEPTEMBER 2011

www.ti.com

TERMINAL FUNCTIONS: THS4522 (continued)

TSSOP-16

PIN NO. NAME DESCRIPTION

16 VS–Negative power-supply input. Note that VS–is tied together on multi-channel devices.

THS4524

TSSOP-38 (DBT PACKAGE)

(TOP VIEW)

Product Folder Link(s): THS4521 THS4522 THS4524

THS4521

THS4522

THS4524

www.ti.com

SBOS458F –DECEMBER 2008–REVISED SEPTEMBER 2011

TERMINAL FUNCTIONS: THS4524

TSSOP-38

PIN NO. NAME DESCRIPTION

Power down 1. PD = logic low puts channel into low-power mode. PD = logic high or open for

1 PD 1normal operation.

2 VIN1+ Noninverting amplifier 1 input

3 VIN1–Inverting amplifier 1 input

4 VOCM1 Common-mode voltage input 1

5 VS–Negative power-supply input. Note that VS–is tied together on multi-channel devices.

Power down 2. PD = logic low puts channel into low-power mode. PD = logic high or open for

6 PD 2normal operation.

7 VIN2+ Noninverting amplifier 2 input

8 VIN2–Inverting amplifier 2 input

9 VOCM2 Common-mode voltage input 2

10 VS–Negative power-supply input. Note that VS–is tied together on multi-channel devices.

Power down 3. PD = logic low puts channel into low-power mode. PD = logic high or open for

11 PD 3normal operation.

12 VIN3+ Noninverting amplifier 3 input

13 VIN3–Inverting amplifier 3 input

14 VOCM3 Common-mode voltage input 3

15 VS–Negative power-supply input. Note that VS–is tied together on multi-channel devices.

Power down 4. PD = logic low puts channel into low-power mode. PD = logic high or open for

16 PD 4normal operation.

17 VIN4+ Noninverting amplifier 4 input

18 VIN4–Inverting amplifier 4 input

19 VOCM4 Common-mode voltage input 4

20 VS4+ Amplifier 4 positive power-supply input

21 VOUT4+ Noninverting amplifier 4 output

22 VOUT4–Inverting amplifier 4 output

23 VS–Negative power-supply input. Note that VS–is tied together on multi-channel devices.

24 VS–Negative power-supply input. Note that VS–is tied together on multi-channel devices.

25 VS3+ Amplifier 3 positive power-supply input

26 VOUT3+ Noninverting amplifier3 output

27 VOUT3–Inverting amplifier3 output

28 VS–Negative power-supply input. Note that VS–is tied together on multi-channel devices.

29 VS–Negative power-supply input. Note that VS–is tied together on multi-channel devices.

30 VS2+ Amplifier 2 positive power-supply input

31 VOUT2+ Noninverting amplifier 2 output

32 VOUT2–Inverting amplifier 2 output

33 VS–Negative power-supply input. Note that VS–is tied together on multi-channel devices.

34 VS–Negative power-supply input. Note that VS–is tied together on multi-channel devices.

35 VS1+ Amplifier 1 positive power-supply input

36 VOUT1+ Noninverting amplifier 1 output

37 VOUT1–Inverting amplifier 1 output

38 VS–Negative power-supply input. Note that VS–is tied together on multi-channel devices.

Product Folder Link(s): THS4521 THS4522 THS4524

THS4521

THS4522

THS4524

SBOS458F –DECEMBER 2008–REVISED SEPTEMBER 2011

www.ti.com

TYPICAL CHARACTERISTICS

Table of Graphs: VS+ –VS–= 3.3 V

TITLE FIGURE

Small-Signal Frequency Response Figure 1

Large-Signal Frequency Response Figure 2

Large- and Small-Signal Pulse Response Figure 3

Slew Rate vs VOUT Step Figure 4

Overdrive Recovery Figure 5

10-kHz Output Spectrum on AP Analyzer Figure 6

Harmonic Distortion vs Frequency Figure 7

Harmonic Distortion vs Output Voltage at 1 MHz Figure 8

Harmonic Distortion vs Gain at 1 MHz Figure 9

Harmonic Distortion vs Load at 1 MHz Figure 10

Harmonic Distortion vs VOCM at 1 MHz Figure 11

Two-Tone, Second- and Third-Order Intermodulation Distortion vs Frequency Figure 12

Single-Ended Output Voltage Swing vs Load Resistance Figure 13

Main Amplifier Differential Output Impedance vs Frequency Figure 14

Frequency Response vs CLOAD (RLOAD = 1 kΩ)Figure 15

ROvs CLOAD (RLOAD = 1 kΩ)Figure 16

Rejection Ratio vs Frequency Figure 17

THS4522, THS4524 Crosstalk (Measured Differentially) Figure 18

Turn-on Time Figure 19

Turn-off Time Figure 20

Input-Referred Voltage Noise and Current Noise Spectral Density Figure 21

Main Amplifier Differential Open-Loop Gain and Phase Figure 22

Output Balance Error vs Frequency Figure 23

VOCM Small-Signal Frequency Response Figure 24

VOCM Large-Signal Frequency Response Figure 25

VOCM Input Impedance vs Frequency Figure 26

Product Folder Link(s): THS4521 THS4522 THS4524

THS4521

THS4522

THS4524

www.ti.com

SBOS458F –DECEMBER 2008–REVISED SEPTEMBER 2011

Table of Graphs: VS+ –VS–=5V

TITLE FIGURE

Small-Signal Frequency Response Figure 27

Large-Signal Frequency Response Figure 28

Large- and Small-Signal Pulse Response Figure 29

Slew Rate vs VOUT Step Figure 30

Overdrive Recovery Figure 31

10-kHz Output Spectrum on AP Analyzer Figure 32

Harmonic Distortion vs Frequency Figure 33

Harmonic Distortion vs Output Voltage at 1 MHz Figure 34

Harmonic Distortion vs Gain at 1 MHz Figure 35

Harmonic Distortion vs Load at 1 MHz Figure 36

Harmonic Distortion vs VOCM at 1 MHz Figure 37

Two-Tone, Second- and Third-Order Intermodulation Distortion vs Frequency Figure 38

Single-Ended Output Voltage Swing vs Load Resistance Figure 39

Main Amplifier Differential Output Impedance vs Frequency Figure 40

Frequency Response vs CLOAD (RLOAD = 1 kΩ)Figure 41

ROvs CLOAD (RLOAD = 1 kΩ)Figure 42

Rejection Ratio vs Frequency Figure 43

THS4522, THS4524 Crosstalk (Measured Differentially) Figure 44

Turn-on Time Figure 45

Turn-off Time Figure 46

Input-Referred Voltage Noise and Current Noise Spectral Density Figure 47

Main Amplifier Differential Open-Loop Gain and Phase Figure 48

Output Balance Error vs Frequency Figure 49

VOCM Small-Signal Frequency Response Figure 50

VOCM Large-Signal Frequency Response Figure 51

VOCM Input Impedance vs Frequency Figure 52

Product Folder Link(s): THS4521 THS4522 THS4524

100k 1M 10M 100M 1G

Frequency(Hz)

NormalizedGain(dB)

G=1V/V

G=2V/V

G=5V/V

G=10V/V

V =3.3V

R =1k

V =100mV

S+

O PP

NormalizedGain(dB)

100k 1M 10M 100M 1G

Frequency(Hz)

V =3.3V

R =1k

V =2.0V

S+

O PP

G=1V/V

G=2V/V

G=5V/V

G=10V/V

1.5

1.0

0.5

1.0

1.5

DifferentialV (V)

OUT

0 20 40 60 80 100

Time(ns)

2-VStep

0.5-VStep

V =3.3V

G=1V/V

R =1k

R =200

S+

600

500

400

300

200

100

01 2 345

DifferentialV (V)

OUT

SlewRate(V/ s)m

V =3.3V

G=1V/V

R =1k

S+

R =200

Rising

Falling

2.0

1.5

1.0

0.5

1.0

1.5

2.0

DifferentialV (V)

OUT

InputVoltage(V)

0 100 200 300 400 500 600 800 900 1k

Time(ns)

V =3.3V

G=2V/V

R =1k

S+

R =200

V Diff

Input

OUT

100

110

120

130

140

Magnitude(dBv)

0 5k 10k 15k

20k

25k 30k 35k

Frequency(Hz)

Generator

THS4521

V =3.3V

G=1V/V

R =1k

V =5V

S+

OUT PP

THS4521

THS4522

THS4524

SBOS458F –DECEMBER 2008–REVISED SEPTEMBER 2011

www.ti.com

TYPICAL CHARACTERISTICS: VS+ –VS–= 3.3 V

At VS+ = +3.3 V, VS–= 0 V, VOCM = open, VOUT = 2 VPP (differential), RL= 1 kΩdifferential, G = 1 V/V, single-ended input,

differential output, and input and output referenced to midsupply, unless otherwise noted.

SMALL-SIGNAL FREQUENCY RESPONSE LARGE-SIGNAL FREQUENCY RESPONSE

Figure 1. Figure 2.

LARGE- AND SMALL-SIGNAL PULSE RESPONSE SLEW RATE vs VOUT

Figure 3. Figure 4.

10-kHz OUTPUT SPECTRUM ON

OVERDRIVE RECOVERY AP ANALYZER

Figure 5. Figure 6.

Product Folder Link(s): THS4521 THS4522 THS4524

-10

100

110

HarmonicDistortion(dBc)

110 100

Frequency(MHz)

Second

Harmonic

Third

Harmonic

V =3.3V

G=1V/V

R =1k

S+

V =2.0V

OUT PP

-50

100

HarmonicDistortion(dBc)

1 2 346

V (V )

OUT PP

Second

Harmonic

Third

Harmonic

V =3.3V

G=1V/V

R =1k

S+

f=1MHz

100-

HarmonicDistortion(dBc)

1 2 345 6 78 9 10

Gain(V/V)

Second

Harmonic

Third

Harmonic

V =3.3V

R =1k

f=1MHz

S+

V =2.0V

OUT

-70

100

HarmonicDistortion(dBc)

0 100 200 300 400 500 600 800 900 1k

Load( )W

Second

Harmonic

Third

Harmonic

V =3.3V

G=1V/V

R =1k

f=1MHz

S+

V =2.0V

OUT

-30

100

HarmonicDistortion(dBc)

Second

Harmonic

Third

Harmonic

V =3.3V

G=1V/V

R =1k

f=1MHz

S+

V =2.0V

OUT

0 0.5 1.0 1.5 2.0 2.5 3.0

V (V)

OCM

-10

100

110

IntermodulationDistortion(dBc)

110 100

Frequency(MHz)

Second

Intermodulation

Third

Intermodulation

V =3.3V

G=1V/V

R =1k

S+

V =2.0V

OUT

envelope

THS4521

THS4522

THS4524

www.ti.com

SBOS458F –DECEMBER 2008–REVISED SEPTEMBER 2011

TYPICAL CHARACTERISTICS: VS+ –VS–= 3.3 V (continued)

At VS+ = +3.3 V, VS–= 0 V, VOCM = open, VOUT = 2 VPP (differential), RL= 1 kΩdifferential, G = 1 V/V, single-ended input,

differential output, and input and output referenced to midsupply, unless otherwise noted.

HARMONIC DISTORTION

HARMONIC DISTORTION vs FREQUENCY vs VOUT AT 1 MHZ

Figure 7. Figure 8.

HARMONIC DISTORTION HARMONIC DISTORTION

vs GAIN AT 1 MHZ vs LOAD AT 1 MHZ

Figure 9. Figure 10.

HARMONIC DISTORTION TWO-TONE INTERMODULATION DISTORTION

vs VOCM AT 1 MHZ vs FREQUENCY

Figure 11. Figure 12.

Product Folder Link(s): THS4521 THS4522 THS4524

100

0.1

0.01

DifferentialOutputImpedance( )W

100k 1M 10M 100M

Frequency(Hz)

3.5

3.0

2.5

2.0

1.5

1.0

0.5

Single-EndedV (V)

OUT

10 100 1k 10k

LoadResistance( )W

V max

OUT

V min

OUT

LinearVoltageRange

V =1.65V

OCM

NormalizedGain(dB)

100k 1M 10M 100M 1G

Frequency(Hz)

C =10pF

R =124

C =100pF

R =35.7

C =1000pF

R =7.15

C =4.7pF

R =150

100

R ( )W

10 100 1000

C (pF)

LOAD

110

100

Common-ModeRejectionRatio(dB)

Power-SupplyRejectionRatio(dB)

10k 100k 1M 10M 100M

Frequency(Hz)

V =3.3V

G=1V/V

R =1k

S+

CMRR

+PSRR

-PSRR

-100

105

110

115

120

125

130

135

140

Channel-to-ChannelCrosstalk(dB)

10 100 10k1k 100k 1M

Frequency(Hz)

V =3.3V

G=1V/V

R =1k

S+

OUT RMS

R =1k

ActiveChannelV =1V

THS4521

THS4522

THS4524

SBOS458F –DECEMBER 2008–REVISED SEPTEMBER 2011

www.ti.com

TYPICAL CHARACTERISTICS: VS+ –VS–= 3.3 V (continued)

At VS+ = +3.3 V, VS–= 0 V, VOCM = open, VOUT = 2 VPP (differential), RL= 1 kΩdifferential, G = 1 V/V, single-ended input,

differential output, and input and output referenced to midsupply, unless otherwise noted.

SINGLE-ENDED OUTPUT VOLTAGE SWING MAIN AMPLIFIER DIFFERENTIAL OUTPUT IMPEDANCE

vs LOAD RESISTANCE vs FREQUENCY

Figure 13. Figure 14.

FREQUENCY RESPONSE vs CLOAD ROvs CLOAD

RLOAD = 1 kΩRLOAD = 1 kΩ

Figure 15. Figure 16.

THS4522, THS4524

REJECTION RATIO vs FREQUENCY CROSSTALK (MEASURED DIFFERENTIALLY)

Figure 17. Figure 18.

Product Folder Link(s): THS4521 THS4522 THS4524

4.0

3.5

3.0

2.5

2.0

1.5

1.0

0.5

2.5

2.0

1.5

1.0

0.5

PD Pulse(V)

DifferentialV (V)

OUT

0 20 40 60 80 100 120 160 180 200

Time(ns)

V =3.3V

G=1V/V

R =1k

S+

R =200

V Diff

OUT

140

3.5

3.0

2.5

2.0

1.5

1.0

0.5

2.0

1.8

1.6

1.4

1.2

1.0

0.8

0.6

0.4

0.2

PD Pulse(V)

DifferentialV (V)

OUT

0 20 40 60 80 100 120 160 180 200

Time(ns)

140

V =3.3V

G=1V/V

R =1k

S+

R =200

V Diff

OUT

100

Input-ReferredVoltageNoise(nV/ )

Input-ReferredCurrentNoise(pA/ )

10 100 1k 10k 100k 1M

Frequency(Hz)

Current

Noise

Voltage

Noise

120

100

20-

OPen-LoopGain(dB)

110 100 1k 10k 100k 1M 10M 100M

Frequency(Hz)

135-

Open-LoopPhase(Degrees)

Gain

Phase

-20

OutputBalanceError(dB)

100k 1M 10M 100M

Frequency(Hz)

G=0dB

Gain(dB)

100k 1M 10M 100M 1G

Frequency(Hz)

G=0dB

V = 20dBm

IN -

THS4521

THS4522

THS4524

www.ti.com

SBOS458F –DECEMBER 2008–REVISED SEPTEMBER 2011

TYPICAL CHARACTERISTICS: VS+ –VS–= 3.3 V (continued)

At VS+ = +3.3 V, VS–= 0 V, VOCM = open, VOUT = 2 VPP (differential), RL= 1 kΩdifferential, G = 1 V/V, single-ended input,

differential output, and input and output referenced to midsupply, unless otherwise noted.

TURN-ON TIME TURN-OFF TIME

Figure 19. Figure 20.

INPUT-REFERRED VOLTAGE AND CURRENT NOISE MAIN AMPLIFIER

SPECTRAL DENSITY DIFFERENTIAL OPEN-LOOP GAIN AND PHASE

Figure 21. Figure 22.

OUTPUT BALANCE ERROR

vs FREQUENCY VOCM SMALL-SIGNAL FREQUENCY RESPONSE

Figure 23. Figure 24.

Product Folder Link(s): THS4521 THS4522 THS4524

100k

10k

1k

100

V InputImpedance( )W

OCM

100k 1M 10M 100M

Frequency(Hz)

2.5

2.3

2.1

1.9

1.7

1.5

1.3

1.1

0.9

0.7

0.5

V Common-ModeVoltage(V)

OUT

0 100 200 300 400

Time(ns)

V =3.3V

G=1V/V

R =1k

S+

THS4521

THS4522

THS4524

SBOS458F –DECEMBER 2008–REVISED SEPTEMBER 2011

www.ti.com

TYPICAL CHARACTERISTICS: VS+ –VS–= 3.3 V (continued)

At VS+ = +3.3 V, VS–= 0 V, VOCM = open, VOUT = 2 VPP (differential), RL= 1 kΩdifferential, G = 1 V/V, single-ended input,

differential output, and input and output referenced to midsupply, unless otherwise noted.

VOCM INPUT IMPEDANCE

VOCM LARGE-SIGNAL PULSE RESPONSE vs FREQUENCY

Figure 25. Figure 26.

Product Folder Link(s): THS4521 THS4522 THS4524

100k 1M 10M 100M 1G

Frequency(Hz)

NormalizedGain(dB)

G=1V/V

G=2V/V

G=5V/V

G=10V/V

V =5.0V

R =1k

V =100mV

S+

O PP

NormalizedGain(dB)

100k 1M 10M 100M 1G

Frequency(Hz)

G=1V/V

G=2V/V

G=5V/V

G=10V/V

V =5.0V

R =1k

V =2.0V

S+

O PP

1.5

1.0

0.5

1.0

1.5

DifferentialV (V)

OUT

0 20 40 60 80 100

Time(ns)

2-VStep

0.5-VStep

V =5V

G=1V/V

R =1k

R =200

S+

800

700

600

500

400

300

200

100

SlewRate(V/ s)m

0 1 2 3 4 5 67

DifferentialV (V)

OUT

V =5V

G=1V/V

R =1k

S+

R =200

Falling

Rising

DifferentialV (V)

OUT

InputVoltage(V)

0 100 200 300 400 500 600 700 800 900 1k

Time(ns)

V =5V

G=2V/V

R =1k

S+

R =200

V Diff

Input

OUT

100

110

120

130

140

Magnitude(dBv)

0 5k 10k 15k 20k 25k 30k 35k

Frequency(Hz)

Generator

THS4521

V =5.0V

G=1V/V

R =1k

V =8V

S+

OUT PP

THS4521

THS4522

THS4524

www.ti.com

SBOS458F –DECEMBER 2008–REVISED SEPTEMBER 2011

TYPICAL CHARACTERISTICS: 5 V

At VS+ = +5 V, VS–= 0 V, VOCM = open, VOUT = 2 VPP (differential), RF= 1 kΩ, RL= 1 kΩdifferential, G = 1 V/V, single-ended

input, differential output, and input and output referenced to midsupply, unless otherwise noted.

SMALL-SIGNAL FREQUENCY RESPONSE LARGE-SIGNAL FREQUENCY RESPONSE

Figure 27. Figure 28.

LARGE- AND SMALL-SIGNAL PULSE RESPONSE SLEW RATE vs VOUT

Figure 29. Figure 30.

10-kHz OUTPUT SPECTRUM ON

OVERDRIVE RECOVERY AP ANALYZER AT VOUT = 8 VPP

Figure 31. Figure 32.

Product Folder Link(s): THS4521 THS4522 THS4524

-10

100

110

HarmonicDistortion(dBc)

110 100

Frequency(MHz)

Second

Harmonic

Third

Harmonic

V =5V

G=1V/V

R =1k

S+

V =2.0V

OUT

100-

HarmonicDistortion(dBc)

1 2 3 4 5 678

V (V )

OUT PP

Second

Harmonic

Third

Harmonic

V =5V

G=1V/V

R =1k

S+

f=1MHz

100-

HarmonicDistortion(dBc)

1 2 345 6 78 9 10

Gain(V/V)

Second

Harmonic

Third

Harmonic

V =5V

R =1k

f=1MHz

S+

V =2.0V

OUT

-70

100

HarmonicDistortion(dBc)

0 100 200 300 400 500 600 800 900 1k

Load( )W

Second

Harmonic

Third

Harmonic

V =5V

G=1V/V

R =1k

f=1MHz

S+

V =2.0V

OUT

-30

100

HarmonicDistortion(dBc)

3.0 4.0 5.0

V (V)

OCM

Second

Harmonic

Third

Harmonic

V =5V

G=1V/V

R =1k

f=1MHz

S+

V =2.0V

OUT

0 1.0 2.0

-10

100

110

IntermodulationDistortion(dBc)

110 100

Frequency(MHz)

Second

Intermodulation

Third

Intermodulation

V =5V

G=1V/V

R =1k

S+

V =2.0V

OUT

envelope

THS4521

THS4522

THS4524

SBOS458F –DECEMBER 2008–REVISED SEPTEMBER 2011

www.ti.com

TYPICAL CHARACTERISTICS: 5 V (continued)

At VS+ = +5 V, VS–= 0 V, VOCM = open, VOUT = 2 VPP (differential), RF= 1 kΩ, RL= 1 kΩdifferential, G = 1 V/V, single-ended

input, differential output, and input and output referenced to midsupply, unless otherwise noted.

HARMONIC DISTORTION

HARMONIC DISTORTION vs FREQUENCY vs VOUT AT 1 MHZ

Figure 33. Figure 34.

HARMONIC DISTORTION HARMONIC DISTORTION

vs GAIN AT 1 MHZ vs LOAD AT 1 MHZ

Figure 35. Figure 36.

HARMONIC DISTORTION TWO-TONE INTERMODULATION DISTORTION

vs VOCM AT 1 MHZ vs FREQUENCY

Figure 37. Figure 38.

Product Folder Link(s): THS4521 THS4522 THS4524

100

0.1

0.01

DifferentialOutputImpedance( )W

100k 1M 10M 100M

Frequency(Hz)

5.0

4.5

4.0

3.5

3.0

2.5

2.0

1.5

1.0

0.5

Single-EndedV (V)

OUT

10 100 1k 10k

LoadResistance( )W

V max

OUT

V min

OUT

LinearVoltageRange

V =2.5V

OCM

NormalizedGain(dB)

100k 1M 10M 100M 1G

Frequency(Hz)

C =10pF

R =124

C =100pF

R =35.7

C =1000pF

R =7.15

C =4.7pF

R =150

100

R ( )W

10 100 1000

C (pF)

LOAD

110

100

Common-ModeRejectionRatio(dB)

Power-SupplyRejectionRatio(dB)

10k 100k 1M 10M 100M

Frequency(Hz)

V =5.0V

G=1V/V

R =1k

S+

CMRR

+PSRR

PSRR-

-100

105

110

115

120

125

130

135

140

Channel-to-ChannelCrosstalk(dB)

10 100 10k1k 100k 1M

Frequency(Hz)

V =5V

G=1V/V

R =1k

S+

OUT RMS

R =1k

ActiveChannelV =1V

THS4521

THS4522

THS4524

www.ti.com

SBOS458F –DECEMBER 2008–REVISED SEPTEMBER 2011

TYPICAL CHARACTERISTICS: 5 V (continued)

At VS+ = +5 V, VS–= 0 V, VOCM = open, VOUT = 2 VPP (differential), RF= 1 kΩ, RL= 1 kΩdifferential, G = 1 V/V, single-ended

input, differential output, and input and output referenced to midsupply, unless otherwise noted.

SINGLE-ENDED OUTPUT VOLTAGE SWING MAIN AMPLIFIER DIFFERENTIAL OUTPUT IMPEDANCE

vs DIFFERENTIAL LOAD RESISTANCE vs FREQUENCY

Figure 39. Figure 40.

FREQUENCY RESPONSE vs CLOAD ROvs CLOAD

RLOAD = 1 kΩRLOAD = 1 kΩ

Figure 41. Figure 42.

THS4522, THS4524

REJECTION RATIO vs FREQUENCY CROSSTALK (MEASURED DIFFERENTIALLY)

Figure 43. Figure 44.

Product Folder Link(s): THS4521 THS4522 THS4524

4.0

3.5

3.0

2.5

2.0

1.5

1.0

0.5

2.5

2.0

1.5

1.0

0.5

PD Pulse(V)

DifferentialV (V)

OUT

0 20 40 60 80 100 120 160 180 200

Time(ns)

V =5V

G=1V/V

R =1k

S+

R =200

V Diff

OUT

140

3.5

3.0

2.5

2.0

1.5

1.0

0.5

2.0

1.8

1.6

1.4

1.2

1.0

0.8

0.6

0.4

0.2

PD Pulse(V)

DifferentialV (V)

OUT

0 20 40 60 80 100 120 160 180 200

Time(ns)

140

V =5V

G=1V/V

R =1k

S+

R =200

V Diff

OUT

100

Input-ReferredVoltageNoise(nV/ )

Input-ReferredCurrentNoise(pA/ )

10 100 1k 10k 100k 1M

Frequency(Hz)

Current

Noise

Voltage

Noise

120

100

20-

OPen-LoopGain(dB)

110 100 1k 10k 100k 1M 10M 100M

Frequency(Hz)

135

Open-LoopPhase(Degrees)

Gain

Phase

-20

OutputBalanceError(dB)

100k 1M 10M 100M

Frequency(Hz)

G=0dB

Gain(dB)

100k 1M 10M 100M 1G

Frequency(Hz)

G=0dB

V = 20dBm

IN -

THS4521

THS4522

THS4524

SBOS458F –DECEMBER 2008–REVISED SEPTEMBER 2011

www.ti.com

TYPICAL CHARACTERISTICS: 5 V (continued)

At VS+ = +5 V, VS–= 0 V, VOCM = open, VOUT = 2 VPP (differential), RF= 1 kΩ, RL= 1 kΩdifferential, G = 1 V/V, single-ended

input, differential output, and input and output referenced to midsupply, unless otherwise noted.

TURN-ON TIME TURN-OFF TIME

Figure 45. Figure 46.

INPUT-REFERRED VOLTAGE AND CURRENT NOISE MAIN AMPLIFIER

SPECTRAL DENSITY DIFFERENTIAL OPEN-LOOP GAIN AND PHASE

Figure 47. Figure 48.

OUTPUT BALANCE ERROR

vs FREQUENCY VOCM SMALL-SIGNAL FREQUENCY RESPONSE

Figure 49. Figure 50.

Product Folder Link(s): THS4521 THS4522 THS4524

100k

10k

1k

100

V InputImpedance( )W

OCM

100k 1M 10M 100M

Frequency(Hz)

3.5

3.3

3.1

2.9

2.7

2.5

2.3

2.1

1.9

1.7

1.5

V Common-ModeVoltage(V)

OUT

0 100 200 300 400

Time(ns)

V =5.0V

G=1V/V

R =1k

S+

THS4521

THS4522

THS4524

www.ti.com

SBOS458F –DECEMBER 2008–REVISED SEPTEMBER 2011

TYPICAL CHARACTERISTICS: 5 V (continued)

At VS+ = +5 V, VS–= 0 V, VOCM = open, VOUT = 2 VPP (differential), RF= 1 kΩ, RL= 1 kΩdifferential, G = 1 V/V, single-ended

input, differential output, and input and output referenced to midsupply, unless otherwise noted.

VOCM INPUT IMPEDANCE

VOCM LARGE-SIGNAL PULSE RESPONSE vs FREQUENCY

Figure 51. Figure 52.

Product Folder Link(s): THS4521 THS4522 THS4524

THS452x

RIT

24.9 W953 W

1kW

49.9 W

24.9 W

VOCM

VIN+

Measurewith

Differential

Probe

AcrossROT

Installedto

Balance

Amplifier

Calibrated

Differential

Probe

Across

RIT

Open

From

50-

Source

VS+

VS-

0.22 Fm

THS4521

THS4522

THS4524

SBOS458F –DECEMBER 2008–REVISED SEPTEMBER 2011

www.ti.com

TEST CIRCUITS

Table 2. Load Component Values For 1:1

Overview Differential to Single-Ended Output Transformer(1)

The THS4521, THS4522, and THS4524 family is RLROROT Atten

tested with the test circuits shown in this section; all 100 Ω24.9 ΩOpen 6 dB

circuits are built using the available THS4521 200 Ω86.6 Ω69.8 Ω16.8 dB

evaluation module (EVM). For simplicity,

power-supply decoupling is not shown; see the layout 499 Ω237 Ω56.2 Ω25.5 dB

in the Applications section for recommendations. 1 kΩ487 Ω52.3 Ω31.8 dB

Depending on the test conditions, component values 1. Total load includes 50-Ωtermination by the test

change in accordance with Table 1 and Table 2, or equipment. Components are chosen to achieve

as otherwise noted. In some cases the signal load and 50-Ωline termination through a 1:1

generators used are ac-coupled and in others they transformer.

dc-coupled 50-Ωsources. To balance the amplifier

when ac-coupled, a 0.22-μF capacitor and 49.9-ΩFrequency Response

resistor to ground are inserted across RIT on the

alternate input; when dc-coupled, only the 49.9-ΩThe circuit shown in Figure 53 is used to measure the

resistor to ground is added across RIT. A split power frequency response of the circuit.

supply is used to ease the interface to common test An HP network analyzer is used as the signal source

equipment, but the amplifier can be operated in a and the measurement device. The output impedance

single-supply configuration as described in the of the HP network analyzer is is dc-coupled and is

Applications section with no impact on performance. 50 Ω. RIT and RGare chosen to impedance-match to

Also, for most of the tests, except as noted, the 50 Ωand maintain the proper gain. To balance the

devices are tested with single-ended inputs and a amplifier, a 49.9-Ωresistor to ground is inserted

transformer on the output to convert the differential across RIT on the alternate input.

output to single-ended because common lab test

equipment has single-ended inputs and outputs. The output is probed using a Tektronix

Similar or better performance can be expected with high-impedance differential probe across the 953-Ω

differential inputs and outputs. resistor and referred to the amplifier output by adding

back the 0.42-dB because of the voltage divider on

As a result of the voltage divider on the output formed the output.

by the load component values, the amplifier output is

attenuated. The Atten column in Table 2 shows the

attenuation expected from the resistor divider. When

using a transformer at the output (as shown in

Figure 54), the signal sees slightly more loss because

of transformer and line loss; these numbers are

approximate.

Table 1. Gain Component Values for

Single-Ended Input(1)

Gain RFRGRIT

1 V/V 1 kΩ1 kΩ52.3 Ω

2 V/V 1 kΩ487 Ω53.6 Ω

5 V/V 1 kΩ187 Ω59.0 Ω

10 V/V 1 kΩ86.6 Ω69.8 ΩFigure 53. Frequency Response Test Circuit

1. Gain setting includes 50-Ωsource impedance.

Components are chosen to achieve gain and

50-Ωinput termination.

Product Folder Link(s): THS4521 THS4522 THS4524

THS452x

RIT

49.9 W

1kW

49.9 W

VOCM

VIN+

Installedto

Balance

Amplifier

Open

From

50-

Source

VOUT-

VOUT+ToOscilloscope

with50- InputW

VS+

VS-

0.22 Fm

THS452x

RGRF

ROT

RGRF

RIT

VOCM

VOUT

Installedto

Balance

Amplifier

Open

1:1

From

50-

Source

VIN+

0.22 Fm

To50-

Test

Equipment

VS-

VS+

49.9 W

THS4521

THS4522

THS4524

www.ti.com

SBOS458F –DECEMBER 2008–REVISED SEPTEMBER 2011

Distortion Slew Rate, Transient Response, Settling

Time, Output Impedance, Overdrive, Output

The circuit shown in Figure 54 is used to measure Voltage, and Turn-On/Turn-Off Time

harmonic and intermodulation distortion of the

amplifier. The circuit shown in Figure 55 is used to measure

slew rate, transient response, settling time, output

An HP signal generator is used as the signal source impedance, overdrive recovery, output voltage swing,

and the output is measured with a Rhode and and ampliifer turn-on/turn-off time. Turn-on and

Schwarz spectrum analyzer. The output impedance turn-off time are measured with the same circuit

of the HP signal generator is ac-coupled and is 50 Ω.modified for 50-Ωinput impedance on the PD input

RIT and RGare chosen to impedance match to 50 Ωby replacing the 0.22-μF capacitor with a 49.9-Ω

and maintain the proper gain. To balance the resistor. For output impedance, the signal is injected

amplifier, a 0.22-μF capacitor and 49.9-Ωresistor to at VOUT with VIN open; the drop across the 2x 49.9-Ω

ground are inserted across RIT on the alternate input. resistors is then used to calculate the impedance

seen looking into the amplifier output.

A low-pass filter is inserted in series with the input to

reduce harmonics generated at the signal source.

The level of the fundamental is measured and then a

high-pass filter is inserted at the output to reduce the

fundamental so it does not generate distortion in the

input of the spectrum analyzer.

The transformer used in the output to convert the

signal from differential to single-ended is an

ADT1–1WT. It limits the frequency response of the

circuit so that measurements cannot be made below

approximately 1 MHz.

Figure 55. Slew Rate, Transient Response,

Settling Time, Output Impedance, Overdrive

Recovery, VOUT Swing, and Turn-On/Turn-Off Test

Circuit

Figure 54. Distortion Test Circuit

Product Folder Link(s): THS4521 THS4522 THS4524

THS452x 24.9 W953 W

1kW

52.3 W

24.9 W

VOCM

VIN+

PD Measurewith

Differential

Probe

Calibrated

Differential

Probe Open

Open

From

Network

Analyzer VS+

VS-

0.22 Fm

THS452x

1kW

VOCM

Open

Measurement

PointforBandwidth

Measurement

PointforZIN

Calibrated

Differential

Probe

Across

49.9

Resistor

RCM From

Network

Analyzer

1kW1kW

49.9 W

499 W

VS+

0.22 F

THS452x 24.9 W953 W

1kW

52.3 W

24.9 W

VOCM

Measurewith

Differential

Probe

AcrossROT

Open

Network

Analyzer

Power

Supply

CalibratedDifferential

Probe

Across

VS+andGND

VS+

VS-

0.22 Fm

THS452x 499 W

1kW

52.3 W

499 W

VOCM

Open

49.9 W

Step

Input

ToOscilloscope

50- InputW

VS+

VS-

0.22 Fm

THS4521

THS4522

THS4524

SBOS458F –DECEMBER 2008–REVISED SEPTEMBER 2011

www.ti.com

Common-Mode and Power-Supply Rejection VOCM Input

The circuit shown in Figure 56 is used to measure the The circuit illustrated in Figure 58 is used to measure

CMRR. The signal from the network analyzer is the frequency response and input impedance of the

applied common-mode to the input. Figure 57 is used VOCM input. Frequency response is measured using a

to measure the PSRR of VS+ and VS–. The power Tektronix high-impedance differential probe, with

supply under test is applied to the network analyzer RCM =0Ωat the common point of VOUT+ and VOUT–,

dc offset input. For both CMRR and PSRR, the output formed at the summing junction of the two matched

is probed using a Tektronix high-impedance 499-Ωresistors, with respect to ground. The input

differential probe across the 953-Ωresistor and impedance is measured using a Tektronix

referred to the amplifier output by adding back the high-impedance differential probe at the VOCM input

0.42-dB as a result of the voltage divider on the with RCM = 10 kΩand the drop across the 10-kΩ

output. For these tests, the resistors are matched for resistor is used to calculate the impedance seen

best results. looking into the amplifier VOCM input.

The circuit shown in Figure 59 measures the transient

response and slew rate of the VOCM input. A 1-V step

input is applied to the VOCM input and the output is

measured using a 50-Ωoscilloscope input referenced

back to the amplifier output.

Figure 56. CMRR Test Circuit

Figure 58. VOCM Input Test Circuit

Figure 57. PSRR Test Circuit Figure 59. VOCM Transient Response and Slew

Rate Test Circuit

space

Product Folder Link(s): THS4521 THS4522 THS4524

THS452x

VOUT-

VOUT+

Single-Ended

Input

Differential

Output

VS+

VS-

THS452x

VOUT-

VIN-VOUT+

VIN+

Differential

Input

Differential

Output

VS+

VS-

VOUT+ ´R

R +R

G F

VIN-´R

R +R

G F

THS4521

THS4522

THS4524

www.ti.com

SBOS458F –DECEMBER 2008–REVISED SEPTEMBER 2011

APPLICATION INFORMATION

The following circuits show application information for

the THS4521, THS4522, and THS4524 family. For

simplicity, power-supply decoupling capacitors are

not shown in these diagrams; see the EVM and

Layout Recommendations section for suggested

guidelines. For more details on the use and operation

of fully differential op amps, refer to the Application

Report Fully-Differential Amplifiers (SLOA054),

available for download from the TI web site at

www.ti.com.

Differential Input to Differential Output

Amplifier

The THS4521, THS4522, and THS4524 family are

fully-differential operational amplifiers that can be Figure 61. Single-Ended Input to Differential

used to amplify differential input signals to differential Output Amplifier

output signals. Figure 60 shows a basic block

diagram of the circuit (VOCM and PD inputs not

shown). The gain of the circuit is set by RFdivided by Input Common-Mode Voltage Range

RG.The input common-mode voltage of a fully-differential

op amp is the voltage at the +and –input pins of the

device.

It is important to not violate the input common-mode

voltage range (VICR) of the op amp. Assuming the op

amp is in linear operation, the voltage across the

input pins is only a few millivolts at most. Therefore,

finding the voltage at one input pin determines the

input common-mode voltage of the op amp.

Treating the negative input as a summing node, the

voltage is given by Equation 1:

(1)

Figure 60. Differential Input to Differential Output To determine the VICR of the op amp, the voltage at

Amplifier the negative input is evaluated at the extremes of

VOUT+. As the gain of the op amp increases, the input

Single-Ended Input to Differential Output common-mode voltage becomes closer and closer to

Amplifier the input common-mode voltage of the source.

The THS4521, THS4522, and THS4524 family can

also amplify and convert single-ended input signals to Setting the Output Common-Mode Voltage

differential output signals. Figure 61 illustrates a basic The output common-model voltage is set by the

block diagram of the circuit (VOCM and PD inputs not voltage at the VOCM pin. The internal common-mode

shown). The gain of the circuit is again set by RFcontrol circuit maintains the output common-mode

divided by RG.voltage within 5-mV offset (typ) from the set voltage.

If left unconnected, the common-mode set point is set

to midsupply by internal circuitry, which may be

overdriven from an external source.

Product Folder Link(s): THS4521 THS4522 THS4524

I =

EXT

2V (V V )

50k

- -

OCM S+ S-

VS+

VOCM

VS-

100kW

IEXT

Tointernal

V circuit

OCM

THS452x

RGRF

RIT

VS-

VOCM

VIN+

Optional;

installedto

balance

impedanceseen

at VIN+

VOCM Control

PD Control

VOUT-

VOUT+

VS+

0.22 Fm

THS4521

THS4522

THS4524

SBOS458F –DECEMBER 2008–REVISED SEPTEMBER 2011

www.ti.com

Figure 62 represents the VOCM input. The internal Single-Supply Operation

VOCM circuit has typically 23 MHz of –3 dB bandwidth, To facilitate testing with common lab equipment, the

which is required for best performance, but it is THS4521EVM allows for split-supply operation; most

intended to be a dc bias input pin. A 0.22-μF bypass of the characterization data presented in this data

capacitor is recommended on this pin to reduce sheet is measured using split-supply power inputs.

noise. The external current required to overdrive the The device can easily be used with a single-supply

internal resistor divider is given approximately by the power input without degrading performance.

formula in Equation 2:Figure 63 shows a dc-coupled single-supply circuit

with single-ended inputs. This circuit can also be

applied to differential input sources.

where:

•VOCM is the voltage applied to the VOCM pin (2)

Figure 62. VOCM Input Circuit

Typical Performance Variation with Supply Figure 63. THS4521 DC-Coupled Single-Supply

Voltage with Single-Ended Inputs

The THS4521, THS4522, and THS4524 family of

devices provide excellent performance across the The input common-mode voltage range of the

specified power-supply range of 2.5 V to 5.5 V with THS4521, THS4522, and THS4524 family is

only minor variations. The input and output voltage designed to include the negative supply voltage. in

compliance ranges track with the power supply in the circuit shown in Figure 63, the signal source is

nearly a 1:1 correlation. Other changes can be referenced to ground. VOCM is set by an external

observed in slew rate, output current drive, open-loop control source or, if left unconnected, the internal

gain, bandwidth, and distortion. Table 3 shows the circuit defaults to midsupply. Together with the input

typical variation to be expected in these key impedance of the amplifier circuit, RIT provides input

performance parameters. termination, which is also referenced to ground.

Note that RIT and optional matching components are

added to the alternate input to balance the

impedance at signal input.

Table 3. Typical Performance Variation versus Power-Supply Voltage

PARAMETER VS= 5 V VS= 3.3 V VS= 2.5 V

–3-dB Small-signal bandwidth 145 MHz 135 MHz 125 MHz

Slew rate (2-V step) 490 V/μs 420 V/μs 210 V/μs

Harmonic distortion at 1 MHz, 2 VPP, RL= 1 kΩ

xxxSecond harmonic –85 dBc –85 dBc –84 dBc

xxxThird harmonic –91 dBc –90 dBc –88 dBc

Open-loop gain 119 dB 116 dB 115 dB

Linear output current drive 55 mA 35 mA 24 mA

Product Folder Link(s): THS4521 THS4522 THS4524

0.1 110 100 1000

Frequency (MHz)

SMALL-SIGNAL FREQUENCY RESPONSE

Device and Package Option Comparison

V = 5.0 V

Gain = 1 V/V

S+

R = 1 k

THS4522,

THS4524

THS4521

MSOP

THS4521

SOIC

Signal Gain (dB)

0.1 110 100 1000

Frequency (MHz)

SMALL-SIGNAL FREQUENCY RESPONSE

Gain = 1, R = R = R = 1 k , 10 k , 100 k

F G L W W W

1 kW

10 kW

100 kW

V = 5.0 V

V = 100 mV

Gain = 1 V/V

S+

O PP

Signal Gain (dB)

THS4521

THS4522

THS4524

www.ti.com

SBOS458F –DECEMBER 2008–REVISED SEPTEMBER 2011

Low-Power Applications and the Effects of Frequency Response Variation due to

Resistor Values on Bandwidth Package Options

For low-power operation, it may be necessary to Users can see variations in the small-signal (VOUT =

increase the gain setting resistors values to limit 100 mVPP) frequency response between the available

current consumption and not load the source. Using package options for the THS4521, THS4522, and

larger value resistors lowers the bandwidth of the THS4524 family as a result of parasitic elements

THS4521, THS4522, and THS4524 family as a result associated with each package and board layout

of the interactions between the resistors, the device changes. Figure 65 shows the variance measured in

parasitic capacitance, and printed circuit board (PCB) the lab; this variance is to be expected even when

parasitic capacitance. Figure 64 shows the using a good layout.

small-signal frequency response with 1-kΩ, 10-kΩ,

and 100-kΩresistors for RF, RG, and RL(impedance

is assumed to typically increase for all three resistors

in low-power applications).

Figure 65. Small-Signal Frequency Response:

Package Variations

Figure 64. THS4521 Frequency Response with

Various Gain Setting and Load Resistor Values

Product Folder Link(s): THS4521 THS4522 THS4524

0.1 1 10 100 1000

Frequency (MHz)

Normalized Gain (dB)

FREQUENCY RESPONSE vs CLOAD

R = 124

C = 10 pF

each output

R = 37.5

C = 100 pF each output

R = 7.15

C = 1000 pF each output

R = 150

C = 4.7 pF

each output

V = 5.0 V, Gain = 1 V/V

S+

R = 1 k differential

R = 1 k

V = 100 mV

OUT

100

10 100 1000

C (pF)

LOAD

Series Output Resistor ( )W

RECOMMENDED R vs C

For Flat Frequency Response

O LOAD

V = 5.0 V

Gain = 1 V/V

S+

R = 1 k

R = 1 k Differential

V = 100 mV

OUT

THS452x 24.9 W

1kW

24.9 W

VOCM

Open

From

Analyzer

VOUT+

VIN+

ToAP

Analyzer

VS+

VIN-

VS-

0.22 Fm

VOUT-

THS4521

THS4522

THS4524

SBOS458F –DECEMBER 2008–REVISED SEPTEMBER 2011

www.ti.com

Driving Capacitive Loads

The THS4521, THS4522, and THS4524 family is

designed for a nominal capacitive load of 1 pF on

each output to ground. When driving capacitive loads

greater than 1 pF, it is recommended to use small

resistors (RO) in series with the output, placed as

close to the device as possible. Without RO,

capacitance on the output interacts with the output

impedance of the amplifier and causes phase shift in

the loop gain of the amplifier that reduces the phase

margin. This reduction in phase margin results in

frequency response peaking; overshoot, undershoot,

and/or ringing when a step or square-wave signal is

applied; and may lead to instability or oscillation.

Inserting ROisolates the phase shift from the loop

gain path and restores the phase margin, but it also

limits bandwidth. Figure 66 shows the recommended Figure 67. Frequency Response for Various RO

values of ROversus capacitive loads (CL), and and CLValues, with RLOAD =1kΩ

Figure 67 shows an illustration of the frequency

response with various values. Audio Performance

The THS4521, THS4522, and THS4524 family

provide excellent audio performance with very low

quiescent power. To show performance in the audio

band, the device was tested with a SYS-2722 audio

analyzer from Audio Precision. THD+N and FFT tests

were performed at 1-VRMS output voltage.

Performance is the same on both 3.3-V and 5-V

supplies. Figure 68 shows the test circuit used; see

Figure 69 and Figure 70 for the performance of the

analyzer using internal loopback mode (generator)

together with the THS4521.

Figure 66. Recommended Series Output Resistor

versus Capacitive Load for Flat Frequency

Response, with RLOAD =1kΩ

Figure 68. THS4521 AP Analyzer Test Circuit

Product Folder Link(s): THS4521 THS4522 THS4524

100

110

120

130

140

Magnitude (dBv)

0 5 k 10 k 15 k 20 k 25 k 30 k 35 k

Frequency (Hz)

Generator

THS4521

V = 5.0 V

G = 1 V/V

R = 1 k

V = 1 V

S+

OUT RMS

10-kHz OUTPUT SPECTRUM

THS4521 on AP Analyzer

-50

100

110

120

THD+N (dBv)

0510 15 20

Frequency (kHz)

TOTAL HARMONIC DISTORTION + NOISE

THS4521 Measured on AP Analyzer

THS4521

Signal Generator

-95

101

103

105

107

109

111

113

115

THD+N (dB)

10 100 1 k 10 k 100 k

Frequency (Hz)

TOTAL HARMONIC DISTORTION + NOISE

vs FREQUENCY (No Weighting)

THS4521

THS4522

THS4524

www.ti.com

SBOS458F –DECEMBER 2008–REVISED SEPTEMBER 2011

Note that the harmonic distortion performance is very

close to the same with and without the device

meaning the THS4521 performance is actually much

better than can be directly measured by this

meathod. The actual device performance can be

estimated by placing the device in a large noise gain

and using the reduction in loop gain correction. The

THS4521 is placed in a noise gain of 101 by adding a

10-Ωresistor directly across the input terminals of the

circuit shown in Figure 68. This test was performed

using the AP instrument as both the signal source

and the analyzer. The second-order harmonic

distortion at 1 kHz is estimated to be –122 dBc with

VO= 1VRMS; third-order harmonic distortion is

estimated to be –141 dBc. The third-order harmonic

distortion result matches exactly with design

simulations, but the second-order harmonic distortion

is about 10 dB worse. This result is not unexpected Figure 70. THS4521 1-VRMS 10-kHz FFT Plot

because second-order harmonic distortion

performance with a differential signal depends heavily

on cancellation as a result of the differential nature of The THS4521 shows even better THD+N

the signal, which depends on board layout, bypass performance when driving higher amplitude output,

capacitors, external cabling, and so forth. Note that such as 5 VPP that is more typical when driving an

the circuit of Figure 68 is also used to measure ADC. To show performance with an extended

crosstalk between channels. frequency range, higher gain, and higher amplitude,

the device was tested with 5 VPP up to 80 kHz with

the AP. Figure 71 shows the resulting THD+N graph

with no weighting.

Figure 69. THS4521 1-VRMS 20-Hz

to 20-kHz THD+N

Figure 71. THD+N (No Weighting) on AP, 80-kHz

Bandwidth at G = 1 with 5-VPP Output

Product Folder Link(s): THS4521 THS4522 THS4524

Voltage (V)

0 50 100 150 200

Time (ms)

5.0

4.5

4.0

3.5

3.0

2.5

2.0

1.5

1.0

0.5

Outputs

PD ENABLE POP PERFORMANCE

Voltage (V)

0 50 100 150 200

Time (ms)

Power

Supply

5.0

4.5

4.0

3.5

3.0

2.5

2.0

1.5

1.0

0.5

Outputs

POWER-SUPPLY TURN-ON POP PERFORMANCE

Voltage (V)

0 50 100 150 200

Time (ms)

5.0

4.5

4.0

3.5

3.0

2.5

2.0

1.5

1.0

0.5

Outputs

PD DISABLE POP PERFORMANCE

Voltage (V)

0 50 100 150 200

Time (ms)

Power

Supply

5.0

4.5

4.0

3.5

3.0

2.5

2.0

1.5

1.0

0.5

Outputs

POWER-SUPPLY TURN-OFF POP PERFORMANCE

THS4521

THS4522

THS4524

SBOS458F –DECEMBER 2008–REVISED SEPTEMBER 2011

www.ti.com

Audio On/Off Pop Performance space

The THS4521 was tested to show on and off pop With no tone input, Figure 74 shows the pop

performance by connecting a speaker between the performance using the PD pin to enable the

differential outputs and switching the power supply on THS4521, and Figure 75 shows performance using

and off, and also by using the PD function of the the PD pin to disable the device. Again, the transients

THS4521. Testing was done with and without tones. during power on and off show that no audible pop

During these tests, no audible pop could be heard. should be heard. It should also be noted that the turn

on/off times are faster using the PD pin technique.

With no tone input, Figure 72 shows the pop

performance when switching power on to the

THS4521 and Figure 73 shows the device

performance when turning the power off. The

transients during power on and off illustrate that no

audible pop should be heard

Figure 74. THS4521 PD Pin Enable Pop

Performance

Figure 72. THS4521 Power-Supply Turn-On Pop

Performance

Figure 75. THS4521 PD Pin Disable Pop

Performance

The power on/off pop performance of the THS4521,

whether by switching the power supply or when using

Figure 73. THS4521 Power-Supply Turn-Off Pop the power-down function built into the chip, shows

Performance that no special design should be required to prevent

an audible pop.

space

Product Folder Link(s): THS4521 THS4522 THS4524

Frequency (Hz)

-95

101

103

105

107

109

111

113

115

THD+N (dB)

100 1 k 10 k 20 k

THS4521 and PCM4204 THD+N

vs FREQUENCY (No Weighting)

Frequency (Hz)

100

110

120

130

140

150

FFT (dBFS)

100 1 k 10 k 20 k

THS4521 and PCM4204

1-kHz FFT

THS4521

THS4522

THS4524

www.ti.com

SBOS458F –DECEMBER 2008–REVISED SEPTEMBER 2011

Audio ADC Driver Performance: +15 V, +5 VA and +5 VD, to a +5-V external power

THS4521 and PCM4204 Combined supply (EXT +3.3 was not used) and connecting –15

Performance V and all ground inputs to ground on the external

power supply. Note only one external +5-V supply

To show achievable performance with a was needed to power all devices on the EVM.

high-performance audio ADC, the THS4521 is tested

as the drive amplifier for the PCM4204. The A SYS-2722 Audio Analyzer from Audio Precision

PCM4204 is a high-performance, four-channel ADC (AP) provides an analog audio input to the EVM; the

designed for professional and broadcast audio PCM-formatted digital output is read by the digital

applications. The PCM4204 architecture uses a 1-bit input on the AP.

delta-sigma (ΔΣ) modulator per channel that Data were taken using a 256-fSsystem clock to

incorporates an advanced dither scheme for achieve fS= 48-kHz measurements, and audio output

improved dynamic performance, and supports PCM uses PCM format. Other data rates and formats are

output data. The PCM4204 provides a flexible serial expected to show similar performance in line with that

port interface and many other advanced features. shown in the product data sheet.

Refer to the PCM4204 product data sheet for more

information. Figure 76 shows the THD+N vs Frequency response

with no weighting; Figure 77 shows an FFT of the

The PCM4204EVM can test the audio performance of output with 1-kHz input tone. Input signals to the

the THS4521 as a drive amplifier. The standard PCM4204 for these tests is 0.5 dBFS. Dynamic range

PCM4204EVM is provided with four OPA1632 is also tested at –60 dBFS, fIN = 1 kHz, and

fully-differential amplifiers, which use the same device A-weighted. Table 4 summarizes testing results using

pinout as the THS4521. For testing, one of these the THS4521 together with the PCM4204 versus

amplifiers is replaced with a THS4521 device in same typical data sheet performance measurements, and

package (MSOP), and the power supply changes to a show that it make an excellent drive amplifier for this

single-supply +5V. Figure 78 shows the modifications ADC.

made to the circuit. Note the resistor connecting the

VOCM input of the THS4521 to the input The test circuit shown in Figure 78 has a gain = 0.27

common-mode drive from the PCM4204 is shown and attenuates the input signal. For applications that

removed and is optional; no performance change was require higher gain, the circuit was modified to gains

noted with it connected or removed. The THS4521 is of G = 1, G = 2, and G = 5 by replacing the feedback

operated with a +5-V single-supply so the output resistors (R33 and R34) and re-tested to show

common-mode defaults to +2.5 V as required at the performance.

input of the PCM4204. The EVM power connections

were modified by connecting positive supply inputs,

Figure 76. THS4521 and PCM4204: THD+N versus Figure 77. THS4521 and PCM4204 1-kHz FFT

Frequency with No Weighting

Product Folder Link(s): THS4521 THS4522 THS4524

THS4521 C79

2.7nF

C74

100pF

C73

100pF

R42

40.2 W

R34

270 W

R24

1kW

R23

1kW

R27

1kW

R41

40.2 W

R33

270 W

C29

10 Fm

C41

0.01 Fm

C42

0.01 Fm

C30

10 Fm

C83

0.1 Fm

R13

R14

Audio

Inputs

PCM4204

Inputs

C21

1nF

C22

1nF

TP4

GND

+15 V

+5 V

+15 V

THS4521

THS4522

THS4524

SBOS458F –DECEMBER 2008–REVISED SEPTEMBER 2011

www.ti.com

Figure 78. THS4521 and PCM4204 Test Circuit

Table 4. 1-kHz AC Analysis: Test Circuit versus PCM4204 Data Sheet Typical Specifications

(fS= 48 kSPS)

Configuration Tone THD+N Dynamic Range

THS4521 and PCM4204 1 kHz –106 dBc 117 dB

PCM4204 Data sheet (typ) 1 kHz –105 dBc 118 dB

Product Folder Link(s): THS4521 THS4522 THS4524

Frequency (Hz)

-95

101

103

105

107

109

111

113

115

THD+N (dB)

100 1 k 10 k 20 k

G = 5

G = 1

G = 2

THS4521 and PCM4204 THD+N

vs FREQUENCY (No Weighting, at Higher Gains)

Frequency (Hz)

-80

100

THD+N (dB)

100 1 k 10 k 20 k

THS4521 and PCM3168 THD+N vs FREQUENCY

(No Weighting)

THS4521

THS4522

THS4524

www.ti.com

SBOS458F –DECEMBER 2008–REVISED SEPTEMBER 2011

Figure 79 shows the THS4521 and PCM4204 THD+N EVM is configured for both differential inputs as

versus frequency with no weighting at higher gains. shown in Figure 60 and for single-ended input as

shown in Figure 61 with 1-kΩresistors for RFand RG,

and 24.9-Ωresistors in series with each output to

isolate the outputs from the reactive load of the

coaxial cables. To limit the noise from the external

EVM and cables, a 2.7-nF capacitor is placed

differentially across the PCM3168A inputs. The

THS4521 is operated with a single-supply +5-V

supply so the output common-mode of the THS4521

defaults to +2.5 V as required at the input of the

PCM3168A. The PCM3168A EVM is configured and

operated as described in the PCM3168AEVM User

Guide. The ADC was tested with an external

THS4521 EVM with both single-ended input and

differential inputs. In both configurations, the results

are the same. Figure 80 shows the THD+N versus

frequency and Table 5 compares the result to the

PCM3168 data sheet typical specification at 1 kHz.

Both graphs show that it makes an excellent drive

amplifier for this ADC. Note: a 2700 series Audio

Figure 79. THS4521 and PCM4204: THD+N versus Analyzer from Audio Precision is used to generate

Frequency with No Weighting at Higher Gains the input signals to the THS4521 and to analyze the

digital data from the PCM3168.

Audio ADC Driver Performance:

THS4521 and PCM3168 Combined

Performance

The THS4521 is also tested as the drive amplifier for

the PCM3168A ADC input. The PCM3168A is a

high-performance, single-chip, 24-bit, 6-in/8-out,

audio coder/decoder (codec) with single-ended and

differential selectable analog inputs and differential

outputs. The six-channel, 24-bit ADC employs a ΔΣ

modulator and supports 8-kHz to 96-kHz sampling

rates and a 16-bit/24-bit width digital audio output

word on the audio interface. The eight-channel, 24-bit

digital-to-analog converter (DAC) employs a ΔΣ

modulator and supports 8-kHz to 192-kHz sampling

rates and a 16-bit/24-bit width digital audio input word

on the audio interface. Each audio interface supports

I2S™, left-/right-justified, and DSP formats with

16-bit/24-bit word width. In addition, the PCM3168A Figure 80. THS4521 and PCM3168: THD+N versus

supports the time-division-multiplexed (TDM) format.. Frequency with No Weighting

The PCM3168A provides flexible serial port interface

and many other advanced features. Refer to the

PCM3168A product data sheet for more information. Table 5. 1-kHz AC Analysis: Test Circuit vs

PCM3168 Data Sheet Typical Specifications

The PCM3168A EVM is used to test the audio (fS= 48 kSPS)

performance of the THS4521 as a drive amplifier.

The standard PCM3168A EVM is provided with Configuration Tone THD+N

OPA2134 op amps that are used to convert THS4521 and 1 kHz –92.6 dBc

single-ended inputs to differential to drive the ADC. PCM3168

For testing, the op amp output series resistors are PCM3168 Data 1 kHz –93 dBc

removed from one of the channels and a THS4521, sheet (typ)

mounted on its standard EVM, is connected to the

ADC inputs via short coaxial cables. The THS4521

Product Folder Link(s): THS4521 THS4522 THS4524

THS4521 ADS1278 (CH1)

VOCM

5V

VCOM

2.2nF

AINN1

AINP1

1/2

OPA2350

1.5nF

VIN+

VIN-

1kW

49.9 W

0.1 Fm0.1 Fm

1kW

100

120

140

160

Magnitude (dBFS)

04812 16 20 24 26

Frequency (kHz)

10-kHz FFT

G = 1

R = R = 1 k

C = 1.5 nF

V = 5 V

Load = 2 x 49.9 + 2.2 nF

F G

100

120

140

160

Magnitude (dBFS)

04812 16 20 24 26

Frequency (kHz)

1-kHz FFT

G = 1

R = R = 1 k

C = 1.5 nF

V = 5 V

Load = 2 x 49.9 + 2.2 nF

F G

THS4521

THS4522

THS4524

SBOS458F –DECEMBER 2008–REVISED SEPTEMBER 2011

www.ti.com

ADC Driver Performance: modes from 10 kSPS to 128 kSPS to enable the user

THS4521 and ADS1278 Combined to fine-tune performance and power for specific

Performance application needs. The circuit shown in Figure 81 was

The THS4521 provides excellent performance when used to test the performance. Data were taken using

driving high-performance ΔΣ and successive the High-Resolution mode (52 kSPS) of the ADS1278

approximation register (SAR) ADCs in audio and with input frequencies at 1 kHz and 10 kHz and

industrial applications using a single 3-V to 5-V power signal levels 1/2 dB below full-scale (–0.5 dBFS). FFT

supply. To show achievable performance, the plots showing the spectral performance are given in

THS4521 is tested as the drive amplifier for the Figure 82 and Figure 83; tabulated ac analysis results

ADS1278 24-bit ADC. The ADS1278 offers excellent are shown in Table 6 and compared to the ADS1278

ac and dc performance, with four selectable operating data sheet typical performance specifications.

Figure 81. THS4521 and ADS1278 (Ch 1) Test Circuit

Figure 82. 1-kHz FFT Figure 83. 10-kHz FFT

Table 6. AC Analysis

Configuration Tone Signal (dBFS) SNR (dBc) THD (dBc) SINAD (dBc) SFDR (dBc)

THS4521and 1 kHz –0.5 109 –108 105 114

ADS1278 10 kHz –0.5 102 –110 101 110

ADS1278 Data 1 kHz –0.5 110 –108 —109

sheet (typ)

Product Folder Link(s): THS4521 THS4522 THS4524

THS4521 ADS8321

VOCM

5V

1nF

-IN

+IN

VIN+

VIN-

1kW

49.9 W

0.22 Fm

68pF

1kW

Open

100

120

140

-160

Magnitude (dBFS)

0 10 k 20 k 30 k 40 k 50 k

Frequency (Hz)

V = 5.0 V

G = 1 V/V

R = 1 k

FR =

Load = 2 x 49.9 + 2 pF

10-kHz FFT

100

120

140

-160

Magnitude (dBFS)

0 10 k 20 k 30 k 40 k 50 k

Frequency (Hz)

V = 5.0 V

G = 1 V/V

R = 1 k

FR =

Load = 2 x 49.9 + 2 pF

2-kHz FFT

THS4521

THS4522

THS4524

www.ti.com

SBOS458F –DECEMBER 2008–REVISED SEPTEMBER 2011

ADC Driver Performance: Data were taken using the ADS8321 at 100 kSPS

THS4521 and ADS8321 Combined with input frequencies of 2 kHz and 10 kHz and

Performance signal levels that were -0.5 dBFS. FFT plots that

illustrate the spectral performance are given in

To demonstrate achievable performance, the Figure 85 and Figure 86. Tabulated ac analysis

THS4521 is tested as the drive amplifier for the results are listed in Table 7 and compared to the

ADS8321 16-bit SAR ADC. The ADS8321 offers ADS8321 data sheet typical performance.

excellent ac and dc performance, with ultra-low power

and small size. The circuit shown in Figure 84 was

used to test the performance.

Figure 84. THS4521 and ADS8321 Test Circuit

Figure 85. 2-kHZ FFT Figure 86. 10-kHz FFT

Table 7. AC Analysis

Configuration Tone Signal (dBFS) SNR (dBc) THD (dBc) SINAD (dBc) SFDR (dBc)

THS4521 and 2 kHz –0.5 86.7 –97.8 86.4 100.7

ADS8321 10 kHz –0.5 85.2 –98.1 85.2 102.2

ADS8321 Data 10 kHz –0.5 87 –86 84 86

sheet (typ)

Product Folder Link(s): THS4521 THS4522 THS4524

TP2 TP3

0.1 Fm

C603 C0805

0.1 Fm

10 Fm

VS-

C12

0.1 Fm

C603C0805

C11

0.1 Fm

10 Fm

C10

10 Fm

VS+ VS+

VS+

C15

Open

C16

Open

C13

Open

C14

Open

VS-

GND

R12

1kW

R13

1kW

R14

1kW

R15

1kW

R25

0WJ9

J10

R26

R16

487W

R20

52.3W

R17

487W

R22

R21

49.9W

0.22 Fm

VS-

VS+

R23

R18

R24

R10

52.3W

R11

52.3W

R19

T2T1

TP1

VOUT+

VOUT-

J11

JP1

0.22 Fm

THS4521

THS4522

THS4524

SBOS458F –DECEMBER 2008–REVISED SEPTEMBER 2011

www.ti.com

EVM AND LAYOUT RECOMMENDATIONS

Figure 87 shows the THS4521EVM schematic. PCB layers 1 through 4 are shown in Figure 88;Table 8 lists the

bill of materials for the THS4521EVM as supplied from TI. It is recommended to follow the layout of the external

components near to the amplifier, ground plane construction, and power routing as closely as possible. Follow

these general guidelines:

1. Signal routing should be direct and as short as possible into and out of the op amp circuit.

2. The feedback path should be short and direct.

3. Ground or power planes should be removed from directly under the amplifier input and output pins.

4. An output resistor is recommended in each output lead, placed as near to the output pins as possible.

5. Two 0.1-μF power-supply decoupling capacitors should be placed as near to the power-supply pins as

possible.

6. Two 10-μF power-supply decoupling capacitors should be placed within 1 inch of the device and can be

shared among multple analog devices.

7. A 0.22-μF capacitor should be placed between the VOCM input pin and ground near to the pin. This capacitor

limits noise coupled into the pin.

8. The PD pin uses TTL logic levels; a bypass capacitor is not necessary if actively driven, but can be used for

robustness in noisy environments whether driven or not.

9. If input termination resistors R10 and R11 are used, a single point connection to ground on L2 is

recommended.

Figure 87. THS4521EVM: Schematic

Product Folder Link(s): THS4521 THS4522 THS4524

THS4521

THS4522

THS4524

www.ti.com

SBOS458F –DECEMBER 2008–REVISED SEPTEMBER 2011

Figure 88. THS4521EVM: Layer 1 to Layer 4 Images

Product Folder Link(s): THS4521 THS4522 THS4524

THS4521

THS4522

THS4524

SBOS458F –DECEMBER 2008–REVISED SEPTEMBER 2011

www.ti.com

Table 8. THS4521EVM Parts List

REFERENCE MANUFACTURER

ITEM DESCRIPTION SMD SIZE DESIGNATOR QTY PART NUMBER

1 Capacitor, 10.0 μF, ceramic, X5R, 6.3 V 0805 C7, C8, C9, C10 4 (AVX) 08056D106KAT2A

2 Capacitor, 0.1 μF, ceramic, X7R, 16 V 0603 C3, C5, C11, C12 4 (AVX) 0603YC104KAT2A

3 Capacitor, 0.22 μF, ceramic, X7R, 10 V 0603 C1, C4, C6 3 (AVX) 0603ZC224KAT2A

4 Open 0603 C2, C13, C14, C15, C16 5

5 Open 0603 R1, R2, R3, R7, R8, R9, R18, 12

R19, R21, R22, R23, R26

6 Resistor, 0 Ω0603 R24, R25 2 (ROHM) MCR03EZPJ000

7 Resistor, 49.9 Ω, 1/10W, 1% 0603 R6 1 (ROHM) MCR03EZPFX49R9

8 Resistor, 52.3 Ω, 1/10W, 1% 0603 R10, R11, R20 3 (ROHM) MCR03EZPFX52R3

9 Resistor, 487 Ω, 1/10W, 1% 0603 R16, R17 2 (ROHM) MCR03EZPFX4870

10 Resistor, 1k Ω, 1/10W, 1% 0603 R12, R13, R14, R15 4 (ROHM) MCR03EZPFX1001

11 Resistor, 0 Ω0805 R4, R5 2 (ROHM) MCR10EZPJ000

12 Open T1 1

13 Transformer, RF T2 1 (MINI-CIRCUITS) ADT1-1WT

14 Jack, Banana receptance, 0.25-in dia. J4, J5, J8 3 (SPC) 813

hole

15 Open J1, J3, J6, J7, J10, J11 6

16 Connector, edge, SMA PCB jack J2, J9 2 (JOHNSON) 142-0701-801

17 Header, 0.1 in CTRS, 0.025-in sq. pins 2 POS. JP1 1 (SULLINS) PBC36SAAN

18 Shunts JP1 1 (SULLINS) SSC02SYAN

19 Test point, Red TP1 1 (KEYSTONE) 5000

20 Test point, Black TP2, TP3 2 (KEYSTONE) 5001

21 IC, THS4521 U1 1 (TI) THS4521D

22 Standoff, 4-40 hex, 0.625 in length 4 (KEYSTONE) 1808

23 Screw, Phillips, 4-40, .250 in 4 SHR-0440-016-SN

24 Board, printed circuit 1 (TI) EDGE# 6494532

Product Folder Link(s): THS4521 THS4522 THS4524

THS4521

THS4522

THS4524

www.ti.com

SBOS458F –DECEMBER 2008–REVISED SEPTEMBER 2011

REVISION HISTORY

NOTE: Page numbers for previous revisions may differ from page numbers in the current version.

Changes from Revision E (December 2010) to Revision F Page

•Changed Input Offset Current values in 3.3 V Electrical Characteristics ............................................................................. 3

•Changed Input Offset Current Drift values in 3.3 V Electrical Characteristics ..................................................................... 3

•Changed Input Offset Current values in 5 V Electrical Characteristics ................................................................................ 6

•Changed Input Offset Current Drift values in 5 V Electrical Characteristics ........................................................................ 6

•Changed R41 and R42 in Figure 78 ................................................................................................................................... 32

Changes from Revision D (August 2010) to Revision E Page

•Changed test level indication for 5-V input offset voltage drift from B to C .......................................................................... 5

Product Folder Link(s): THS4521 THS4522 THS4524

THS4521

THS4522

THS4524

SBOS458F –DECEMBER 2008–REVISED SEPTEMBER 2011

www.ti.com

Evaluation Board/Kit Important Notice

Texas Instruments (TI) provides the enclosed product(s) under the following conditions:

This evaluation board/kit is intended for use for ENGINEERING DEVELOPMENT, DEMONSTRATION, OR EVALUATION PURPOSES

ONLY and is not considered by TI to be a finished end-product fit for general consumer use. Persons handling the product(s) must have

electronics training and observe good engineering practice standards. As such, the goods being provided are not intended to be complete

in terms of required design-, marketing-, and/or manufacturing-related protective considerations, including product safety and environmental

measures typically found in end products that incorporate such semiconductor components or circuit boards. This evaluation board/kit does

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(WEEE), FCC, CE or UL, and therefore may not meet the technical requirements of these directives or other related directives.

Should this evaluation board/kit not meet the specifications indicated in the User’s Guide, the board/kit may be returned within 30 days from

the date of delivery for a full refund. THE FOREGOING WARRANTY IS THE EXCLUSIVE WARRANTY MADE BY SELLER TO BUYER

AND IS IN LIEU OF ALL OTHER WARRANTIES, EXPRESSED, IMPLIED, OR STATUTORY, INCLUDING ANY WARRANTY OF

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The user assumes all responsibility and liability for proper and safe handling of the goods. Further, the user indemnifies TI from all claims

arising from the handling or use of the goods. Due to the open construction of the product, it is the user’s responsibility to take any and all

appropriate precautions with regard to electrostatic discharge.

EXCEPT TO THE EXTENT OF THE INDEMNITY SET FORTH ABOVE, NEITHER PARTY SHALL BE LIABLE TO THE OTHER FOR ANY

INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES.

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TI assumes no liability for applications assistance, customer product design, software performance, or infringement of patents or

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Please read the User’s Guide and, specifically, the Warnings and Restrictions notice in the User’s Guide prior to handling the product. This

notice contains important safety information about temperatures and voltages. For additional information on TI’s environmental and/or

safety programs, please contact the TI application engineer or visit www.ti.com/esh.

No license is granted under any patent right or other intellectual property right of TI covering or relating to any machine, process, or

combination in which such TI products or services might be or are used.

FCC Warning

This evaluation board/kit is intended for use for ENGINEERING DEVELOPMENT, DEMONSTRATION, OR EVALUATION PURPOSES

ONLY and is not considered by TI to be a finished end-product fit for general consumer use. It generates, uses, and can radiate radio

frequency energy and has not been tested for compliance with the limits of computing devices pursuant to part 15 of FCC rules, which are

designed to provide reasonable protection against radio frequency interference. Operation of this equipment in other environments may

cause interference with radio communications, in which case the user at his own expense will be required to take whatever measures may

be required to correct this interference.

EVM Warnings and Restrictions

It is important to operate this EVM within the input voltage range of 3 V to 5.5 V and the output voltage range of 3 V to 5.5 V.

Exceeding the specified input range may cause unexpected operation and/or irreversible damage to the EVM. If there are questions

concerning the input range, please contact a TI field representative prior to connecting the input power.

Applying loads outside of the specified output range may result in unintended operation and/or possible permanent damage to the EVM.

Please consult the EVM User's Guide prior to connecting any load to the EVM output. If there is uncertainty as to the load specification,

please contact a TI field representative.

During normal operation, some circuit components may have case temperatures greater than +85°C. The EVM is designed to operate

properly with certain components above +85°C as long as the input and output ranges are maintained. These components include but are

not limited to linear regulators, switching transistors, pass transistors, and current sense resistors. These types of devices can be identified

using the EVM schematic located in the EVM User's Guide. When placing measurement probes near these devices during operation,

please be aware that these devices may be very warm to the touch.

Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265

Product Folder Link(s): THS4521 THS4522 THS4524

PACKAGE OPTION ADDENDUM

www.ti.com 16-Aug-2012

Addendum-Page 1

PACKAGING INFORMATION

Orderable Device Status (1) Package Type Package

Drawing Pins Package Qty Eco Plan (2) Lead/

Ball Finish MSL Peak Temp (3) Samples

(Requires Login)

THS4521ID ACTIVE SOIC D 8 75 Green (RoHS

& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR

THS4521IDGKR ACTIVE VSSOP DGK 8 2500 Green (RoHS

& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR

THS4521IDGKT ACTIVE VSSOP DGK 8 250 Green (RoHS

& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR

THS4521IDR ACTIVE SOIC D 8 2500 Green (RoHS

& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR

THS4522IPW ACTIVE TSSOP PW 16 90 Green (RoHS

& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR

THS4522IPWR ACTIVE TSSOP PW 16 2000 Green (RoHS

& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR

THS4524IDBT ACTIVE TSSOP DBT 38 50 Green (RoHS

& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR

THS4524IDBTR ACTIVE TSSOP DBT 38 2000 Green (RoHS

& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR

(1) The marketing status values are defined as follows:

ACTIVE: Product device recommended for new designs.

LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.

NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.

PREVIEW: Device has been announced but is not in production. Samples may or may not be available.

OBSOLETE: TI has discontinued the production of the device.

(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability

information and additional product content details.

TBD: The Pb-Free/Green conversion plan has not been defined.

Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that

lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.

Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between

the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.

Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight

in homogeneous material)

(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.

PACKAGE OPTION ADDENDUM

www.ti.com 16-Aug-2012

Addendum-Page 2

Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information

provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and

continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.

TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.

In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.

OTHER QUALIFIED VERSIONS OF THS4521, THS4524 :

•Enhanced Product: THS4524-EP

NOTE: Qualified Version Definitions:

•Enhanced Product - Supports Defense, Aerospace and Medical Applications

TAPE AND REEL INFORMATION

*All dimensions are nominal

Device Package

Type Package

Drawing Pins SPQ Reel

Diameter

(mm)

Reel

Width

W1 (mm)

(mm) B0

(mm) K0

(mm) P1

(mm) W

(mm) Pin1

Quadrant

THS4521IDGKR VSSOP DGK 8 2500 330.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1

THS4521IDGKT VSSOP DGK 8 250 180.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1

THS4521IDR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1

THS4522IPWR TSSOP PW 16 2000 330.0 12.4 6.9 5.6 1.6 8.0 12.0 Q1

THS4524IDBTR TSSOP DBT 38 2000 330.0 16.4 6.9 10.2 1.8 12.0 16.0 Q1

PACKAGE MATERIALS INFORMATION

www.ti.com 16-Aug-2012

Pack Materials-Page 1

*All dimensions are nominal

Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)

THS4521IDGKR VSSOP DGK 8 2500 367.0 367.0 35.0

THS4521IDGKT VSSOP DGK 8 250 210.0 185.0 35.0

THS4521IDR SOIC D 8 2500 367.0 367.0 35.0

THS4522IPWR TSSOP PW 16 2000 367.0 367.0 35.0

THS4524IDBTR TSSOP DBT 38 2000 367.0 367.0 38.0

PACKAGE MATERIALS INFORMATION

www.ti.com 16-Aug-2012

Pack Materials-Page 2

IMPORTANT NOTICE

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