[CQ-2064] CQ-2064 High-Speed Small-Sized Current Sensor Overview CQ-2064 is an open-type current sensor using a Hall sensor which outputs the analog voltage proportional to the AC/DC current. Quantum well ultra-thin film InAs (Indium Arsenide) is used as the Hall sensor, which enables the high-accuracy and high-speed current sensing. Simple AI-Shell package with the Hall sensor, magnetic core, and primary conductor realizes the space-saving and high reliability. Features - Bidirectional type - Electrical isolation between the primary conductor and the sensor signal - 5V single supply operation - Ratiometric output - Low variation and low temperature drift of sensitivity and offset voltage - Low noise output: 2.1mVrms (max.) - Fast response time: 1s (typ.) - Small-sized package, halogen free Functional Block Diagram P Magnetic Core Amplifier Hall Sensor Buffer VSS Compensation Bias Unit EEPROM Unit DATA_IO N VOUT VDD SCLK Figure 1. Functional block diagram of CQ-2064 MS1263-E-05 2013/06 -1- [CQ-2064] Circuit Blocks Table 1. Explanation of circuit blocks Circuit Block Hall Sensor Amplifier Function Hall element which detects magnetic flux density generated from the measured current. Amplifier of Hall element's output. Output buffer with gain. This block outputs the voltage (VOUT) proportional to the current applied to the primary conductor. Compensation circuit which adjusts the temperature drifts of sensitivity and offset voltage. Drive circuit for Hall element. Non-volatile memory for setting adjustment parameters. The parameters are adjusted before the shipment. Magnetic core which gathers the magnetic flux density to the Hall element. Buffer Compensation Bias Unit EEPROM Unit Magnetic Core Typical Output Characteristics VOUT VDD N P CQ-2064 (Top View) IIN 1/2 VDD VDD VOUT -INS 0 NP PN Figure 2. Typical output characteristics of CQ-2064 INS IIN Pin/Function Table 2. Pin-out description No. Name I/O 1 2 3 4 5 6 7 DATA_IO VDD VSS VOUT SCLK P N O I I 7 Description Test pin (connect to ground) Power supply pin (5V) Ground pin (0V) Analog output pin Test pin (connect to ground) Primary current pin (+) Primary current pin (-) 6 CQ-2064 (Top View) 1 2 3 4 5 Figure 3. Pin-out diagram MS1263-E-05 2013/06 -2- [CQ-2064] Absolute Maximum Ratings Table 3. Absolute maximum ratings Parameter Supply Voltage Analog Output Current Storage Temperature Symbol VDD IOUT Tstg Min. -0.3 -1 -40 Max. 6 1 125 Units V mA C Notes VDD VOUT WARNING: Operation at or beyond these limits may result in permanent damage to the device. Normal operation is not guaranteed at these extremes. Primary Current Derating Curve Conditions: Mounted on the test board complying with the EIA/JEDEC Standards (EIA/JESD51.) 60 50 IRMSmax [A] 40 30 20 10 0 -60 -40 -20 0 20 40 60 80 100 Ta [] NOTE) Cooling or thermal radiation will improve the derating curve above. Figure 4. Primary current derating curve of CQ-2064 Recommended Operating Conditions Table 4. Recommended operating conditions Parameter Supply Voltage Output Current Output Load Capacitance Operating Ambient Temperature Symbol VDD IOUT Min. 4.5 -0.5 CL Ta -40 Typ. 5.0 Max. 5.5 0.5 Units V mA Notes VOUT 100 pF VOUT 90 C NOTE: Electrical characteristics are not guaranteed when operated at or beyond these conditions. MS1263-E-05 2013/06 -3- [CQ-2064] Electrical Characteristics Table 5. Electrical characteristics Conditions (unless otherwise specified): Ta=25CVDD=5V Parameter Maximum Primary Current (RMS) Symbol IRMSmax Current Consumption IDD Sensitivity* Vh Offset Voltage* Vof Linear Sensing Range INS Linearity Error* Rise Response Time tr Fall Response Time tf Bandwidth fT Output Noise** Conditions Min. Typ. -50 No Loads IIN=0A Vh-dmax Maximum Temperature Drift of Offset voltage Vof-dmax Units 50 A 9 mA 39.2 40.0 40.8 mV/A 2.432 2.500 2.568 V -54 54 A -1 1 %F.S. IIN 90% VOUT 90% CL=100pF IIN 10% VOUT 10% CL=100pF -3dB, CL=100pF 1 s 1 s 400 kHz VNrms Maximum Temperature Drift of Sensitivity Max. 2.1 Variation ratio to Vh(Ta=35C) Ta=35~90C Variation ratio to Vh(Ta=35C) Ta=-40~35C mVrms 1 % 2 Variation from Vof(Ta=35C) Ta=-40~90C, IIN=0A 14 mV Ratiometricity Error of Sensitivity** Ratiometricity Error of Offset Voltage** Primary Conductor Resistance Vh-R VDD=4.5V~5.5V -1 1 % Vof-R VDD=4.5V~5.5V IIN=0A -1 1 % Isolation Voltage** VINS AC 50/60Hz, 60s 2.5 kV Isolation Resistance** RINS DC 1kV 500 M R1 100 * These parameters can drift by the values described in `Reliability Tests' section over the lifetime of the product. ** These characteristics are guaranteed by design. MS1263-E-05 2013/06 -4- [CQ-2064] Characteristics Definitions (1) Sensitivity Vh [mV/A], offset voltage Vof [V] Sensitivity is defined as the slope of the approximate straight line calculated by the least square method, using the data of VOUT voltage (VOUT) when the primary current (IIN) is swept within the range of linear sensing range (INS). Offset voltage is defined as the intercept of the approximate straight line above. (2) Linearity error [%F.S.] Linearity error is defined as the ratio of the maximum error voltage (Vd) to the full scale (F.S.), where Vd is the maximum difference between the VOUT voltage (VOUT) and the approximate straight line calculated in the sensitivity and offset voltage definition. Definition formula is shown in below: = Vd / F.S. x 100 NOTE) Full scale (F.S.) is defined by the multiplication of the linear sensing range and sensitivity (See Figure 5). Approximate straight line by least square method VOUT(V) Vd -|INS| 0 F.S. =2Vhx|INS| |INS| IIN(A) Figure 5. Output characteristics of CQ-2064 (3) Ratiometric error of sensitivity Vh-R [%] and ratiometric error of offset voltage Vof-R [%] Output of CQ-2064 is ratiometric, which means the values of sensitivity (Vh) and offset voltage (Vof) are proportional to the supply voltage (VDD). Ratiometric error is defined as the difference between the Vh (or Vof) and ideal Vh (or Vof) when the VDD is changed from 5.0V to VDD1 (4.5V<VDD1<5.5V). Definition formula is shown in below: Vh-R = 100 x {(Vh(VDD = VDD1) / Vh(VDD = 5V)) - (VDD1 / 5)} / (VDD1 / 5) Vof-R = 100 x {(Vof(VDD = VDD1) / Vof(VDD = 5V)) - (VDD1 / 5)} / (VDD1 / 5) (4) Temperature drift of sensitivity Vh-d [%] Temperature drift of sensitivity is defined as the drift ratio of the sensitivity (Vh) at Ta=Ta1 (-40C<Ta1<90C) to the Vh at Ta=35C, and calculated from the formula below: Vh-d = 100 x (Vh(Ta1) / Vh(35C) - 1) Maximum temperature drift of sensitivity (Vh-dmax) is defined as the maximum value of |Vh-d| through the defined temperature range. Reference data of the temperature drift of sensitivity of CQ-2064 is shown in Figure 6. MS1263-E-05 2013/06 -5- [CQ-2064] (5) Temperature drift of offset voltage Vof-d [mV] Temperature drift of offset voltage is defined as the drift value between the offset voltage (Vof) at Ta=Ta1 (-40C<Ta1<90C) and the Vof at Ta=35C, and calculated from the formula below: Vof-d = Vof(Ta = Ta1) - Vof(Ta = 35C) Maximum temperature drift of offset voltage (Vof-dmax) is defined as the maximum value of |Vof-d| through the defined temperature range. Reference data of the temperature drift of offset voltage of CQ-2064 is shown in Figure 7. 40 5 VDD=5.0V IIN=54A 4 3 20 2 1 Vof-d [mV] Vh-d [%] VDD=5.0V IIN=0A 30 0 -1 -2 10 0 -10 -20 -3 -30 -4 -5 -40 -60 -40 -20 0 20 40 60 -60 -40 -20 80 100 120 0 20 40 60 80 100 120 Ta [C] Ta [C] Figure 6. Temperature drift of sensitivity of CQ-2064 (for reference, n=1) Figure 7. Temperature drift of offset voltage of CQ-2064 (for reference, n=3) (6) Rise response time tr [s] and fall response time tf [s] Rise response time (or fall response time) is defined as the time delay from the 90% (or 10%) of input primary current (IIN) to the 90% (or 10%) of the VOUT voltage (VOUT) under the pulse input of primary current (see Figure 8.) IIN IIN 90% IIN 10% IIN Time Time VOUT VOUT 90% Vout 10% Vout tf tr Time Time Rise response time (tr) Fall response time (tf) Figure 8. Definition of response time MS1263-E-05 2013/06 -6- [CQ-2064] Package Dimensions Unit:mm Note1) The tolerances of dimensions without any mention are 0.1mm. Terminals: Cu Plating for Terminals: Sn (100%) RoHS compliant, halogen free Figure 9. Package outline MS1263-E-05 2013/06 -7- [CQ-2064] Recommended Land Pattern (Reference Only) Unit:mm Figure 10. Recommended land pattern of CQ-2064 Note) If 2 or more trace layers are used as the current path, please make enough number of through-holes to flow current between the trace layers. MS1263-E-05 2013/06 -8- [CQ-2064] Application Circuits +5V 6 P IN SCLK 5 4 VOUT CQ-2064 3 VSS VDD DATA_IO N 2 (b) R1 (a) R2 (c) RF CF AIN A/D VSS R2 0.1F VREF R1 1 7 (a) 0.1F bypass capacitor should be placed near by the CQ-2064 (b) Ratiometric output of CQ-2064 enables an A/D system to improve the A/D conversion error caused by the fluctuation of supply voltage. This is achieved by making the supply voltage of CQ-2064 and the reference voltage of A/D converter common. Voltage dividers (R1 and R2) are required if the reference voltage of A/D converter is less than +5V. For example, if the reference voltage of A/D converter is +3.3V which is its supply voltage level, R1=20k , R2=39k are recommended. If the reference voltage of A/D converter is different from its supply voltage level, one more voltage divider is required. (c) Add a low-pass filter if it is necessary. Figure 11. Recommended circuits when using A/D converter MS1263-E-05 2013/06 -9- [CQ-2064] Markings Production information is printed on the package surface by laser marking. Markings consist of 12 characters (6 characters x 2 lines). Q2064 Product Code(CQ-2064) + Option Option (3 characters) Production Date (Y/M/D) Figure 12. Markings of CQ-2064 Table 6. Production date code table Last Number of Year Month Day Character Number Character Month Character Day 0 0 C Jan. 1 1 1 1 D Feb. 2 2 2 2 E Mar. 3 3 3 3 F Apr. 4 4 4 4 G May. 5 5 5 5 H Jun. 6 6 6 6 J Jul. 7 7 7 7 K Aug. 8 8 8 8 L Sep. 9 9 9 9 M Oct. 0 10 N Nov. A 11 P Dec. B 12 C 13 D 14 MS1263-E-05 E 15 F 16 G 17 H 18 J 19 K 20 L 21 N 22 P 23 R 24 S 25 T 26 U 27 V 28 W 29 X 30 Y 31 2013/06 - 10 - [CQ-2064] Reliability Tests Table 7. Test parameters and conditions of reliability test No. Test Parameter 1 High Humidity Storage Test 2 High Temperature Bias Test 3 4 Test Conditions n Test Time JEITA EIAJ ED-4701 102 Ta=85C, 85%RH, continuous operation 22 1000h JEITA EIAJ ED-4701 101 Ta=125C, continuous operation 22 1000h High Temperature Storage Test JEITA EIAJ ED-4701 201 Ta=150C 22 1000h Low Temperature Storage Test JEITA EIAJ ED-4701 202 Ta= -55C 22 1000h 5 Heat Cycle Test JEITA EIAJ ED-4701 105 -40C 25C 125C 30min. 5min. 30min. Tested in vapor phase 22 100 cycles 6 Vibration Test JEITA EIAJ ED-4701 403 Vibration frequency: 10~55Hz (1min.) Vibration amplitude: 1.5mm (x, y, z directions) 5 2h for each direction Tested samples are pretreated as below before each reliability test: Desiccation: 125C /24h Moisture Absorption: 85C/85%RH/168h Flow: 1 time (260C, 10s) Criteria: Products whose drifts before and after the reliability tests do not exceed the values below are considered to be in spec. Sensitivity Vh (Ta=25C) Within 1.5% Offset Voltage Vof (Ta=25C) Within 100mV Linearity (Ta=25C) Within 1% MS1263-E-05 2013/06 - 11 - [CQ-2064] Precautions <Storage Environment> Products should be stored at an appropriate temperature and humidity (5 to 35C, 40 to 85%RH). Keep products away from chlorine and corrosive gas. <Long-term Storage> Long-term storage may result in poor lead solderability and degraded electrical performance even under proper conditions. For those parts, which stored long -term shall be check solderability before it is used. For storage longer than 2 years, it is recommended to store in nitrogen atmosphere. Oxygen of atmosphere oxidizes leads of products and lead solderability get worse. <Other precautions> 1) This product should not be used under the environment with corrosive gas including chlorine or sulfur. 2) This product is lead (Pb) free. All leads are plated with 100% tin. Do not store this product alone in high temperature and high humidity environment. Moreover, this product should be mounted on substrate within six months after delivery. 3) This product is damaged when it is used on the following conditions: Supply voltage is applied in the opposite way. Overvoltage which is larger than the value indicated in the specification. 4) This product will be damaged if it is used for a long time with the current (effective current) which exceeds the current rating. Careful attention must be paid so that maximum effective current is smaller than current rating. 5) Since magnetic cores are fragile parts, do not use the fallen products. 6) The characteristic can change by the influences of nearby current and magnetic field. Please make sure of the mounting position. As this product contains gallium arsenide, observe the following procedures for safety. 1) Do not alter the form of this product into a gas, powder, liquid, through burning, crushing, or chemical processing. 2) Observe laws and company regulations when discarding this product. MS1263-E-05 2013/06 - 12 - [CQ-2064] IMPORTANT NOTICE 0. Asahi Kasei Microdevices Corporation ("AKM") reserves the right to make changes to the information contained in this document without notice. When you consider any use or application of AKM product stipulated in this document ("Product"), please make inquiries the sales office of AKM or authorized distributors as to current status of the Products. 1. All information included in this document are provided only to illustrate the operation and application examples of AKM Products. AKM neither makes warranties or representations with respect to the accuracy or completeness of the information contained in this document nor grants any license to any intellectual property rights or any other rights of AKM or any third party with respect to the information in this document. You are fully responsible for use of such information contained in this document in your product design or applications. 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