1PXXXX 04/12/00
ADVANCE INFORMATION
Logic Block Diagram
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2.5V 12-Bit to 24-Bit Registered
Bus Exchanger with 3-State Outputs
PI74ALVTC16268
Product Features
PI74ALVTC16268 is designed for low voltage operation,
VDD = 1.65V to 3.6V
Supports Live Insertion
3.6V I/O Tolerant Inputs and Outputs
Bus Hold
High Drive, 32/64mA @ 3.3V
Uses patented noise reduction circuitry
Power-off high impedance inputs and outputs
Industrial operation at 40°C to +85°C
Packages available:
56-pin 240-mil wide plastic TSSOP (A56)
56-pin 173-mil wide plastic TVSOP (K56)
G1
OE2B
C1
1D
1
B
1
TO 11 OTHER CHANNELS
OE1B
OEA
A1
LE1B
LE2B
LEA1B
LEA2B
SEL
1
1
C1
1D
C1
1D
C1
1D
2
B
1
23
6
28
8
1
29
56
55
30
27
2
Product Description
Pericom Semiconductors PI74ALVTC series of logic
circuits are produced using the Companys advanced
0.35 micron CMOS technology, achieving industry
leading speed.
The PI74ALVTC16268, 12-bit-to-24-bit registered bus
exchanger, is designed for 1.65V to 3.6V VDD
operation.
The device is used for applications in which data must
be transferred from a narrow high-speed bus to a wide,
lower frequency bus.
The device provides synchronous data exchange
between the two ports. Data is stored in the internal
registers on the low-to-high transition of the clock
(CLK) input when the appropriate clock- enable
(CLKEN) inputs are low. The select (SEL) line is
synchronous with CLK and selects 1B or 2B input data
for the A outputs.
For data transfer in the A-to-B direction, a two-stage
pipeline is provided in the A-to-1B path, with a single
storage register in the A-to-2B path. Proper control of
these inputs allows two sequential 12-bit words to be
presented synchronously as a 24-bit word on the B-
port. Data flow is controlled by the active-low output
enables (OEA, OEB). These control terminals are
registered so bus direction changes are synchronous
with CLK.
To ensure the high-impedance state during power up
or power down, OE should be tied to VDD through a
pullup resistor, the minimum value of the resistor is
determined by the current-sinking capability of the
driver.
The family offers both I/O Tolerant, which allows it to
operate in mixed 1.65/3.6V systems, and Bus Hold,
which retains the data inputs last state preventing
floating inputs and eliminating the need for pullup/
down resistors.
To ensure the high-impedance state during power up
or power down, a clock pulse should be applied as
soon as possible and OE should be tied to VDD
through a pullup resistor, the minimum value of the
resistor is determined by the current-sinking capability
of the driver. Because OE is being routed through a
register, the active state of the outputs cannot be
determined prior to the arrival of the first clock pulse.
2PXXXX 04/12/00
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ADVANCE INFORMATION PI74ALVTC16268
2.5V 12-Bit To 24-Bit Registerd
Bus Exchanger with 3-State Outputs
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
25
26
27
28
OEB
CLKENA2
2B4
GND
2B5
2B6
V
DD
2B7
2B8
2B9
GND
2B10
2B11
2B12
1B12
1B11
1B10
GND
1B9
1B8
1B7
V
DD
1B6
1B5
GND
1B4
CLKENA1
CLK
OEA
CLKEN1B
2B3
GND
2B2
2B1
V
DD
A1
A2
A3
GND
A4
A5
A6
A7
A8
A9
GND
A10
A11
A12
V
DD
1B1
1B2
GND
1B3
CLKEN2B
SEL
32
31
30
29
Pin Description Pin Configuration
Pin Name Description
OE Output Enable Input (Active LOW)
CLK Clock
SEL Select (Active Low)
CLKEN Clock Enable (Active Low)
A,1B,2B 3-State Outputs
GND Ground
VDD Power
Notes:
1. H = High Signal Level, L = Low Signal Level, X = Irrelevant,
Z = High Impedance, ↑ = Transition, Low to High
2. Two CLK edges are needed to propagate data
3. Output level before indicated steady state input conditions
were established.
Truth Tables(1)
A to B STORAGE (OEB = L)
B to A STORAGE (OEA = L)
STUPNISTUPTUO
KLCAEOBEOA B2,B1
↑HHZZ
↑HLZ evitcA
↑LH evitcAZ
↑LL evitcAevitcA
STUPNISTUPTUO
1ANEKLC2ANEKLCKLCAB1B2
HHXX0B1 )2( 0B2 )3(
LX↑LL
)2( X
LX↑HH
)2( X
XL↑LXL
XL↑HXH
STUPNI stuptuO
A
B1NEKLCB2NEKLCKLCLESB1B2
HXXHXX0A
)3(
XHXLXX0A
)3(
LL↑HLX L
LL↑HHX H
XL↑LXL L
XL↑LXH H
56-Pin
A, K
Output Enable
3PXXXX 04/12/00
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ADVANCE INFORMATION PI74ALVTC16268
2.5V 12-Bit To 24-Bit Registerd
Bus Exchanger with 3-State Outputs
Note:
Stresses greater than those listed under MAXIMUM
RATINGS may cause permanent damage to the device. This
is a stress rating only and functional operation of the device
at these or any other conditions above those indicated in the
operational sections of this specification is not implied.
Exposure to absolute maximum rating conditions for
extended periods may affect reliability.
Supply Voltage Range, VDD ........................................................ 0.5V to 4.6V
Input Voltage Range, VI................................................................ 0.5V to 4.6V
Output Voltage Range, VO (3-Stated) .............................. 0.5V to 4.6V
Output Voltage Range, VO(1) (Active) .................. 0.5V to VDD +0.5V
DC Input Diode Current (IIK) VI < 0V ........................................ 50mA
DC Output Diode Current (IOK)
VO < 0V................................................................................... 50mA
VO > VDD .................................................................................................... ±50mA
DC Output Source/Sink Current (IOH/IOL) ........................... 4/128mA
DC VDD or GND Current per Supply Pin (ICC or GND) ............ ±100mA
Storage Temperature Range, Tstg .................................. 65°C to150°C
Recommended Operating Conditions(2)
Maximum Ratings
(Above which the useful life may be impaired. For user guidelines, not tested.)
Notes:
1. Absolute maximum of IO must be observed.
2. Unused control inputs must be held HIGH or LOW to prevent them from floating.
3 As measured between 0.8V and 2.0V, VDD
= 3.0V.
.niM.xaMstinU
V
DD
egatlovylppuS gnitarepO56.16.3
V
ylnOnoitneteRataD2.16.3
V
HI
egatlovtupnilevel-hgiHV
DD
V6.3otV7.2=0.2
V
LI
egatlovtupnilevel-woLV
DD
V6.3otV7.2=8.0
V
I
egatlovtupnI3.06.3
V
O
egatlovtuptuO etatSevitcA0V
DD
etatSffO06.3
InitnerructuptuO
HO
I/
LO
V
DD
V6.3otV0.3=
V
DD
V6.3otV0.3=
V
DD
V7.2otV3.2=
V
DD
V59.1otV56.1=
46/23
42±
81±
6±
Am
∆/t ∆vetarllafroesirnoitsisnarttupnI
)3(
001V/sn
T
A
erutarepmetria-eerfgnitarepO −0458C
4PXXXX 04/12/00
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ADVANCE INFORMATION PI74ALVTC16268
2.5V 12-Bit To 24-Bit Registerd
Bus Exchanger with 3-State Outputs
Electrical Characteristics over Recommended Operating Free-Air Temperature Range
(unless otherwise noted)
DC Characteristics (2.7V<VDD ≤≤
≤≤
≤ 3.6V)
retemaraPsnoitidnoCV
DD
.niM.pyT.xaMstinU
V
KI
edoiDpmalCtupnII
KI
=−Am810.32.1
V
V
HO
egatloVtuptuOleveLHGIH
I
HO
=−001 µA6.3-7.2V
DD
2.0
I
HO
=−Am217.22.2
I
HO
=−Am81
0.3
4.2
I
HO
=−Am422.2
I
HO
=−Am230.2
V
LO
egatloVtuptuOleveLWOL
I
LO
=001 µA6.3-7.22.0
I
LO
=21Am7.24.0
I
LO
=81Am
0.3
4.0
I
LO
=42Am54.0
I
LO
=23Am5.0
I
LO
=46Am55.0
I
I
tnerruCegakaeLtupnIV
I
V=
DD
DNGro,6.30.5±
µA
I
ZO
egakaeLtuptuOetatS-3V
O
V6.3=7.201±
I
FFO
tnerruCegakaeLFFO-rewoPV
I
Vro
O
≤V6.30 01
I
DLOH
tnerruCdloHsuB
stuptuOBroA
V
I
V8.0= 0.3 57
V
I
V0.2=57
V
I
V6.3ot0=6.3005±
I
DD
tnerruCylppuStnecseiuQ V
I
V=
DD
DNGro
6.3-7.2
05
V
DD
≤V(
I
V,
O
)≤V6.305±
∆I
DD
IniesaercnI
DD
tupnirep V
HI
V=
DD
,V6.0
VtastupnirehtO
DD
dnGro 004
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ADVANCE INFORMATION PI74ALVTC16268
2.5V 12-Bit To 24-Bit Registerd
Bus Exchanger with 3-State Outputs
DC Characteristics (2.3V ≤≤
≤≤
≤VDD ≤≤
≤≤
≤ 2.7V)
Note:
1. Not Guaranteed
noitpircseDsretemaraPsnoitidnoCV
DD
.niM.pyT.xaMstinU
V
KI
edoiDpmalCtupnII
KI
Am81=3.22.1
V
V
HO
egatloVtuptuOleveLHGIH
I
HO
001= µA7.2-3.2V
DD
2.0
I
HO
Am21= 3.2 8.1
I
HO
Am81=7.1
V
LO
egatloVtuptuOleveLWOL
I
LO
001= µA7.2-3.22.0
I
LO
Am21=
3.2
4.0
I
LO
Am81=5.0
I
LO
Am42=55.0
I
I
tnerruCegakaeLtupnIV
I
V=
DD
DNGro7.20.5±
µAI
ZO
egakaeLtuptuOetatS-3V
O
6.3= V3.201±
I
FFO
tnerruCegakaeLFFO-rewoPV
I
Vro
O
6.3≤ V0 01
I
DLOH )1(
tnerruCdloHsuB
stuptuOBroA
V
I
V7.0= 5.2 09
µA
V
I
V7.1=09
I
DD
tnerruCylppuStnecseiuQ V
I
V=
DD
DNGro
7.2-3.2
04
V
DD
≤V(
I
V,
O
)≤V6.304±
Ι∆
DD
niesaercnII
DD
tupnirep V
HI
V=
DD
,V6.0
VtastupnI
DD
dnGro 004
Electrical Characteristics over Recommended Operating Free-Air Temperature Range
(unless otherwise noted; continued from previous page)
6PXXXX 04/12/00
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ADVANCE INFORMATION PI74ALVTC16268
2.5V 12-Bit To 24-Bit Registerd
Bus Exchanger with 3-State Outputs
DC Characteristics (1.65V ≤≤
≤≤
≤ VDD ≤≤
≤≤
≤ 1.95V)
Electrical Characteristics over Recommended Operating Free-Air Temperature Range
(unless otherwise noted; continued from previous page)
Note:
1. Not Guaranteed
noitpircseDsretemaraPsnoitidnoCV
DD
.niM.pyT.xaMstinU
V
KI
edoiDpmalCtupnII
KI
Am81=56.12.1
V
V
HO
egatloVtuptuOleveLHGIH I
HO
001= µA59.1-56.1V
DD
2.0
I
HO
Am6=
56.1
4.1
V
LO
egatloVtuptuOleveLWOL I
LO
001= µA2.0
I
LO
Am6=3.0
I
I
tnerruCegakaeLtupnIV
I
V=
DD
DNGro59.10.5±
µA
I
ZO
egakaeLtuptuOetatS-3V
O
6.3= V56.101±
I
FFO
tnerruCegakaeLFFO-rewoPV
I
V=
O
6.3≤ V0 01
I
DLOH )1(
tnerruCdloHsuB
stuptuOBroA
V
I
4.0= 56.1 05
V
I
3.1=05
I
DD
tnerruCylppuStnecseiuQ V
I
V=
DD
DNGro
59.1-56.1
02
V
DD
≤V(
I
V,
O
)≤V6.302±
Ι∆
DD
niesaercnII
DD
tupnirep V
I
V=
DD
,V60
VtastupnirehtO
DD
dnGro 004
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ADVANCE INFORMATION PI74ALVTC16268
2.5V 12-Bit To 24-Bit Registerd
Bus Exchanger with 3-State Outputs
Timing Requirements Over Operating Range
Note:
1. Unused control inputs must be held HIGH or LOW to prevent them from floating.
sretemaraPnoitpircseD
V
DD
V8.1=
V51.0±
V
DD
V5.2=
V2.0±
V
DD
V3.3=
V3.0± stinU
.niM.xaM.niM.xaM.niM.xaM
f
kcolc
kcolC
ycneuqerf 081081zHM
t
W
,noitarudesluP
rohgihKLC
wol
33
sn
t
US
emitputeS
KLCerofebatadA ↑4.33
KLCerofebatadB ↑0.18.0
KLCerofebLES ↑3.11.1
ro1ANEKLC
ANEKLC 2
KLCerofeb ↑8.25.2
ro1BNEKLC
BNEKLC 2
KLCerofeb ↑5.22.2
KLCerofebEO ↑2.38.2
t
h
emitdloH
KLCretfaatadA ↑2.01.0
KLCretfaatadB ↑3.11.1
KLCretfaLES ↑0.18.0
ro1ANEKLC
ANEKLC 2
KLCretfa ↑4.03.0
ro1BNEKLC
EKLC Ν2B
KLCretfa ↑5.04.0
KLCretfaEO ↑2.01.0
8PXXXX 04/12/00
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ADVANCE INFORMATION PI74ALVTC16268
2.5V 12-Bit To 24-Bit Registerd
Bus Exchanger with 3-State Outputs
Switching Characteristics Over Operating Range
Operating Characteristics, TA= 25°C
Notes:
1. Unused control inputs must be held HIGH or LOW to prevent them from floating.
2. Minimum limits are guaranteed but not tested on Propagation Delays.
retemaraP morF
)tupnI(
oT
)tuptuO(
V
DD
V8.1=
V51.0±
V
DD
V5.2=
V2.0±
V
DD
V3.3=
V3.0± stinU
.niM.xaM.niM.xaM.niM.xaM
f
xam
081081zHM
t
dp
KLC
B8.14.53.18.3
sn
)B1(A7.18.42.14.3
)B2(B8.18.43.14.3
)LES(A4.28.57.11.4
t
ne
KLC
B6.21.68.13.4
t
sid
B5.29.58.11.4
t
ne
A8.11.53.16.3
t
sid
A1.20.55.15.3
sretemaraPsnoitidnoCtseT
V
DD
V2.0±V5.2=V
DD
V3.0±V3.3=
stinU
lacipyTlacipyT
rewoPdpC
noitapissiD
ecnaticapaC
stuptuO
delbanE C
L
,Fp0=
zHM01=f
DBTDBT
Fp
stuptuO
delbasiD DBTDBT
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ADVANCE INFORMATION PI74ALVTC16268
2.5V 12-Bit To 24-Bit Registerd
Bus Exchanger with 3-State Outputs
Test Circuits and Switching Waveforms
Parameter Measurement Information (VDD = 1.65V - 3.6V)
Setup, Hold, and Release Timing
Pulse Width
Switch Position
Propagation Delay
Enable Disable Timing
Notes:
A. CL includes probe and jig capacitance.
B. Waveform 1 is for an output with internal conditions such that
the output is LOW except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that
the output is HIGH except when disabled by the output control.
C. All input pulses are supplied by generators having the following
characteristics: PRR ≤ 10 MHz, ZO = 50Ω,
tr ≤ 2ns, tf ≤ 2ns, measured from 10% to 90%, unless
otherwise specified.
D. The outputs are measured one at a time with one transition per
measurement.
Pericom Semiconductor Corporation
2380 Bering Drive • San Jose, CA 95131 • 1-800-435-2336 • Fax (408) 435-1100 • http://www.pericom.com
C
L
R
1
500Ω
30pF
From Output
Under Test
3.3V/2.5V V
DD
GND
2 x V
DD
Open
(See Note A)
R
L
500Ω
C
L
R
1
1kΩ
30pF
From Output
Under Test
1.8V V
DD
GND
2 x V
DD
Open
(See Note A)
R
L
1kΩ
Data
Input t
H
V
DD
t
SU
0V
Timing
Input V
DD
0V
V
DD/2
V
DD/2
tseT1S
t
DP
nepO
t
ZLP
/t
LZP
x2V
DD
t
ZHP
/t
HZP
DNG
Low-High-Low
Pulse
t
W
High-Low-High
Pulse
V
DD
0V
V
DD
0V
V
DD/2
V
DD/2
Input
tPLH
tPLH
tPHL
0V
0V
Output
Opposite Phase
Input Transition
VDD
VOL
tPHL
VDD/2
VDD/2
VDD/2
VDD
VDD
Output
Control
(Active LOW)
Output
Waveform 2
S1 at GND
(
see Note B
)
t
PZL
t
PLZ
V
DD
0V
V
DD
V
OL
0V
Output
Waveform 1
S1 at 2xV
DD
(see Note B)
+0.15V
-0.15V V
OH
V
DD
t
PHZ
t
PZH
V
DD/2
V
DD/2
V
DD
/2
