DATA SH EET
Product specification
Supersedes data of 2004 May 05 2004 Jul 30
DISCRETE SEMICONDUCTORS
PDTA115E series
PNP resistor-equipped transistors;
R1 = 100 kΩ, R2 = 100 kΩ
2004 Jul 30 2
Philips Semiconductors Product specification
PNP resistor-equipped transistors;
R1 = 100 kΩ, R2 = 100 kΩPDTA115E series
FEATURES
•Built-in bias resistors
•Simplified circuit design
•Reduction of component count
•Reduced pick and place costs.
APPLICATIONS
•General purpose switching and amplification
•Inverter and interface circuits
•Circuit driver.
QUICK REFERENCE DATA
DESCRIPTION
PNP resistor-equipped transistor (see “Simplified outline,
symbol and pinning” for package details).
SYMBOL PARAMETER TYP. MAX. UNIT
VCEO collector-emitter
voltage −−50 V
IOoutput current (DC) −−20 mA
R1 bias resistor 100 −kΩ
R2 bias resistor 100 −kΩ
PRODUCT OVERVIEW
Note
1. * = p: Made in Hong Kong.
* = t: Made in Malaysia.
* = W: Made in China.
TYPE NUMBER PACKAGE MARKING CODE NPN COMPLEMENT
PHILIPS EIAJ
PDTA115EE SOT416 SC-75 5E PDTC115EE
PDTA115EEF SOT490 SC-89 6B PDTC115EEF
PDTA115EK SOT346 SC-59 62 PDTC115EK
PDTA115EM SOT883 SC-101 F6 PDTC115EM
PDTA115ES SOT54 (TO-92) SC-43 TA115E PDTC115ES
PDTA115ET SOT23 −*AB(1) PDTC115ET
PDTA115EU SOT323 SC-70 *7C(1) PDTC115EU
2004 Jul 30 3
Philips Semiconductors Product specification
PNP resistor-equipped transistors;
R1 = 100 kΩ, R2 = 100 kΩPDTA115E series
SIMPLIFIED OUTLINE, SYMBOL AND PINNING
TYPE NUMBER SIMPLIFIED OUTLINE AND SYMBOL PINNING
PIN DESCRIPTION
PDTA115ES 1 base
2 collector
3 emitter
PDTA115EE 1 base
PDTA115EEF 2 emitter
PDTA115EK 3 collector
PDTA115ET
PDTA115EU
PDTA115EM 1 base
2 emitter
3 collector
handbook, halfpage
MAM338
1
2
3
R1
R2
2
3
1
handbook, halfpage
MDB271
Top view
12
3
1
2
3
R1
R2
handbook, halfpage
MDB267
2
1
3
Bottom view
1
2
3
R1
R2
2004 Jul 30 4
Philips Semiconductors Product specification
PNP resistor-equipped transistors;
R1 = 100 kΩ, R2 = 100 kΩPDTA115E series
ORDERING INFORMATION
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 60134).
Notes
1. Refer to standard mounting conditions.
2. Reflow soldering is the only recommended soldering method.
3. Refer to SOT883 standard mounting conditions; FR4 with 60 µm copper strip line.
TYPE NUMBER PACKAGE
NAME DESCRIPTION VERSION
PDTA115EE −plastic surface mounted package; 3 leads SOT416
PDTA115EEF −plastic surface mounted package; 3 leads SOT490
PDTA115EK −plastic surface mounted package; 3 leads SOT346
PDTA115EM −leadless ultra small plastic package; 3 solder lands; body
1.0 ×0.6 ×0.5 mm SOT883
PDTA115ES −plastic single-ended leaded (through hole) package; 3 leads SOT54
PDTA115ET −plastic surface mounted package; 3 leads SOT23
PDTA115EU −plastic surface mounted package; 3 leads SOT323
SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT
VCBO collector-base voltage open emitter −−50 V
VCEO collector-emitter voltage open base −−50 V
VEBO emitter-base voltage open collector −−10 V
VIinput voltage
positive −+10 V
negative −−40 V
IOoutput current (DC) −−20 mA
ICM peak collector current −−100 mA
Ptot total power dissipation Tamb ≤25 °C
SOT23 note 1 −250 mW
SOT54 note 1 −500 mW
SOT323 note 1 −200 mW
SOT346 note 1 −250 mW
SOT416 note 1 −150 mW
SOT490 notes 1 and 2 −250 mW
SOT883 notes 2 and 3 −250 mW
Tstg storage temperature −65 +150 °C
Tjjunction temperature −150 °C
Tamb operating ambient temperature −65 +150 °C
2004 Jul 30 5
Philips Semiconductors Product specification
PNP resistor-equipped transistors;
R1 = 100 kΩ, R2 = 100 kΩPDTA115E series
THERMAL CHARACTERISTICS
Notes
1. Refer to standard mounting conditions.
2. Reflow soldering is the only recommended soldering method.
3. Refer to SOT883 standard mounting conditions; FR4 with 60 µm copper strip line.
CHARACTERISTICS
Tamb =25°C unless otherwise specified.
SYMBOL PARAMETER CONDITIONS VALUE UNIT
Rth(j-a) thermal resistance from junction to ambient Tamb ≤25 °C
SOT23 note 1 500 K/W
SOT54 note 1 250 K/W
SOT323 note 1 625 K/W
SOT346 note 1 500 K/W
SOT416 note 1 833 K/W
SOT490 notes 1 and 2 500 K/W
SOT883 notes 2 and 3 500 K/W
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
ICBO collector-base cut-off current VCB =−50 V; IE=0A −−−100 nA
ICEO collector-emitter cut-off current VCE =−30 V; IB=0A −−−1µA
VCE =−30 V; IB=0A;
Tj= 150 °C−−−50 µA
IEBO emitter-base cut-off current VEB =−5 V; IC=0A −−−50 µA
hFE DC current gain VCE =−5 V; IC=−5mA 80 −−
VCEsat collector-emitter saturation voltage IC=−5 mA; IB=−0.25 mA −−−150 mV
Vi(off) input-off voltage IC=−100 µA; VCE =−5V −−1.2 −0.5 V
Vi(on) input-on voltage IC=−1 mA; VCE =−0.3 V −3−1.6 −V
R1 input resistor 70 100 130 kΩ
resistor ratio 0.8 1 1.2
Cccollector capacitance IE=i
e= 0 A; VCB =−10 V;
f = 1 MHz −−3pF
R2
R1
--------
2004 Jul 30 6
Philips Semiconductors Product specification
PNP resistor-equipped transistors;
R1 = 100 kΩ, R2 = 100 kΩPDTA115E series
PACKAGE OUTLINES
UNIT A1
max bpcDEe
1
H
E
L
p
Qw
REFERENCES
OUTLINE
VERSION EUROPEAN
PROJECTION ISSUE DATE
IEC JEDEC EIAJ
mm 0.1 0.30
0.15 0.25
0.10 1.8
1.4 0.9
0.7 0.5
e
11.75
1.45 0.2
v
0.2
DIMENSIONS (mm are the original dimensions)
0.45
0.15 0.23
0.13
SOT416 SC-75
w
M
bp
D
e1
e
A
A1
Lp
Q
detail X
HE
EAB
B
v
M
A
0 0.5 1 mm
scale
A
0.95
0.60
c
X
12
3
Plastic surface mounted package; 3 leads SOT416
97-02-28
2004 Jul 30 7
Philips Semiconductors Product specification
PNP resistor-equipped transistors;
R1 = 100 kΩ, R2 = 100 kΩPDTA115E series
UNIT b
p
cDE e
1
H
E
L
p
wv
REFERENCES
OUTLINE
VERSION EUROPEAN
PROJECTION ISSUE DATE
98-10-23
IEC JEDEC EIAJ
mm 0.33
0.23 0.2
0.1 1.7
1.5 0.95
0.75 0.5
e
1.0 1.7
1.5 0.1
0.1
DIMENSIONS (mm are the original dimensions)
0.5
0.3
SOT490 SC-89
bp
D
e1
e
A
Lp
detail X
HE
E
w
M
v
M
A
B
AB
0 1 2 mm
scale
A
0.8
0.6
c
X
12
3
Plastic surface mounted package; 3 leads SOT490
2004 Jul 30 8
Philips Semiconductors Product specification
PNP resistor-equipped transistors;
R1 = 100 kΩ, R2 = 100 kΩPDTA115E series
UNIT A
1
b
p
cDE e
1
H
E
L
p
Qwv
REFERENCES
OUTLINE
VERSION EUROPEAN
PROJECTION ISSUE DATE
IEC JEDEC EIAJ
mm 0.50
0.35 0.26
0.10 3.1
2.7 1.7
1.3 0.95
e
1.9 3.0
2.5 0.33
0.23 0.2
0.2
DIMENSIONS (mm are the original dimensions)
0.6
0.2
SOT346 TO-236 SC-59
bp
D
e1
e
A
A1
Lp
Q
detail X
HE
E
w
M
v
M
A
B
A
B
0 1 2 mm
scale
A
1.3
1.0 0.1
0.013
c
X
12
3
Plastic surface mounted package; 3 leads SOT346
98-07-17
2004 Jul 30 9
Philips Semiconductors Product specification
PNP resistor-equipped transistors;
R1 = 100 kΩ, R2 = 100 kΩPDTA115E series
UNIT A
1
max.
A
(1)
bb
1
e
1
eLL
1
REFERENCES
OUTLINE
VERSION EUROPEAN
PROJECTION ISSUE DATE
IEC JEDEC JEITA
mm 0.50
0.46 0.20
0.12 0.55
0.47
0.03 0.62
0.55 0.35 0.65
DIMENSIONS (mm are the original dimensions)
Note
1. Including plating thickness
0.30
0.22
0.30
0.22
SOT883 SC-101 03-02-05
03-04-03
DE
1.02
0.95
L
E
2
3
1
b
b1
A1
A
D
L1
0 0.5 1 mm
scale
Leadless ultra small plastic package; 3 solder lands; body 1.0 x 0.6 x 0.5 mm SOT883
e
e1
2004 Jul 30 10
Philips Semiconductors Product specification
PNP resistor-equipped transistors;
R1 = 100 kΩ, R2 = 100 kΩPDTA115E series
UNIT A
REFERENCES
OUTLINE
VERSION EUROPEAN
PROJECTION ISSUE DATE
IEC JEDEC JEITA
mm 5.2
5.0
b
0.48
0.40
c
0.45
0.38
D
4.8
4.4
d
1.7
1.4
E
4.2
3.6
L
14.5
12.7
e
2.54
e1
1.27
L
1(1)
max.
2.5
b1
0.66
0.55
DIMENSIONS (mm are the original dimensions)
Note
1. Terminal dimensions within this zone are uncontrolled to allow for flow of plastic and terminal irregularities.
SOT54 TO-92 SC-43A 97-02-28
04-06-28
A L
0 2.5 5 mm
scale
b
c
D
b
1
L1
d
E
Plastic single-ended leaded (through hole) package; 3 leads SOT54
e1e
1
2
3
2004 Jul 30 11
Philips Semiconductors Product specification
PNP resistor-equipped transistors;
R1 = 100 kΩ, R2 = 100 kΩPDTA115E series
UNIT A
1
max. b
p
cDE e
1
H
E
L
p
Qwv
REFERENCES
OUTLINE
VERSION EUROPEAN
PROJECTION ISSUE DATE
97-02-28
99-09-13
IEC JEDEC EIAJ
mm 0.1 0.48
0.38 0.15
0.09 3.0
2.8 1.4
1.2 0.95
e
1.9 2.5
2.1 0.55
0.45 0.1
0.2
DIMENSIONS (mm are the original dimensions)
0.45
0.15
SOT23 TO-236AB
bp
D
e1
e
A
A1
Lp
Q
detail X
HE
E
w
M
v
M
A
B
AB
0 1 2 mm
scale
A
1.1
0.9
c
X
12
3
Plastic surface mounted package; 3 leads SOT23
2004 Jul 30 12
Philips Semiconductors Product specification
PNP resistor-equipped transistors;
R1 = 100 kΩ, R2 = 100 kΩPDTA115E series
UNIT A1
max bpcD Ee1HELpQwv
REFERENCES
OUTLINE
VERSION EUROPEAN
PROJECTION ISSUE DATE
IEC JEDEC EIAJ
mm 0.1
1.1
0.8 0.4
0.3 0.25
0.10 2.2
1.8 1.35
1.15 0.65
e
1.3 2.2
2.0 0.23
0.13 0.20.2
DIMENSIONS (mm are the original dimensions)
0.45
0.15
SOT323 SC-70
w
M
bp
D
e1
e
A
B
A1
Lp
Q
detail X
c
HE
E
v
M
A
AB
y
0 1 2 mm
scale
A
X
12
3
Plastic surface mounted package; 3 leads SOT323
97-02-28
2004 Jul 30 13
Philips Semiconductors Product specification
PNP resistor-equipped transistors;
R1 = 100 kΩ, R2 = 100 kΩPDTA115E series
DATA SHEET STATUS
Notes
1. Please consult the most recently issued data sheet before initiating or completing a design.
2. The product status of the device(s) described in this data sheet may have changed since this data sheet was
published. The latest information is available on the Internet at URL http://www.semiconductors.philips.com.
3. For data sheets describing multiple type numbers, the highest-level product status determines the data sheet status.
LEVEL DATA SHEET
STATUS(1) PRODUCT
STATUS(2)(3) DEFINITION
I Objective data Development This data sheet contains data from the objective specification for product
development. Philips Semiconductors reserves the right to change the
specification in any manner without notice.
II Preliminary data Qualification This data sheet contains data from the preliminary specification.
Supplementary data will be published at a later date. Philips
Semiconductors reserves the right to change the specification without
notice, in order to improve the design and supply the best possible
product.
III Product data Production This data sheet contains data from the product specification. Philips
Semiconductors reserves the right to make changes at any time in order
to improve the design, manufacturing and supply. Relevant changes will
be communicated via a Customer Product/Process Change Notification
(CPCN).
DEFINITIONS
Short-form specification The data in a short-form
specification is extracted from a full data sheet with the
same type number and title. For detailed information see
the relevant data sheet or data handbook.
Limiting values definition Limiting values given are in
accordance with the Absolute Maximum Rating System
(IEC 60134). Stress above one or more of the limiting
values may cause permanent damage to the device.
These are stress ratings only and operation of the device
attheseoratanyotherconditionsabovethosegiveninthe
Characteristics sections of the specification is not implied.
Exposure to limiting values for extended periods may
affect device reliability.
Application information Applications that are
described herein for any of these products are for
illustrative purposes only. Philips Semiconductors make
norepresentationorwarrantythatsuchapplications willbe
suitable for the specified use without further testing or
modification.
DISCLAIMERS
Life support applications These products are not
designed for use in life support appliances, devices, or
systems where malfunction of these products can
reasonably be expected to result in personal injury. Philips
Semiconductorscustomers usingorsellingtheseproducts
for use in such applications do so at their own risk and
agree to fully indemnify Philips Semiconductors for any
damages resulting from such application.
Right to make changes Philips Semiconductors
reserves the right to make changes in the products -
including circuits, standard cells, and/or software -
described or contained herein in order to improve design
and/or performance. When the product is in full production
(status ‘Production’), relevant changes will be
communicated via a Customer Product/Process Change
Notification (CPCN). Philips Semiconductors assumes no
responsibility or liability for the use of any of these
products, conveys no licence or title under any patent,
copyright, or mask work right to these products, and
makes no representations or warranties that these
products are free from patent, copyright, or mask work
right infringement, unless otherwise specified.
© Koninklijke Philips Electronics N.V. 2004 SCA76
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner.
The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed
without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license
under patent- or other industrial or intellectual property rights.
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Contact information
For additional information please visit http://www.semiconductors.philips.com. Fax: +31 40 27 24825
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Printed in The Netherlands R75/03/pp14 Date of release: 2004 Jul 30 Document order number: 9397 750 13648
