Parameter Max. Units
ID @ TC = 25°C Continuous Drain Current, VGS @ 10V 13 5V
ID @ TC = 100°C Continuous Drain Current, VGS @ 10V 96VA
IDM Pulsed Drain Current Q700
PD @TC = 25°C Power Dissipation 200 W
Linear Derating Factor 1.3 W/°C
VGS Gate-to-Source Voltage ± 20 V
EAS Single Pulse Avalanche EnergyR380 mJ
EAS (6 sigma) Single Pulse Avalanche Energy Tested ValueX1220
IAR Avalanche CurrentQSee Fig.12a, 12b, 15, 16 A
EAR Repetitive Avalanche EnergyWmJ
dv/dt Peak Diode Recovery dv/dt S2.0 V/ns
TJOperating Junction and -55 to + 175
TSTG Storage Temperature Range
Soldering Temperature, for 10 seconds 300 (1.6mm from case ) °C
HEXFET® Power MOSFET
Absolute Maximum Ratings
VDSS = 55V
RDS(on) = 4.7mΩ
ID = 135AV
06/10/02
www.irf.com 1
AUTOMOTIVE MOSFET
PD - 94428
HEXFET(R) is a registered trademark of International Rectifier.
Description
Specifically designed for Automotive applications, this
HEXFET® Power MOSFET utilizes the latest processing
techniques to achieve extremely low on-resistance per
silicon area. Additional features of this product are a 175°C
junction operating temperature, fast switching speed and
improved repetitive avalanche rating . These features com-
bine to make this design an extremely efficient and reliable
device for use in Automotive applications and a wide variety
of other applications.
S
D
G
Features
●Advanced Process Technology
●Ultra Low On-Resistance
●175°C Operating Temperature
●Fast Switching
●Repetitive Avalanche Allowed up to Tjmax
Typical Applications
●Climate Control
●ABS
●Electronic Braking
●Windshield Wipers
IRF2805S
IRF2805L
D2Pak
IRF2805S TO-262
IRF2805L
Thermal Resistance Parameter Typ. Max. Units
RθJC Junction-to-Case ––– 0.75
RθJA Junction-to-Ambient(PCB Mounted, steady state)** ––– 40 °C/W
IRF2805S/IRF2805L
2www.irf.com
Parameter Min. Typ. Max. Units Conditions
V(BR)DSS Drain-to-Source Breakdown Voltage 55 ––– ––– V VGS = 0V, ID = 250µA
∆V(BR)DSS/∆TJBreakdown Voltage Temp. Coefficient ––– 0.06 ––– V/°C Reference to 25°C, ID = 1mA
RDS(on) Static Drain-to-Source On-Resistance ––– 3.9 4.7 mΩVGS = 10V, ID = 104A T
VGS(th) Gate Threshold Voltage 2.0 ––– 4.0 V VDS = 10V, ID = 250µA
gfs Forward Transconductance 91 ––– ––– S VDS = 25V, ID = 104A
––– ––– 20 µA VDS = 55V, VGS = 0V
––– ––– 250 VDS = 44V, VGS = 0V, TJ = 150°C
Gate-to-Source Forward Leakage ––– ––– 200 VGS = 20V
Gate-to-Source Reverse Leakage ––– ––– -200 nA VGS = -20V
QgTotal Gate Charge ––– 150 230 ID = 104A
Qgs Gate-to-Source Charge ––– 38 57 nC VDS = 44V
Qgd Gate-to-Drain ("Miller") Charge ––– 52 78 VGS = 10VT
td(on) Turn-On Delay Time ––– 14 ––– VDD = 28V
trRise Time ––– 120 ––– ID = 104A
td(off) Turn-Off Delay Time ––– 68 ––– RG = 2.5Ω
tfFall Time ––– 11 0 –– – VGS = 10V T
Between lead,
––– ––– 6mm (0.25in.)
from package
and center of die contact
Ciss Input Capacitance ––– 5110 ––– VGS = 0V
Coss Output Capacitance ––– 1190 ––– pF VDS = 25V
Crss Reverse Transfer Capacitance ––– 210 ––– ƒ = 1.0MHz, See Fig. 5
Coss Output Capacitance ––– 6470 ––– VGS = 0V, VDS = 1.0V, ƒ = 1.0MHz
Coss Output Capacitance ––– 860 ––– VGS = 0V, VDS = 44V, ƒ = 1.0MHz
Coss eff. Effective Output Capacitance U––– 1600 ––– VGS = 0V, VDS = 0V to 44V
nH
Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
LDInternal Drain Inductance
LSInternal Source Inductance ––– –––
S
D
G
IGSS
ns
4.5
7.5
IDSS Drain-to-Source Leakage Current
Q Repetitive rating; pulse width limited by
max. junction temperature. (See fig. 11).
R Starting TJ = 25°C, L = 0.08mH
RG = 25Ω, IAS = 104A. (See Figure 12).
SISD ≤ 104A, di/dt ≤ 240A/µs, VDD ≤ V(BR)DSS,
TJ ≤ 175°C
T Pulse width ≤ 400µs; duty cycle ≤ 2%.
Notes:
S
D
G
Parameter Min. Typ. Max. Units Conditions
ISContinuous Source Current MOSFET symbol
(Body Diode) ––– ––– showing the
ISM Pulsed Source Current integral reverse
(Body Diode) Q––– ––– p-n junction diode.
VSD Diode Forward Voltage ––– ––– 1.3 V TJ = 25°C, IS = 104A, VGS = 0VT
trr Reverse Recovery Time ––– 80 120 ns TJ = 25°C, IF = 104A
Qrr Reverse Recovery Charge ––– 290 430 nC di/dt = 100A/µsT
ton Forward Turn-On Time Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
Source-Drain Ratings and Characteristics
175V
700 A
U Coss eff. is a fixed capacitance that gives the same charging time
as Coss while VDS is rising from 0 to 80% VDSS .
V Calculated continuous current based on maximum allowable
junction temperature. Package limitation current is 75A.
W Limited by TJmax , see Fig.12a, 12b, 15, 16 for typical repetitive
avalanche performance.
X This value determined from sample failure population. 100%
tested to this value in production.
IRF2805S/IRF2805L
www.irf.com 3
Fig 4. Normalized On-Resistance
Vs. Temperature
Fig 2. Typical Output CharacteristicsFig 1. Typical Output Characteristics
Fig 3. Typical Transfer Characteristics
-60 -40 -20 020 40 60 80 100 120 140 160 180
0.0
0.5
1.0
1.5
2.0
2.5
3.0
T , Junction Temperature ( C)
R , Drain-to-Source On Resistance
(Normalized)
J
DS(on)
°
V =
I =
GS
D
10V
175A
4.0 5.0 6.0 7.0 8.0 9.0 10.0
VGS , Gate-to-Source Voltage (V )
10
100
1000
ID, Drain-to-Source Curr ent A)
TJ = 25°C
TJ = 175°C
VDS = 25V
20µs P ULS E WIDTH
0.1 110 100
VDS, Drain-to-Source Voltage (V)
1
10
100
1000
ID, Drain-to-Source Current (A)
4.5V
20µs PULSE WIDTH
Tj = 25°C
VGS
TOP 15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
BOTTOM 4.5V
0.1 110 100
VDS, Drain-to-Source Voltage (V)
10
100
1000
ID, Drain-to-Source Current (A)
4.5V
20µs PULSE WIDTH
Tj = 175°C
VGS
TOP 15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
BOTTOM 4.5V
IRF2805S/IRF2805L
4www.irf.com
Fig 8. Maximum Safe Operating Area
Fig 6. Typical Gate Charge Vs.
Gate-to-Source Voltage
Fig 5. Typical Capacitance Vs.
Drain-to-Source Voltage
Fig 7. Typical Source-Drain Diode
Forward Voltage
0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8
VSD, Source-toDrain Voltage (V)
0.1
1.0
10.0
100.0
1000.0
ISD, Reverse Drain Current (A)
TJ = 25°C
TJ = 175° C
VGS = 0V
1 10 100 1000
VDS , Drai n-toSource Vol tage (V)
1
10
100
1000
10000
ID, Drain-to-Source Current (A)
Tc = 25°C
Tj = 175°C
S i ngl e P ulse
1msec
10msec
OPERATION IN THIS AREA
LIMITE D BY RDS(on)
100µsec
110 100
VDS, Drain -t o-Source Voltage (V)
0
2000
4000
6000
8000
10000
C, Capaci tance ( pF)
Coss
Crss
Ciss
VGS = 0V, f = 1 MHZ
Ciss = C gs + C gd , C ds
SHORTED
Cr ss = C
gd
Coss = C
ds + C
gd
0 40 80 120 160 200 240
QG Total Gate Charge (nC)
0
4
8
12
16
20
VGS, Gate-to-Source Voltage (V)
VDS= 44V
VDS= 28V
ID= 104A
IRF2805S/IRF2805L
www.irf.com 5
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
Fig 9. Maximum Drain Current Vs.
Case Temperature
VDS
90%
10%
VGS t
d(on)
t
r
t
d(off)
t
f
VDS
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
RD
VGS
RGD.U.T.
10V
+
-
VDD
Fig 10a. Switching Time Test Circuit
Fig 10b. Switching Time Waveforms
25 50 75 100 125 150 175
0
20
40
60
80
100
120
140
T , Case Temperature ( C)
I , Drain Current (A)
°
C
D
LIMITED BY PACKAGE
0.01
0.1
1
0.00001 0.0001 0.001 0.01 0.1 1
Notes:
1. Dut
y
factor D = t / t
2. Peak T =P x Z + T
1 2
JDM thJC C
P
t
t
DM
1
2
t , Rectangular Pulse Duration (sec)
Thermal Response (Z )
1
thJC
0.01
0.02
0.05
0.10
0.20
D = 0.50
SINGLE PULSE
(
THERMAL RESPONSE
)
IRF2805S/IRF2805L
6www.irf.com
Q
G
Q
GS
Q
GD
V
G
Charge
D.U.T. V
DS
I
D
I
G
3mA
V
GS
.3µF
50KΩ
.2µF
12V
Current Regulator
Same Type as D.U.T.
Current Sampling Resistors
+
-
10 V
Fig 13b. Gate Charge Test Circuit
Fig 13a. Basic Gate Charge Waveform
Fig 12c. Maximum Avalanche Energy
Vs. Drain Current
Fig 12b. Unclamped Inductive Waveforms
Fig 12a. Unclamped Inductive Test Circuit
tp
V
(BR)DSS
I
AS
Fig 14. Threshold Voltage Vs. Temperature
RG
I
AS
0.01
Ω
t
p
D.U.T
L
VDS
+
-VDD
DRIVER
A
15V
20V
VGS
-75 -50 -25 025 50 75 100 125 150 175
TJ , Temperature ( °C )
1.0
2.0
3.0
4.0
-VGS(th) Gate threshold Voltage (V)
ID = 250µA
25 50 75 100 125 150 175
0
200
400
600
800
Starting T , Junction Temperature ( C)
E , Single Pulse Avalanche Energy (mJ)
J
AS
°
ID
TOP
BOTTOM
42.5A
73.5A
104A
IRF2805S/IRF2805L
www.irf.com 7
Fig 15. Typical Avalanche Current Vs.Pulsewidth
Fig 16. Maximum Avalanche Energy
Vs. Temperature
Notes on Repetitive Avalanche Curves , Figures 15, 16:
(For further info, see AN-1005 at www.irf.com)
1. Avalanche failures assumption:
Purely a thermal phenomenon and failure occurs at a
temperature far in excess of T jmax. This is validated for
every part type.
2. Safe operation in Avalanche is allowed as long asTjmax is
not exceeded.
3. Equation below based on circuit and waveforms shown in
Figures 12a, 12b.
4. PD (ave) = Average power dissipation per single
avalanche pulse.
5. BV = Rated breakdown voltage (1.3 factor accounts for
voltage increase during avalanche).
6. Iav = Allowable avalanche current.
7. ∆T = Allowable rise in junction temperature, not to exceed
Tjmax (assumed as 25°C in Figure 15, 16).
tav = Average time in avalanche.
D = Duty cycle in avalanche = tav ·f
ZthJC(D, tav) = Transient thermal resistance, see figure 11)
PD (ave) = 1/2 ( 1.3·BV·Iav) = ∆∆
∆∆
∆T/ ZthJC
Iav = 2∆∆
∆∆
∆T/ [1.3·BV· Zth]
EAS (AR) = PD (ave)·tav
25 50 75 100 125 150 175
Starting TJ , Junction Temperature (°C)
0
100
200
300
400
EAR , Avalanche Energy (mJ)
TOP Single Pulse
BOTTOM 10% Duty Cycle
ID = 104A
1.0E-07 1.0E-06 1.0E-05 1.0E-04 1.0E-03 1.0E-02 1.0E-01
tav (sec)
0.1
1
10
100
1000
10000
Avalanche Current (A)
0.05
Duty Cycle = Single Pulse
0.10
Allowed avalanche Current vs
avalanche pulsewidth, tav
assuming ∆Tj = 25°C due to
avalanche losses. Note: In no
case should Tj be allowed to
exceed Tjmax
0.01
IRF2805S/IRF2805L
8www.irf.com
Peak Diode Recovery dv/dt Test Circuit
P.W. Period
di/dt
Diode Recovery
dv/dt
Ripple ≤5%
Body Diode Forward Drop
Re-Applied
Voltage
Reverse
Recovery
Current Body Diode Forward
Current
V
GS
=10V
V
DD
I
SD
Driver Gate Drive
D.U.T. I
SD
Waveform
D.U.T. V
DS
Waveform
Inductor Curent
D = P.W.
Period
+
-
+
+
+
-
-
-
S
T
R
RGVDD
• dv/dt controlled by RG
• ISD controlled by Duty Factor "D"
• D.U.T. - Device Under Test
D.U.T*Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
Q
* Reverse Polarity of D.U.T for P-Channel
VGS
[ ]
[ ]
*** VGS = 5.0V for Logic Level and 3V Drive Devices
[ ] ***
Fig 17. For N-channel HEXFET® power MOSFETs
IRF2805S/IRF2805L
www.irf.com 9
D2Pak Package Outline
D2Pak Part Marking Information
F530S
THIS IS AN IRF530S WITH
LOT CODE 8024
ASSE MB L ED ON WW 02, 2000
IN THE ASSEMBLY LINE "L"
ASSEMBLY
LOT CODE
INTERNATIONAL
RECTIFIER
LOGO
PART NUMBER
DATE CO DE
YEA R 0 = 2000
WEEK 02
LINE L
IRF2805S/IRF2805L
10 www.irf.com
TO-262 Part Marking Information
TO-262 Package Outline
EXAMPLE: THIS IS AN IRL3103L
LOT CODE 1789
AS S E MB LY
PART N UMBE
R
DATE CODE
WEEK 19
LINE C
LOT CODE
YEAR 7 = 1997
ASSEMBLED ON WW 19, 1997
IN THE ASSEMBLY LINE "C" LOGO
RECTIFIER
INTERNATIONAL
IRF2805S/IRF2805L
www.irf.com 11
Data and specifications subject to change without notice.
This product has been designed and qualified for the Industrial market.
Qualification Standards can be found on IR’s Web site.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information. 06/02
D2Pak Tape & Reel Information
3
4
4
TRR
FEED D IRE CTIO N
1.85 (.0 73)
1.65 (.0 65)
1.60 (.0 63)
1.50 (.0 59)
4.10 (.161)
3.90 (.153)
TRL
FEED DIRE CTION
10.90 (.429)
10.70 (.421) 16.10 (.634)
15.90 (.626)
1.75 (.069)
1.25 (.049)
11.60 (.457)
11.40 (.449) 15.42 (.609)
15.22 (.601)
4.7 2 (.136)
4.5 2 (.178)
24.30 (.957)
23.90 (.941)
0.368 (.0145)
0.342 (.0135)
1.60 (.06 3)
1.50 (.05 9)
13.50 (.532)
12.80 (.504)
330.00
(14.173)
MAX.
27.40 (1.079)
23.90 (.941)
60 .0 0 (2 .3 62)
MIN.
30.40 (1.197)
MAX.
26.40 (1.039)
24.40 (.961)
NO TES :
1. COMFORMS TO EIA-418.
2. CON TROLL ING D IMEN SION: MILLIMETER.
3. DIMENSION M EASURED @ HU B.
4. INCLUDES FLANGE DISTORTION @ OUTER EDGE.
Note: For the most current drawings please refer to the IR website at:
http://www.irf.com/package/