06/29/11
IRFHM8363PbF
HEXFET® Power MOSFET
Notes through are on page 9
Features and Benefits
www.irf.com 1
Applications
• Power Stage for high frequency buck converters
• Battery Protection charge and discharge switches
PD - 97678A
V
DS
30 V
V
gs max
± 20 V
R
DS(on) max
(@V
GS
= 10V)
14.9
(@V
GS
= 4.5V)
20.4
Q
g typ
6.7 nC
I
D
(@T
c(Bottom)
= 25°C)
10
i
A
mΩ
Absolute Maximum Ratings
Parameter Units
V
DS
Drain-to-Source Voltage
V
GS
Gate-to-Source Voltage
I
D
@ T
A
= 25°C Continuous Drain Current, V
GS
@ 10V
I
D
@ T
A
= 70°C Continuous Drain Current, V
GS
@ 10V
I
D
@ T
C(Bottom)
= 25°C Continuous Drain Current, V
GS
@ 10V
I
D
@ T
C(Bottom)
= 100°C Continuous Drain Current, V
GS
@ 10V
I
D
@ T
C
= 25°C Continuous Drain Current, V
GS
@ 10V (Package Limited)
I
DM
Pulsed Drain Current
c
P
D
@T
A
= 25°C
Power Dissipation
g
P
D
@T
C(Bottom)
= 25°C
Power Dissipation
g
Linear Derating Factor
g
T
J
Operating Junction and
T
STG
Storage Temperature Range
V
W
A
°C
Max.
11
18
hi
116
± 20
30
8.6
29
hi
10
i
-55 to + 150
2.7
0.02
19
PQFN Dual 3.3X3.3 mm
D
D
D
D
S
G
G
S
D
D
*
6
6
*
'
'
'
'
7
2
3
9
,
(
:
Note
Form
Quantity
IRFHM8363TRPBF
PQFN Dual 3.3mm x 3.3mm
Tape and Reel
4000
IRFHM8363TR2PBF
PQFN Dual 3.3mm x 3.3mm
Tape and Reel
400
Orderable part number Package Type
Standard Pack
Features
Benefits
Low Thermal Resistance to PCB (< 6.7°C/W)
Enable better thermal dissipation
Low Profile (<1.0mm)
results in
Increased Power Density
Industry-Standard Pinout
⇒
Multi-Vendor Compatibility
Compatible with Existing Surface Mount Techniques
Easier Manufacturing
RoHS Compliant Containing no Lead, no Bromide and no Halogen
Environmentally Friendlier
MSL1, Consumer Qualification
Increased Reliability
IRFHM8363PbF
2www.irf.com
D
S
G
Thermal Resistance
Parameter Typ. Max. Units
RθJC (Bottom)
Junction-to-Case
f
–––
6.7
RθJC (Top)
Junction-to-Case
f
–––
72 °C/W
RθJA
Junction-to-Ambient
g
–––
47
RθJA (<10s)
Junction-to-Ambient
g
–––
32
Static @ T
J
= 25°C (unless otherwise specified)
Parameter Min. Typ. Max. Units
BV
DSS
Drain-to-Source Breakdown Voltage 30 ––– ––– V
ΔΒ
V
DSS
/
Δ
T
J
Breakdown Voltage Temp. Coefficient ––– 0.022 ––– V/°C
R
DS(on)
Static Drain-to-Source On-Resistance ––– 12.2 14.9
––– 16.3 20.4
V
GS(th)
Gate Threshold Voltage 1.35 1.8 2.35 V
Δ
V
GS(th)
Gate Threshold Voltage Coefficient ––– -6.3 ––– mV/°C
I
DSS
Drain-to-Source Leakage Current ––– ––– 1.0
––– ––– 150
I
GSS
Gate-to-Source Forward Leakage ––– ––– 100
Gate-to-Source Reverse Leakage ––– ––– -100
gfs Forward Transconductance 20 ––– ––– S
Q
g
Total Gate Charge ––– 15 ––– nC
Q
g
Total Gate Charge ––– 6.7 –––
Q
gs1
Pre-Vth Gate-to-Source Charge ––– 2.1 –––
Q
gs2
Post-Vth Gate-to-Source Charge ––– 1.0 –––
Q
gd
Gate-to-Drain Charge ––– 2.0 –––
Q
godr
Gate Charge Overdrive ––– 1.6 –––
Q
sw
Switch Charge (Q
gs2
+ Q
gd
)––– 3.0 –––
Q
oss
Output Charge ––– 7.6 ––– nC
R
G
Gate Resistance ––– 1.6
–––
Ω
t
d(on)
Turn-On Delay Time ––– 14 –––
t
r
Rise Time ––– 94 –––
t
d(off)
Turn-Off Delay Time ––– 12 –––
t
f
Fall Time ––– 33 –––
C
iss
Input Capacitance ––– 1165 –––
C
oss
Output Capacitance ––– 260 –––
C
rss
Reverse Transfer Capacitance ––– 100 –––
Avalanche Characteristics
Parameter Units
E
AS
Single Pulse Avalanche Energy
d
mJ
I
AR
Avalanche Current
c
A
Diode Characteristics
Parameter Min. Typ. Max. Units
I
S
Continuous Source Current
(Body Diode)
I
SM
Pulsed Source Current
(Body Diode)
c
V
SD
Diode Forward Voltage ––– ––– 1.3 V
t
rr
Reverse Recovery Time ––– 17 26 ns
Q
rr
Reverse Recovery Charge ––– 24 36 nC
t
on
Forward Turn-On Time Time is dominated by parasitic Inductance
V
DS
= V
GS
, I
D
= 25μA
μA
V
GS
= 4.5V, I
D
= 8.0A
e
V
GS
= 4.5V
V
DS
= 24V, V
GS
= 0V, T
J
= 125°C
mΩ
V
DS
= 24V, V
GS
= 0V
V
GS
= 10V, V
DS
= 15V, I
D
= 10A
Typ.
–––
R
G
=1.8Ω
V
DS
= 10V, I
D
= 10A
I
D
= 10A
I
D
= 10A
V
GS
= 0V
V
DS
= 10V
V
DS
= 24V, V
GS
= 0V
V
DD
= 15V, V
GS
= 4.5V
T
J
= 25°C, I
F
= 10A, V
DD
= 15V
di/dt = 280A/μs
e
T
J
= 25°C, I
S
= 10A, V
GS
= 0V
e
showing the
integral reverse
p-n junction diode.
Conditions
Max.
29
10
ƒ = 1.0MHz
Conditions
V
GS
= 0V, I
D
= 250μA
Reference to 25°C, I
D
= 1.0mA
V
GS
= 10V, I
D
= 10A
e
––– ––– 116
––– ––– 10
i
MOSFET symbol
nA
ns
A
pF
nC
V
DS
= 15V
–––
V
GS
= 20V
V
GS
= -20V
IRFHM8363PbF
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Fig 2. Typical Output Characteristics
Fig 1. Typical Output Characteristics
Fig 3. Typical Transfer Characteristics
Fig 6. Typical Gate Charge vs.Gate-to-Source Voltage
Fig 5. Typical Capacitance vs.Drain-to-Source Voltage
Fig 4. Normalized On-Resistance vs. Temperature
0.1 110 100
VDS, Drain-to-Source Voltage (V)
0.1
1
10
100
1000
ID, Drain-to-Source Current (A)
VGS
TOP 10V
7.0V
5.0V
4.5V
3.5V
3.0V
2.8V
BOTTOM 2.5V
≤60μs PULSE WIDTH
Tj = 25°C
2.5V
0.1 110 100
VDS, Drain-to-Source Voltage (V)
0.1
1
10
100
1000
ID, Drain-to-Source Current (A)
2.5V
≤60μs PULSE WIDTH
Tj = 150°C
VGS
TOP 10V
7.0V
5.0V
4.5V
3.5V
3.0V
2.8V
BOTTOM 2.5V
1234567
VGS, Gate-to-Source Voltage (V)
1.0
10
100
1000
ID, Drain-to-Source Current (A)
TJ = 25°C
TJ = 150°C
VDS = 15V
≤60μs PULSE WIDTH
-60 -40 -20 020 40 60 80 100 120 140 160
TJ , Junction Temperature (°C)
0.6
0.8
1.0
1.2
1.4
1.6
RDS(on) , Drain-to-Source On Resistance
(Normalized)
ID = 10A
VGS = 10V
110 100
VDS, Drain-to-Source Voltage (V)
10
100
1000
10000
C, Capacitance (pF)
VGS = 0V, f = 1 MHZ
Ciss = C gs + Cgd, C ds SHORTED
Crss = Cgd
Coss = Cds + Cgd
Coss
Crss
Ciss
02468101214161820
QG, Total Gate Charge (nC)
0.0
2.0
4.0
6.0
8.0
10.0
12.0
14.0
VGS, Gate-to-Source Voltage (V)
VDS= 24V
VDS= 15V
VDS= 6.0V
ID= 10A
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4www.irf.com
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case (Bottom)
Fig 8. Maximum Safe Operating Area
Fig 9. Maximum Drain Current vs.
Case (Bottom) Temperature
Fig 7. Typical Source-Drain Diode Forward Voltage
Fig 10. Threshold Voltage vs. Temperature
0.0 0.5 1.0 1.5 2.0 2.5
VSD, Source-to-Drain Voltage (V)
0.1
1
10
100
1000
ISD, Reverse Drain Current (A)
TJ = 25°C
TJ = 150°C
VGS = 0V
-75 -50 -25 025 50 75 100 125 150
TJ , Temperature ( °C )
0.8
1.0
1.2
1.4
1.6
1.8
2.0
2.2
2.4
2.6
2.8
VGS(th), Gate threshold Voltage (V)
ID = 25μA
ID = 250μA
ID = 1.0mA
ID = 1.0A
1E-006 1E-005 0.0001 0.001 0.01 0.1 1
t1 , Rectangular Pulse Duration (sec)
0.001
0.01
0.1
1
10
Thermal Response ( Z thJC ) °C/W
0.20
0.10
D = 0.50
0.02
0.01
0.05
SINGLE PULSE
( THERMAL RESPONSE ) Notes:
1. Duty Factor D = t1/t2
2. Peak Tj = P dm x Zthjc + Tc
25 50 75 100 125 150
TC , Case Temperature (°C)
0
5
10
15
20
25
30
ID, Drain Current (A)
Limited by source
bonding technology
i
0 1 10 100
VDS, Drain-to-Source Voltage (V)
0.1
1
10
100
1000
ID, Drain-to-Source Current (A)
OPERATION IN THIS AREA
LIMITED BY R DS(on)
Tc = 25°C
Tj = 150°C
Single Pulse
100μsec
1msec
10msec
DC
Limited by source
bonding technology
i
IRFHM8363PbF
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Fig 13. Maximum Avalanche Energy vs. Drain Current
Fig 12. On-Resistance vs. Gate Voltage
Fig 14b. Unclamped Inductive Waveforms
Fig 14a. Unclamped Inductive Test Circuit
tp
V
(BR)DSS
I
AS
R
G
I
AS
0.01
Ω
t
p
D.U.T
L
VDS
+
-V
DD
DRIVER
A
15V
20V
Fig 15a. Switching Time Test Circuit Fig 15b. Switching Time Waveforms
VGS
VDS
90%
10%
td(on) td(off)
trtf
VDS
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1
RD
VGS
RG
D.U.T.
10V
+
-
VDD
VGS
0 5 10 15 20
VGS, Gate -to -Source Voltage (V)
10
15
20
25
30
35
RDS(on), Drain-to -Source On Resistance (mΩ)
ID = 10A
TJ = 25°C
TJ = 125°C
25 50 75 100 125 150
Starting TJ , Junction Temperature (°C)
0
20
40
60
80
100
120
EAS , Single Pulse Avalanche Energy (mJ)
ID
TOP 2.3A
4.7A
BOTTOM 10A
IRFHM8363PbF
6www.irf.com
Fig 16. Peak Diode Recovery dv/dt Test Circuit for N-Channel
HEXFET® Power MOSFETs
Fig 17. Gate Charge Test Circuit Fig 18. Gate Charge Waveform
Vds
Vgs
Id
Vgs(th)
Qgs1 Qgs2 Qgd Qgodr
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
P.W. Period
di/dt
Diode Recovery
dv/dt
Ripple ≤5%
Body Diode Forward Drop
Re-Applied
Voltage
Reverse
Recovery
Current
Body Diode Forward
Current
V
GS
=10V
V
DD
I
SD
Driver Gate Drive
D.U.T. I
SD
Waveform
D.U.T. V
DS
Waveform
Inductor Curent
D = P. W .
Period
* VGS = 5V for Logic Level Devices
*
+
-
+
+
+
-
-
-
RGVDD
• dv/dt controlled by RG
• Driver same type as D.U.T.
• ISD controlled by Duty Factor "D"
• D.U.T. - Device Under Test
D.U.T
1K
VCC
DUT
0
L
S
IRFHM8363PbF
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PQFN Dual 3.3x3.3 Package Details
For footprint and stencil design recommendations, please refer to application note AN-1154 at
http://www.irf.com/technical-info/appnotes/an-1154.pdf
Note: For the most current drawing please refer to IR website at: http://www.irf.com/package/
PQFN Dual 3.3x3.3 Part Marking
IRFHM8363PbF
8www.irf.com
PQFN Dual 3.3x3.3 Tape and Reel
IRFHM8363PbF
www.irf.com 9
Qualification standards can be found at International Rectifier’s web site
http://www.irf.com/product-info/reliability
 Higher qualification ratings may be available should the user have such requirements.
Please contact your International Rectifier sales representative for further information:
http://www.irf.com/whoto-call/salesrep/
 Applicable version of JEDEC standard at the time of product release.
Notes:
Repetitive rating; pulse width limited by max. junction temperature.
Starting TJ = 25°C, L = 0.58mH, RG = 50Ω, IAS = 10A.
Pulse width ≤ 400μs; duty cycle ≤ 2%.
Rθ is measured at TJ of approximately 90°C.
When mounted on 1 inch square 2 oz copper pad on 1.5x1.5 in. board of FR-4 material.
Calculated continuous current based on maximum allowable junction temperature.
Current is limited to 10A by source bonding technology.
IR WORLD HEADQUARTERS: 101 N. Sepulveda Blvd., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information. 06/11
Data and specifications subject to change without notice.
MS L 1
(per JE DE C J-S T D-020D
†††
)
RoHS compliant Yes
PQFN Dual 3.3mm x 3.3mm
Qualification information
†
Moisture Sensitivity Level
Qualification level Cons umer
††
(per JEDE C JES D47F
†††
guidelines )