MCP651 Input Offset Evaluation Board User's Guide (c) 2009 Microchip Technology Inc. DS51834A Note the following details of the code protection feature on Microchip devices: * Microchip products meet the specification contained in their particular Microchip Data Sheet. * Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the intended manner and under normal conditions. * There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip's Data Sheets. Most likely, the person doing so is engaged in theft of intellectual property. * Microchip is willing to work with the customer who is concerned about the integrity of their code. * Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. 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MCP651 INPUT OFFSET EVALUATION BOARD USER'S GUIDE Table of Contents Preface ........................................................................................................................... 1 Introduction............................................................................................................ 1 Document Layout .................................................................................................. 1 Conventions Used in this Guide ............................................................................ 2 Recommended Reading........................................................................................ 3 The Microchip Web Site ........................................................................................ 3 Customer Support ................................................................................................. 3 Document Revision History ................................................................................... 4 Chapter 1. Product Overview 1.1 Introduction ..................................................................................................... 5 1.2 Kit Contents .................................................................................................... 5 1.3 Intended Use .................................................................................................. 6 1.4 Description ..................................................................................................... 6 Chapter 2. Installation and Operation 2.1 Introduction ................................................................................................... 11 2.2 Required Tools ............................................................................................. 11 2.3 Configuring the Lab Equipment and PCB .................................................... 12 2.4 Operating Conditions .................................................................................... 14 2.5 Converting to Other Parameters .................................................................. 15 2.6 Settling Time, Noise and Sampling Rate ...................................................... 17 Chapter 3. Possible Modifications 3.1 Introduction ................................................................................................... 19 3.2 Range of Parts Supported by MCP651 Input Offset Evaluation Board ........ 19 3.3 Changes to Accommodate Other DUTs ....................................................... 21 Appendix A. Schematics and Layouts A.1 Introduction .................................................................................................. 25 A.2 Schematic and Layouts ................................................................................ 25 A.3 Board - Schematic ....................................................................................... 26 A.4 Board - Combination of the Top Silk Screen, Top Solder Mask and Top Metal Layers ..................................................................................................... 27 A.5 Board - Top Silk Screen .............................................................................. 28 A.6 Board - Top Solder Mask and Top Metal Layer .......................................... 29 A.7 Board - Bottom Metal Layer ........................................................................ 30 (c) 2009 Microchip Technology Inc. DS51834A-page iii MCP651 Input Offset Evaluation Board User's Guide Appendix B. Bill Of Materials (BOM) B.1 MCP651 Input Offset Evaluation Board BOM .............................................. 31 B.2 Adaptor Board BOM ..................................................................................... 33 Worldwide Sales and Service .....................................................................................34 DS51834A-page iv (c) 2009 Microchip Technology Inc. MCP651 INPUT OFFSET EVALUATION BOARD USER'S GUIDE Preface NOTICE TO CUSTOMERS All documentation becomes dated, and this manual is no exception. Microchip tools and documentation are constantly evolving to meet customer needs, so some actual dialogs and/or tool descriptions may differ from those in this document. Please refer to our web site (www.microchip.com) to obtain the latest documentation available. Documents are identified with a "DS" number. This number is located on the bottom of each page, in front of the page number. The numbering convention for the DS number is "DSXXXXXA", where "XXXXX" is the document number and "A" is the revision level of the document. For the most up-to-date information on development tools, see the MPLAB(R) IDE on-line help. Select the Help menu, and then Topics to open a list of available on-line help files. INTRODUCTION This chapter contains general information that will be useful to know before using the MCP651 Input Offset Evaluation Board. Items discussed in this chapter include: * * * * * * Document Layout Conventions Used in this Guide Recommended Reading The Microchip Web Site Customer Support Document Revision History DOCUMENT LAYOUT This document describes how to use the MCP651 Input Offset Evaluation Board. The manual layout is as follows: * Chapter 1. "Product Overview" - Important information about the MCP651 Input Offset Evaluation Board. * Chapter 2. "Installation and Operation" - Covers the initial set-up of the MCP651 Input Offset Evaluation Board. It lists the required tools, shows how to set up the board and how to connect lab equipment. It then demonstrates how to use this board. * Chapter 3. "Possible Modifications" - Shows how to modify the board for other single Microchip op amps in SOIC-8, PDIP-8 and other packages. * Appendix A. "Schematics and Layouts" - Shows the schematic and board layouts for the MCP651 Input Offset Evaluation Board. * Appendix B. "Bill Of Materials (BOM)" - Lists the parts used to populate the MCP651 Input Offset Evaluation Board. Also lists loose parts shipped with the board in an ESD bag, alternate components and components not populated. (c) 2009 Microchip Technology Inc. DS51834A-page 1 MCP651 Input Offset Evaluation Board User's Guide CONVENTIONS USED IN THIS GUIDE This manual uses the following documentation conventions: DOCUMENTATION CONVENTIONS Description Arial font: Italic characters Represents Referenced books Emphasized text A window A dialog A menu selection A field name in a window or dialog A menu path MPLAB(R) IDE User's Guide ...is the only compiler... the Output window the Settings dialog select Enable Programmer "Save project before build" A dialog button A tab A number in verilog format, where N is the total number of digits, R is the radix and n is a digit. A key on the keyboard Click OK Click the Power tab 4`b0010, 2`hF1 Italic Courier New Sample source code Filenames File paths Keywords Command-line options Bit values Constants A variable argument Square brackets [ ] Optional arguments Curly brackets and pipe character: { | } Ellipses... Choice of mutually exclusive arguments; an OR selection Replaces repeated text #define START autoexec.bat c:\mcc18\h _asm, _endasm, static -Opa+, -Opa0, 1 0xFF, `A' file.o, where file can be any valid filename mcc18 [options] file [options] errorlevel {0|1} Initial caps Quotes Underlined, italic text with right angle bracket Bold characters N`Rnnnn Text in angle brackets < > Courier New font: Plain Courier New Represents code supplied by user DS51834A-page 2 Examples File>Save Press <Enter>, <F1> var_name [, var_name...] void main (void) { ... } (c) 2009 Microchip Technology Inc. Preface RECOMMENDED READING This user's guide describes how to use MCP651 Input Offset Evaluation Board. Other useful documents are listed below. The following Microchip documents are available and recommended as supplemental reference resources. MCP6V01/2/3 Data Sheet, "300 A, Auto-Zeroed Op Amps", DS22058 Gives detailed information on the op amp family that is used for signal processing and output voltage control on the MCP651 Input Offset Evaluation Board. MCP651 Data Sheet, "5 mA Op Amps with mCal", DS22146 Gives detailed information on the op amp family that is used as the DUT on the MCP651 Input Offset Evaluation Board. AN1177 Application Note, "Op Amp Precision Design: DC Errors", DS01177 Discusses how to achieve high DC accuracy in op amp circuits. Also discusses the relationship between an op amp's input offset voltage (VOS), CMRR, PSRR, Open-Loop Gain and VOS Drift over Temperature. AN1258 Application Note, "Op Amp Precision Design: PCB Layout Techniques", DS01258 Discusses how to lay out PCBs for high DC accuracy in op amp circuits. Also discusses other PCB related accuracy issues. 8-Pin SOIC/MSOP/TSSOP/DIP Evaluation Board User's Guide, DS51544 Covers the usage of the SOIC8EV Evaluation Board. THE MICROCHIP WEB SITE Microchip provides online support via our web site at www.microchip.com. This web site is used as a means to make files and information easily available to customers. Accessible by using your favorite Internet browser, the web site contains the following information: * Product Support - Data sheets and errata, application notes and sample programs, design resources, user's guides and hardware support documents, latest software releases and archived software * General Technical Support - Frequently Asked Questions (FAQs), technical support requests, online discussion groups, Microchip consultant program member listing * Business of Microchip - Product selector and ordering guides, latest Microchip press releases, listing of seminars and events, listings of Microchip sales offices, distributors and factory representatives CUSTOMER SUPPORT Users of Microchip products can receive assistance through several channels: * * * * * Distributor or Representative Local Sales Office Field Application Engineer (FAE) Technical Support Development Systems Information Line Customers should contact their distributor, representative or field application engineer for support. Local sales offices are also available to help customers. A listing of sales offices and locations is included in the back of this document. Technical support is available through the web site at: http://support.microchip.com (c) 2009 Microchip Technology Inc. DS51834A-page 3 MCP651 Input Offset Evaluation Board User's Guide DOCUMENT REVISION HISTORY Revision A (May 2009) * Initial Release of this Document. DS51834A-page 4 (c) 2009 Microchip Technology Inc. MCP651 INPUT OFFSET EVALUATION BOARD USER'S GUIDE Chapter 1. Product Overview 1.1 INTRODUCTION The MCP651 Input Offset Evaluation Board is described by the following: * Assembly # : 102-00258-R2 * Order # : MCP651EV-VOS * Name: MCP651 Input Offset Evaluation Board Items discussed in this chapter include: * Kit Contents * Intended Use * Description 1.2 KIT CONTENTS * One MCP651 Input Offset Evaluation Board, 102-00258-R2 * Important Information "Read First" FIGURE 1-1: (c) 2009 Microchip Technology Inc. MCP651 Input Offset Evaluation Board Kit Contents. DS51834A-page 5 MCP651 Input Offset Evaluation Board User's Guide 1.3 INTENDED USE The MCP651 Input Offset Evaluation Board is intended to provide a simple means to measure the MCP651 Input Offset Evaluation Board op amp's input offset voltage under a variety of operating conditions. The measured input offset voltage (VOST) includes the input offset voltage specified in the data sheet (VOS) plus changes due to: power supply voltage (PSRR), common mode voltage (CMRR), output voltage (AOL), input offset voltage drift over temperature (VOS/TA) and 1/f noise. The MCP651 Input Offset Evaluation Board works most effectively at room temperature (near 25C). Measurements at other temperatures should be done in an oven where the air velocity is minimal. 1.4 DESCRIPTION This section starts with the conversion of DUT bias voltages described in the MCP651 data sheet to the voltages on this board. Then there is a discussion of the circuitry that controls the DUT's output voltage (VOUTX) and amplifies its total input offset voltage (VOST). Finally, other portions of the circuit, and their purpose, are discussed. Complete details of this board are given in Appendix A. "Schematics and Layouts" and Appendix B. "Bill Of Materials (BOM)". 1.4.1 Conversion of Bias Voltages The MCP651 data sheet describes all of its bias voltages relative to VSS, which is assumed to be at ground (0V). On the other hand, the MCP651 Input Offset Evaluation Board sets the DUT's input common mode voltage to 0V. The user needs to convert from the first set of voltages to the second set (by subtracting VCM): TABLE 1-1: CONVERSION OF BIAS VOLTAGES Data Sheet Bias Voltage (V) Conversion Equations Evaluation Board Bias Voltage (V) VCM VCM - VCM VCMX = 0V VDD VDD - VCM VDDI VSS VSS - VCM VSSI VOUT VOUT - VCM VOUTX VL VL - VCM VLX VCAL VCAL - VCM VCALX The supply voltages VDDX and VSSX can be estimated using the MCP651's typical quiescent current (IQ = 6 mA): EQUATION 1-1: V DDX = V DDI + I Q ( 10 ) V DDI + 60 mV V SSX = V SSI - I Q ( 10 ) V SSI - 60 mV DS51834A-page 6 (c) 2009 Microchip Technology Inc. Product Overview 1.4.2 Simplified Circuit and Operation Figure 1-2 is a simplified diagram of the circuitry that biases the DUT and produces an amplified version of the DUT's input offset voltage (VOST). It includes gain at the input, a Proportional plus Integral (PI) controller loop, a high gain amplifier and a filter. VCMX = 0V VDDI R12 R3 DUT R4 R78 VOUTX VSSI +2.5V VM Lowpass Filter GM R56 +2.5V -2.5V C2 1/GINT Integrator (INT/s) +2.5V 1/GINT -2.5V FIGURE 1-2: VCOX +1 -2.5V Simplified Circuit. The elements of Figure 1-2 correspond to the components in the complete schematic (A.3 "Board - Schematic") as follows. TABLE 1-2: CONVERSION OF SCHEMATIC COMPONENTS Complete Schematic Components R1, R2 Simplified Schematic Component Conversion Equations R12 = R1 || R2 R3 R4 Typical Values (Note 1) 196.1 R3 = R3 200.0 R4 = R4 10.00 k R5, R6 R56 = R5 + R6 8.04 k R7, R8 R78 = R7 + R8 40.0 k C2 C2 = C2 22 nF U1 "DUT" -- -- U2 "+1 Buffer" -- -- R11, R12 "1/GINT" = R11 / (R11 + R12) 1 / (3.213 V/V) R13, R14 = R13 / (R13 + R14) 1 / (3.213 V/V) U3, R11, R12, C6 U3, R17, C7 U4, R23, R24, R25, R26, S2 "Integrator (INT/s)" INT = 1 / ((R11 || R12)C6) INT= 1 / (R17 * C7) "GM" = 1 + R24 / R23 = 1 + (R24 + R25 + R26) / R23 "Lowpass Filter (BW)" BW = 1 / (R28 * C12) R28, C12 Note 1: 2 (10.3 Hz) 2 (10.4 Hz) 3.941 V/V, S2 closed 39.18 V/V, S2 open 2 (1.59 Hz) Switch S2's top position is closed when to the right (LOW GAIN), and is open when to the left (HI GAIN). (c) 2009 Microchip Technology Inc. DS51834A-page 7 MCP651 Input Offset Evaluation Board User's Guide Analysis of this simplified circuit gives the following nominal circuit outputs: EQUATION 1-2: V OUTX V COX V M G A G M V OST Where: GA = 1 + R4/R3 51.00 V/V GAGM 201.0 V/V, S2 (position 1) closed 1998 V/V, S2 (position 1) open R1 and R2 (R12) balance the circuit at the DUT's input. These resistors are small, and are oriented on the Printed Circuit Board (PCB) to cancel their thermoelectric voltages. The parallel resistances R1||R2 and R3||R4 are equal to minimize the contribution of the DUT's input bias currents to the measured VOST (contributions by R5 through R8 do not affect VM); the typical value of IOS at +125C is 100 pA, which produces a change in VOST of 0.02 V. The unity gain buffer (+1 gain on the bottom right) isolates the VCOX input filters from the following attenuator and integrator. Although it's not shown here, the resistor R14 at the input to the "+1 Buffer" ensures its output voltage is 0V when the VCOX connector is left open. The attenuators (1/GINT) scale VCOX and VOUTX so that they do not overdrive op amps U2 and U3 ("+1 Buffer" and ("Integrator"). For instance, when VOUTX = 5.6V (given VSSI =0.3V and VDDI = 5.8V), the voltages at the outputs of the attenuators (1/GINT) is 1.80V. The differential integrator accumulates the scaled difference between VCOX and VOUTX, which slowly forces this difference to zero (the I part of the PI controller). Resistor R56 injects the integrator's output at the DUT's input through resistors R4 and R3; it minimizes the error at VOUTX. A proportional term (the P part of the PI controller) is also injected at the DUT's input through resistor R78; it stabilizes the control loop (the integrator term becomes negligible above 16 Hz). It also sets a low frequency DUT noise gain of about 505 V/V. This proportional term is rolled off by C2 starting at 0.18 kHz; this is high enough to not interact with the integrator term, and low enough to keep the DUT stable. Thus, C2 minimizes noise gain at higher frequencies, which reduces the chance of unwanted feedback effects. With the overall gain GAGM of either 201 V/V or 1998 V/V, this circuit can measure VOST values up to either 12.4 mV or 1.25 mV. A voltmeter with 1 mV resolution can distinguish steps of either 5 V or 0.5 V, respectively. The DUT's noise seen at the input to GM has a noise power bandwidth (NPBW) set by R78 and C2 (0.28 kHz). This implies that this noise is dominated by the 1/f noise. The Lowpass Filter (fBW 1.6 Hz) reduces this 1/f noise a little more before it is seen at VM. The measured noise, over a 140 second period of time with a typical part, was about 19 VP-P referred to input (RTI). This compares favorably with the MCP651's calibrated VOS specification (200 V, maximum at +25C). DS51834A-page 8 (c) 2009 Microchip Technology Inc. Product Overview 1.4.3 DUT Bias Voltage Inputs Figure 1-3 shows the basic DUT biasing circuitry, except the input pins which have already been discussed (VCMX = 0V). R37 4.49 R29 4.49 VDDI VDDX C21 10 F R44 2.2 k VCALX R43 10 k R42 150 C13 100 nF IDD DUT U1 VDD C25 100 nF C22 10 F VCAL VOUT VSS C14 100 nF FIGURE 1-3: VOUTX VLX ISS VSSX R38 4.49 R10 1.00 k R30 4.49 VSSI DUT Bias Circuitry. Lab power supplies are connected to VDDX and VSSX. The resistors R29, R30, R37 and R38, along with the capacitors C13, C14, C21 and C22, minimize crosstalk from the other op amps on the board. Since the MCP651's quiescent current is between 3 mA and 9 mA, the actual power supply voltages (VDDI and VSSI) are different by 30 mV to 90 mV. IDD and ISS can be calculated as (ISS is negative): EQUATION 1-3: V DDX - V DDI I DD = -------------------------------10 V SSX - V SSI I SS = ---------------------------10 The DUT's VCAL pin sets its internal common mode voltage (VCMX of the MCP651) when it is in calibration mode. Thus, the DUT's offset (VOS) is small when VCMX (0V on this board) is equal to VCALX. The RCAL potentiometer (POT or R43), with the resistors R42 and R43, sets VCALX. The values chosen allow the POT to cover the specified VCALX range, and a little more. Connecting a voltmeter to VCALX makes it possible to set the POT accurately. Notice that it is also possible to drive VCALX with an external voltage source (the wiper should be, but doesn't have to be, at mid-range). VOUTX is set, as previously explained, to be equal to VCOX by the integrator in the PI control loop. If VCOX is at or beyond VSSI or VDDI, then the loop forces VOUTX to be railed at the corresponding supply voltage. The load resistor (RL or R10) is biased to the externally supplied voltage VLX. VLX is usually set to mid-supply. The VLX connection can be left open, which minimizes the loading on VOUTX (about 40 k). (c) 2009 Microchip Technology Inc. DS51834A-page 9 MCP651 Input Offset Evaluation Board User's Guide 1.4.4 CAL Input The DUT's CAL/CS input pin is normally held at VSSX by resistors R20 and R21; this keeps the MCP651 in its normal mode of operation. When S1 is closed by the user, R20 pulls CAL/CS up to VDDX (after a time set by R20 and C9), so that the MCP651 enters its low power mode of operation. Releasing S1 then brings CAL/CS back to VSSX (after a time set by R20, R21 and C9); the time constant (R20 + R21)C9 is 0.11s, which is slow enough to de-glitch S1. Note that the supply voltages need to be constant while the DUT is being put into calibration mode, and during calibration mode (up to 4 ms of time after CAL/CS goes low). VDDX R29 R37 4.49 4.99 U1 DUT VDD R19 10 k FIGURE 1-4: 1.4.5 S1 CAL/CS VSS VSSX R20 100 k R38 R30 4.49 4.99 R41 10 C9 1.0 F R21 10 k CAL Switch and De-glitching Circuitry. Bias Inputs for Other Op Amps The other op amps (U2, U3 and U4) are run on dual power supplies centered on ground. The design assumes that these supplies are 2.5V, for the best performance. These supplies can be set as low as 0.9V, which will keep the MCP6V01's working, but will reduce the range of possible VCOX and VM values. 1.4.6 Outputs The connector VCALX outputs the voltage set by the POT RCAL. VDDI and VSSI are used to measure the actual DUT supply voltages, and to estimate its supply currents IDD and ISS. VOUTX is the DUT's output voltage; it is used only to verify that the circuit is operating correctly. VM is the most important output; it is VOST multiplied by either 201 V/V or 1998 V/V. DS51834A-page 10 (c) 2009 Microchip Technology Inc. MCP651 INPUT OFFSET EVALUATION BOARD USER'S GUIDE Chapter 2. Installation and Operation 2.1 INTRODUCTION This chapter shows how to set up and operate the MCP651 Input Offset Evaluation Board. Items discussed in this chapter include: * * * * * 2.2 Required Tools Configuring the Lab Equipment and PCB Operating Conditions Calculating DUT Parameters Settling Time, Noise, and Sampling Rate REQUIRED TOOLS * (1 or 2) Lab Power Supplies with (two) tracking outputs - One for +2.5V, GND -2.5V - The other for VDDX, GND, VSSX (adjustable up to 7.0V; optional if VDDX = 2.5V and VSSX = -2.5V) * (0 to 3) independent Lab Power Supplies - Drive VCALX, VLX and VCOX (any or all of these can be not used, as described in the next section) - Adjustable up to 7.0V * (1 or 2) Voltmeters - Measure VM, VOUTX (the latter is for troubleshooting only) - 1 mV resolution - -6V to +6V minimum range - Differential measurement (e.g., hand held meter) (c) 2009 Microchip Technology Inc. DS51834A-page 11 MCP651 Input Offset Evaluation Board User's Guide 2.3 CONFIGURING THE LAB EQUIPMENT AND PCB Lab equipment is connected to this board as shown in Figure 2-1. The (surface mount) test points allow lab equipment to be connected to these boards. 13 12 11 1 10 2 9 3 8 7 4 FIGURE 2-1: Evaluation Board. 5 6 Lab Equipment Connections and Configuration Switches for the MCP651 Input Offset The arrows and numbers in Figure 2-1 signify the following: 1. Gain Setting Switch - top position (# 1) a) To the right (ON) for low gain (GM = 201 V/V). b) To the left for high gain (GM = 1998 V/V). 2. Voltmeter to measure VM a) Gives amplified offset (GAGMVOST). 3. Power Supply for VCOX a) Can be left open (forces VOUTX = 0V). b) Set between VSSI and VDDI. 4. 2.5V Power Supplies with GND a) Set at +2.5V and -2.5V (for best performance). 5. Power Supply for VLX (Load Resistor's bias point) a) Can be left open (fewer lab power supplies; RL = 40 k). b) Can be shorted to GND with a jumper wire (VLX = 0V and RL = 1 k). c) Can connect to an external lab power supply (RL = 1 k). DS51834A-page 12 (c) 2009 Microchip Technology Inc. Installation and Operation 6. Voltmeter to measure VOUTX a) Typically not used (mainly used for validating DUT and board). 7. POT (RCAL) Thumb-wheel (to adjust VCALX) a) Rotate clockwise (CW) to increase VCALX. b) Rotate counter-clockwise (CCW) to decrease VCALX. c) Usually set at mid-turn. d) Can override with an external power supply at VCALX or a jumper wire (see # 9 below) 8. Power Supply for VSSX a) Minimum of about VDDX - (DUT's maximum operating supply voltage) - (0.12V for the resistors in the supply line). b) Maximum of +0.3V (for VCMX at 0.3V below negative rail). c) When VSSX = -2.5V and VDDX = +2.5V, you can connect to the -2.5V supply with a jumper wire (fewer lab power supplies). 9. Power Supply for VCALX a) Usually not connected (RCAL sets VCALX; fewer lab power supplies). b) Can be shorted to GND with a jumper wire (fewer lab power supplies; VCALX = VCMX = 0V). c) Can connect to an external lab power supply (it is best, but not necessary, to set RCAL to mid-supply). 10. Power Supply for VDDX a) Minimum of -0.3V (for VCMX at 0.3V above positive rail). b) Maximum of about VSSX + (DUT's maximum operating supply voltage) + (0.12V for the resistors in the supply line). c) When VSSX = -2.5V and VDDX = +2.5V, you can connect to the +2.5V supply with a jumper wire (fewer lab power supplies). 11. CAL Switch a) Press to initiate calibration sequence (corrects DUT's VOST, with internal common mode voltage set to VCALX). b) There is a delay of about 4 ms for the calibration to complete, plus several tenths of a second for the circuit to settle. 12. Voltmeter at VDDI and VDDX (to measure IDD) a) Measure V = VDDX - VDDI. b) Calculate IDD = V / (10) 13. Voltmeter at VSSI and VSSX (to measure ISS) a) Measure V = VSSX - VSSI. b) Calculate ISS = V / (10); (this is a negative value) Note: (c) 2009 Microchip Technology Inc. For the best accuracy and ease of use, short VCALX to GND, set the other voltages for the desired bias during calibration, then initiate a calibration event in the DUT (push S1). Change the bias point afterwards to see how VOST is changed. DS51834A-page 13 MCP651 Input Offset Evaluation Board User's Guide 2.4 OPERATING CONDITIONS The MCP651 Input Offset Evaluation Board works most effectively at room temperature (near 25C). Measurements at other temperatures should be done in an oven where the air velocity is minimal. Table 2-1 shows the various DUT voltages (as described in the data sheet), their nominal values and ranges, and how to convert to the voltages needed on the MCP651 Input Offset Evaluation Board. TABLE 2-1: CONVERTING VOLTAGES FOR THE BOARD Single Supply Voltages (V) Data Sheet Symbol Nominal Conversion Equations (V) Range VDD 2.5 or 5.5 2.5 to 5.5 VDDX VDD - VCM VSS 0 0 VSSX VSS - VCM VCM VDD/3 VSS - 0.3 to VDD - 1.3 (Note 1) 0 VCM - VCM VOUT (Note 2) VDD/2 VSS + 0.2 to VDD - 0.2 VOUTX VOUT - VCM VL VDD/2 VSS to VDD VLX VCAL VDD/3 (Note 3) VSS + 0.1 to VDD - 1.4 VCALX VCAL - VCM CAL/CS VSS VSS to VDD (Note 4) Note 1: 2: 3: 4: 5: VL - VCM At TA = +25C. See the data sheet for changes in VCM range vs. TA. Set the desired VOUT voltage at the VCOX input; the integrator then forces VOUT to be the same voltage. When the VCAL pin left open. However, this board always has the POT (R43) connected, so VCALX is never truly open. The circuit forces CAL/CS to stay within its range (as long as the supply voltages are constant when the CAL switch is activated). Normally, the part is on. These numbers are for the MCP651 op amp. Once the MCP651 Input Offset Evaluation Board is powered up, the switches can be set for the desired operation. S1 (a normally off push-button switch) starts a calibration event (CAL), internal to the DUT, when pushed. S2 (top position) sets the gain of the amplifier (GM) either high or low. See Table 2-2 for details. TABLE 2-2: SWITCH OPERATION Switch S1 S2 Input Result No Input Normal Operation Pushed Calibration event started in DUT Top Switch to the left High Gain (1998 V/V) Top Switch to the right Low Gain (201 V/V) (Bottom Switch) (Don't Care) The gain is usually set low. It can be set high just after a calibration event, before changing the DUT's bias point, to obtain more accurate results for the calibrated offset voltage. The POT (RCAL or R43) adjusts VCALX. This voltage is where the DUT's common mode input voltage set during a calibration event (initiated by pushing S1). Adjusting this POT does not have an effect on the circuit's behavior until the CAL switch (S1) is pushed. DS51834A-page 14 (c) 2009 Microchip Technology Inc. Installation and Operation 2.5 CONVERTING TO OTHER PARAMETERS 2.5.1 Calculating DUT Parameters The DUT's total input offset voltage (VOST) can be calculated from a measurement as shown in Equation 2-1. EQUATION 2-1: V OST = V M ( G A G M ) Changing the DUT's bias voltages or ambient temperature changes VOST. Microchip's application note AN1177 discusses in detail how these changes in VOST are related to specifications found in our data sheets. The following list summarizes the results: * Specified Input Offset Voltage: - VOS = Input offset at the specified bias point * DC Common Mode Rejection Ratio: - CMRR = VCM/VOS * DC Power Supply Rejection Ratio: - PSRR = (VDD - VSS)/VOS * DC Open-loop Gain: - AOL = VOUT/VOS * Input Offset Drift over Temperature: - VOS/TA Note: The data sheet Input Offset Voltage (VOS) specification applies to one bias point and temperature only. The total input offset voltage (VOST) includes VOS and changes in input offset as bias voltages and temperature change. Example 2-1 gives an example of how VOST changes with the common mode input voltage (VCM). EXAMPLE 2-1: COMMON MODE CHANGE EXAMPLE Given: VOST = 0.5 mV, VCM = 0V VOST = 1.0 mV, VCM = 5V Then: VOST = 0.5 mV VCM = 5.0V CMRR = 5.0V / 0.5 mV = 10 V/mV = 80 dB (c) 2009 Microchip Technology Inc. DS51834A-page 15 MCP651 Input Offset Evaluation Board User's Guide 2.5.2 Application Table 2-3 shows one possible measurement matrix that will allow the user to estimate key parameters for the DUT. Obviously, other values of VDD and VCAL could be selected. TABLE 2-3: MEASUREMENT MATRIX Operating Inputs TA (C) VDD (V) VOUT (V) +25 5.5 2.75 VCM (V) GM (V/V) Symbol 1.83 40 VM1 VOS and PSRR -0.30 4 VM2 CMRR 4.20 VM3 CMRR 1.83 VM4 AOL VM5 AOL 0.20 5.30 2.5 1.25 0.83 VM6 VOS and PSRR VM7 CMRR 1.20 VM8 CMRR 0.83 VM9 AOL VM10 AOL VM11 VOS at temperature and VOS/TA 2.30 5.5 Comments -0.30 0.20 -40 Measurement (Note 1) 2.75 1.83 +85 VM12 +125 VM13 Note 1: Before making these measurements, set up the DUT to the bias point described for VM1. Short VCALX to GND. Then start a calibration (CAL) event using S1. Measure VM1, then alter the operating conditions for each succeeding measurement; do not initiate another calibration event until all measurements are done. Based on these measurements, we can make the following estimates, where the VOST_k values are calculated from the measured VMk values (see Equation 2-1): TABLE 2-4: ESTIMATES Operating Inputs Estimates VDD (V) TA (C) 1.8 and 5.5 +25 5.5 -40 VOS = VOST_11 V +25 VOS = VOST_1 V +85 VOS = VOST_12 V +125 VOS = VOST_13 V -40 to +125 +25 1.8 +25 Equations Units 1/PSRR = (VOST_1 - VOST_6) / (3.0V) VOS/TA = (VOST_13 - VOST_11) / (165C) V/V V/C 1/CMRR = (VOST_3 - VOST_2) / (4.5V) V/V 1/AOL = (VOST_5 - VOST_4) / (5.1V) V/V VOS = VOST_6 V 1/CMRR = (VOST_8 - VOST_7) / (1.5V) 1/AOL = (VOST_10 - VOST_9) / (2.1V) V/V V/V Obviously, other values of TA, VDD, ... can be used instead, with the proper adjustments to these equations. DS51834A-page 16 (c) 2009 Microchip Technology Inc. Installation and Operation 2.6 SETTLING TIME, NOISE AND SAMPLING RATE The bandwidth seen by the signal (DUT's VOST and noise voltage), between the DUT's input and VM, is set mainly by the lowpass filter at the VM test point (TP5); this bandwidth is about 1.6 Hz. This bandwidth sets the settling time seen at VM (after the DUT's bias point has been changed) to about 0.6 seconds. The noise seen in the measurements is a result of DUT's input noise voltage passed through the same 1.6 Hz lowpass filter. The MCP651's 1/f noise dominates at such low frequencies, so VOST will appear to wander over time. The standard deviation of this 1/f wander can be estimated to be roughly: * 5 VP-P for a time period of 1 second * 34 VP-P for a time period of 10 years Averaging several measurements together will help reduce the noise over a short period of time. It must be understood, however, that the 1/f noise will make VOST appear to change over long periods of time. There is a practical limit on increasing the sample rate; the noise does not improve significantly after a certain point. The analog lowpass pole at 1.6 Hz causes closely spaced samples to be correlated. To avoid the overhead caused by sampling too fast, keep the sampling period near or above the pole's time constant (0.10s); this gives a minimum sample rate of 10 samples per second. Note: (c) 2009 Microchip Technology Inc. Sampling much faster than 10 SPS will not improve the averaged noise significantly. DS51834A-page 17 MCP651 Input Offset Evaluation Board User's Guide NOTES: DS51834A-page 18 (c) 2009 Microchip Technology Inc. MCP651 INPUT OFFSET EVALUATION BOARD USER'S GUIDE Chapter 3. Possible Modifications 3.1 INTRODUCTION This chapter shows how to modify the MCP651 Input Offset Evaluation Board to measure other single op amps from Microchip Technology Inc. Items discussed in this chapter include: * Range of Parts Supported by the MCP651 Input Offset Evaluation Board * Changes to Accommodate Other DUTs 3.2 RANGE OF PARTS SUPPORTED BY MCP651 INPUT OFFSET EVALUATION BOARD Only op amps that fall within a certain performance range are supported by the MCP651 Input Offset Evaluation Board. 3.2.1 Input Offset Voltage In order to keep op amps U3 and U4 operating normally, the DUT's VOS must be: EQUATION 3-1: V OS < 12.4 mV, Low Gain V OS < 1.25 mV, High Gain Where: Low Gain = 201 V/V High Gain = 1998 V/V More accurate op amps need higher gain for good resolution. Table 3-1 shows what VOS specs can be supported for different voltmeter resolutions and amplifier gains. TABLE 3-1: LOWER LIMIT ON VOS RANGE Voltmeter Resolution (mV) 1 mV 0.1 mV (NOTE 1) GAGM (V/V) max(VOS) (V) 201 (low gain) 500 1998 (high gain) 50 201 (low gain) 50 1998 (high gain) 5 (Note 2) Note 1: These results assume a minimum measurement resolution of 1% of the VOS range. 2: The DUT needs to be soldered to the PCB when the maximum VOST is less than 50 V, or so. Inserting a PDIP-8 part into a 8-pin socket creates a contact potential (error) of the order of 1 V. Also, 1/f noise needs to be low. (c) 2009 Microchip Technology Inc. DS51834A-page 19 MCP651 Input Offset Evaluation Board User's Guide 3.2.2 Output Headroom The DUT's output headroom needs to be close enough to 0V to not overdrive U2 or U3. The maximum DUT VOH and VOL values supported (relative to VCM) are: EQUATION 3-2: V OH - V CM 7.5V V CM - V OL 7.5V Rail-to-rail output op amps, on a single supply voltage, must be less than 7.5V. 3.2.3 Gain Bandwidth Product There is a minimum Gain Bandwidth Product (GBWP) to keep the feedback loop stable, and a maximum GBWP to avoid crosstalk and other issues. EQUATION 3-3: 500 kHz GBWP 100 MHz DS51834A-page 20 (c) 2009 Microchip Technology Inc. Possible Modifications 3.3 CHANGES TO ACCOMMODATE OTHER DUTS This section focuses on methods to connect to other DUTs; the circuit's design is not changed. Parts information can be found in Appendix B. "Bill Of Materials (BOM)". 3.3.1 Pinout Figure 3-1 shows the MCP651 op amp's pinout. This is the standard 8-lead pinout, except for pins 5 and 8 (VCAL and CAL/CS). The MCP651 Input Offset Evaluation Board is designed to take advantage of these input pins, but they are not necessary to this board's operation. MCP651 SOIC NC 1 FIGURE 3-1: 8 CAL/CS VIN- 2 7 VDD VIN+ 3 6 VOUT VSS 4 5 VCAL MCP651 Pinout. Op Amps with No Connection (NC) at pins 1, 5 and 8 will operate properly on the MCP651 Input Offset Evaluation Board. Other op amps may need to use an adaptor board; see Section 3.3.5 "Other Single Op Amps". 3.3.2 Removing the DUT Since these boards come with the DUT (in SOIC-8) soldered on, it is necessary to de-solder them. Figure 3-2 shows the location of the DUT for either a SOIC-8 or a PDIP-8 package. A good de-soldering station makes this work much easier to do. DUT in SOIC-8 FIGURE 3-2: (c) 2009 Microchip Technology Inc. DUT in PDIP-8 DUT's Location on the PCB. DS51834A-page 21 MCP651 Input Offset Evaluation Board User's Guide 3.3.3 Single Op Amps in SOIC-8 Package Solder onto the SOIC-8 pad shown in Figure 3-2. Pin 1 is on the top left (next to the U1 label). To avoid soldering and de-soldering many times, for slower parts, it may be better to use the option discussed in Section 3.3.5 "Other Single Op Amps". 3.3.4 Single Op Amps in PDIP-8 Package Remove the original SOIC-8 packaged part. Solder a DIP-8 IC Socket in the PDIP-8 location shown on Figure 3-2; this makes it easy to change PDIP-8 parts. It also is helpful for parts for other package and pinout options; see Section 3.3.5 "Other Single Op Amps". Figure 3-3 shows this board after the DIP-8 IC socket has been installed. FIGURE 3-3: PCB with SOIC-8 Part Removed and DIP-8 IC Socket Installed. The socket may not work well in two cases (solder directly to the PCB instead): * Very fast op amps (i.e., GBWP > 100 MHz) * Very accurate op amps (i.e., VOST < 50 V) 3.3.5 Other Single Op Amps With a DIP-8 IC Socket on the evaluation board (see Section 3.3.4 "Single Op Amps in PDIP-8 Package"), it is relatively easy to adapt the MCP651 Input Offset Evaluation Board to many other op amps. An adaptor board is stacked on top using headers that solder to the adaptor board, using PDIP-8 through holes, and are inserted into the DIP-8 socket on the evaluation board. The adaptor board can accommodate: * Different packages * Different pinout options (can be dealt with on the adaptor board) * Parts with multiple op amps The adaptor boards approach may not work well in two cases: * Fast op amps (i.e., GBWP > 10 MHz); adding bypass capacitors to the adaptor board may help * Accurate op amps (i.e., VOST < 50 V) DS51834A-page 22 (c) 2009 Microchip Technology Inc. Possible Modifications Figure 3-4 shows a SOIC-8 op amp soldered onto the 8-Pin SOIC/MSOP/TSSOP/DIP Evaluation Board available from Microchip Technology Inc. The two interconnect strips on the bottom are soldered into the through holes for the DIP-8 socket. Figure 3-5 shows this board plugged into the MCP651 Input Offset Evaluation Board. Note 1: 2: Build the adaptor board in the following sequence. Insert the interconnect headers into the DIP-8 socket on the MCP651 Input Offset Evaluation Board. Place the SOIC8EV board on the top of the interconnect headers, while maintaining the correct pin orientation. Solder the headers to the top board. Clip the pins flush with the top surface of the SOIC8EV board, then solder the (SOIC-8) op amp on the top. See Table B-4 for part numbers of this board and its components. Front View Back View FIGURE 3-4: Adaptor PCB. Op Amp in SOIC-8 Package and Connector Headers Soldered to FIGURE 3-5: Board. Adaptor Board Connected to the MCP651 Input Offset Evaluation (c) 2009 Microchip Technology Inc. DS51834A-page 23 MCP651 Input Offset Evaluation Board User's Guide NOTES: DS51834A-page 24 (c) 2009 Microchip Technology Inc. MCP651 INPUT OFFSET EVALUATION BOARD USER'S GUIDE Appendix A. Schematics and Layouts A.1 INTRODUCTION This appendix contains the schematics and layouts for the MCP651 Input Offset Evaluation Board. A.2 SCHEMATIC AND LAYOUTS See A.3 "Board - Schematic" for the circuit diagram. U1 is the DUT (MCP651). U2 buffers the attenuated and filtered control voltage VCOX. U3 is the differential integrator. U4 is the amplifier that gives the final gain to the DUT's input offset voltage (VOST). Switch S1 gives the user a means of starting an auto-calibration cycle in the DUT. Switch S2 makes it so the amplifier (U4) can have two different gains, providing a tradeoff between accuracy and range. A.4 "Board - Combination of the Top Silk-Screen, Top Solder Mask and Top Metal Layers" through A.7 "Board - Bottom Metal Layer" show the PCB layout plots. This PCB has two metal layers: signal and power traces on top and ground plane on bottom. Groups of critical resistors have been arranged so that their thermoelectric voltages cancel (assuming constant temperature gradient); these groups are: * * * * * R1 through R4 R5 and R6 R7 and R8 R21 through R23 R24 and R25 The Gerber files for this board are available on the Microchip website (www.microchip.com) and are contained in the zip file "00258R2_Gerbers.zip". (c) 2009 Microchip Technology Inc. DS51834A-page 25 MCP651 Input Offset Evaluation Board User's Guide BOARD - SCHEMATIC M A.3 DS51834A-page 26 (c) 2009 Microchip Technology Inc. Schematics and Layouts A.4 BOARD - COMBINATION OF THE TOP SILK-SCREEN, TOP SOLDER MASK AND TOP METAL LAYERS (c) 2009 Microchip Technology Inc. DS51834A-page 27 MCP651 Input Offset Evaluation Board User's Guide A.5 BOARD - TOP SILK-SCREEN DS51834A-page 28 (c) 2009 Microchip Technology Inc. Schematics and Layouts A.6 BOARD - TOP SOLDER MASK AND TOP METAL LAYER (c) 2009 Microchip Technology Inc. DS51834A-page 29 MCP651 Input Offset Evaluation Board User's Guide A.7 BOARD - BOTTOM METAL LAYER DS51834A-page 30 (c) 2009 Microchip Technology Inc. MCP651 INPUT OFFSET EVALUATION BOARD USER'S GUIDE Appendix B. Bill Of Materials (BOM) B.1 MCP651 INPUT OFFSET EVALUATION BOARD BOM The BOM in Table B-1 shows all of the components assembled on the PCB. Table B-2 shows alternate components that can be placed on this PCB (after modification). Table B-3 shows components that are not populated. TABLE B-1: BILL OF MATERIALS FOR ASSEMBLED PCB Reference Designator Qty Description Manufacturer Part Number 1 C8 1.0 nF, 0603 SMD, X7R, 16V, 10% Panasonic(R)-ECG 1 C2 22 nF, 0603 SMD, X7R, 16V, 10% Panasonic-ECG ECJ-1VB1C223K 1 C10 33 nF, 0603 SMD, X7R, 16V, 10% Panasonic-ECG ECJ-1VB1C333K 11 C3, C11, C13 - C20, C25 100 nF, 0603 SMD, X7R, 16V, 10% Panasonic-ECG ECJ-1VB1C104K 2 C6, C7 150 nF, 1206 SMD, X7R, 50V, 10% Panasonic-ECG ECJ-3VB1C154K 4 C4, C5, C9, C12 1.0 F, 1206 SMD, X7R, 16V, 10% Panasonic-ECG ECJ-3YB1C105K 4 C21 - C24 10 F, 1206 SMD, X7R, 16V, 10% Panasonic-ECG ECJ-3YX1C106K 1 PCB MCP651 Input Offset Evaluation Board, 2-layer PCB (3.00 in x 2.50 in) Microchip Technology Inc. 102-00258 2 R2, R3 200, 0603 SMD, 0.1%, 25 ppm/C, 1/10W Susumu Co. Ltd. RG1608P-201-B-T5 1 R23 5.10 k, 0603 SMD, 0.1%, 25 ppm/C, 1/10W Susumu Co. Ltd. RG1608P-512-B-T5 ECJ-1VB1H102K 1 R4 10.0 k, 0603 SMD, 0.1%, 25 ppm/C, 1/10W Susumu Co. Ltd. RG1608P-103-B-T5 1 R24 15.0 k, 0603 SMD, 0.1%, 25 ppm/C, 1/10W Susumu Co. Ltd. RG1608P-153-B-T5 1 R26 86.6 k, 0603 SMD, 0.1%, 25 ppm/C, 1/10W Susumu Co. Ltd. RG1608P-8662-B-T5 1 R25 93.1 k, 0603 SMD, 0.1%, 25 ppm/C, 1/10W Susumu Co. Ltd. RG1608P-9312-B-T5 2 R12, R14 150 k, 0603 SMD, 0.1%, 25 ppm/C, 1/10W Susumu Co. Ltd. RG1608P-154-B-T5 2 R11, R13 332 k, 0603 SMD, 0.1%, 25 ppm/C, 1/10W Susumu Co. Ltd. RG1608P-3323-B-T5 2 R37, R38 4.99, 0603 SMD, 1%, 1/10W Yageo RC0603FR-074R99L 1 R10 1.00 k, 0603 SMD, 1%, 1/10W Panasonic-ECG ERJ-3EKF1001V 2 R5, R6 4.02 k, 0603 SMD, 1%, 1/10W Panasonic-ECG ERJ-3EKF4021V 1 R22 4.99 k, 0603 SMD, 1%, 1/10W Panasonic-ECG ERJ-3EKF4991V 2 R7, R8 20.0 k, 0603 SMD, 1%, 1/10W Panasonic-ECG ERJ-3EKF2002V 1 R17 102 k, 0603 SMD, 1%, 1/10W Panasonic-ECG ERJ-3EKF1023V 4 R31, R35, R36, R40 10, 0603 SMD, 5%, 1/10W Panasonic-ECG ERJ-3GEYJ100V 1 R27 100, 0603 SMD, 5%, 1/10W Panasonic-ECG ERJ-3GEYJ101V 2 R16, R18 3.3 k, 0603 SMD, 5%, 1/10W Panasonic-ECG ERJ-3GEYJ332V 4 R1, R9, R19, R21 10 k, 0603 SMD, 5%, 1/10W Panasonic-ECG ERJ-3GEYJ103V 3 R15, R20, R28 100 k, 0603 SMD, 5%, 1/10W Panasonic-ECG ERJ-3GEYJ104V 2 R29, R30 4.99, 1206 SMD, 1%, 1/4W Yageo RC1206FR-074R99L Note 1: The components listed in this Bill of Materials are representative of the PCB assembly. The released BOM used in manufacturing uses all RoHS-compliant components. (c) 2009 Microchip Technology Inc. DS51834A-page 31 Bill Of Materials (BOM) Reference Designator Qty Description Manufacturer Part Number 5 R32 - R34, R39, R41 10, 1206 SMD, 5%, 1/4W Panasonic-ECG ERJ-8GEYJ100V 1 R42 150, 1206 SMD, 5%, 1/4W Panasonic-ECG ERJ-8GEYJ151V 1 R44 2.2 k, 1206 SMD, 5%, 1/4W Panasonic-ECG ERJ-8GEYJ222V 1 R43 10 k POT, SMD, 20%, 1 Turn Thumbwheel Bournes Inc. 3352T-1-103LF 1 S1 SPST-NO, SMD, Switch, Push Button, 1 Pos. Panasonic-ECG EVQ-P2R02M 1 S2 SMD, Switch, DIP, 2 Pos. Grayhill Inc. 90HBW02PT 15 TP1 - TP15 SMD, Test Point Keystone Electronics(R) 5016 Microchip Technology Inc. MCP651-E/SN 3M SJ-5003 (BLACK) 1 U1 SOIC-8, Single Op Amp 3 U2 - U4 MCP6V01, SOIC-8, Single Op Amp 4 (for PCB mounting) Hemispherical Bumpon Standoff, 0.44 in x 0.20 in Note 1: MCP6V01-E/SN The components listed in this Bill of Materials are representative of the PCB assembly. The released BOM used in manufacturing uses all RoHS-compliant components. TABLE B-2: BILL OF MATERIALS FOR ALTERNATE COMPONENTS Reference Designator Qty Description Manufacturer Part Number 0 U1 PDIP-8, Single Op Amp Microchip MCP6XXX (Note 1) Technology Inc. 0 U1 DIP-8 IC Socket Tyco Electronics 0 (for PCB mounting) Stand-off, Hex, 0.500", 4 x 40 Thread, Nylon, Keystone 0.285" max. O.D. Electronics 1902C 0 (for PCB mounting) Machine Screw, Phillips, 4 x 40 Thread, 1/4" long, Nylon NY PMS 440 0025 PH Note 1: 2: The MCP6XXX represents any Microchip single op amp, with standard pinout, that fits the given design. The components listed in this Bill of Materials are representative of the PCB assembly. The released BOM used in manufacturing uses all RoHS-compliant components. TABLE B-3: 0 BILL OF MATERIALS FOR NOT POPULATED COMPONENTS Reference Designator Qty C1 Note 1: Building Fasteners 2-641260-1 Description Unknown Value, 0603 SMD, X7R, 16V, 10% Manufacturer Panasonic(R)-ECG Part Number -- The components listed in this Bill of Materials are representative of the PCB assembly. The released BOM used in manufacturing uses all RoHS-compliant components. (c) 2009 Microchip Technology Inc. DS51834A-page 32 Bill Of Materials (BOM) B.2 ADAPTOR BOARD BOM The BOM in Table B-4 shows the components needed to build the adaptor board for alternate DUT's (see Figure 3-4). TABLE B-4: BILL OF MATERIALS FOR ADAPTOR BOARD Qty Reference Designator 1 -- 8-Pin SOIC/MSOP/TSSOP/DIP Evaluation Board Microchip Technology SOIC8EV Inc. 2 -- Board-to-Board Connector, Low Profile Header, 4 Positions, 0.100 in, Gold Plated Samtec Inc. BBL-104-G-F 2 -- 100 nF, 0603 SMD, X7R, 16V, 10% Panasonic(R)-ECG ECJ-1VB1C104K 1 -- Single Op Amp in Standard 8-pin pinout Microchip Technology MCP6XXX Inc. Note 1: Description Manufacturer Part Number The components listed in this Bill of Materials are representative of the PCB assembly. The released BOM used in manufacturing uses all RoHS-compliant components. (c) 2009 Microchip Technology Inc. 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