CPC5611ATR - IXYS Corporation - Datasheet.Directory

DS-CPC5610/5611-R9.0 www.clare.com 1

Features

•Full-duple x dat a and voice transmission

•Transformerless telephone line isolation interface

•Operates at all modem speeds, including V.90 (56K)

•3.3 or 5 V po w er supply operation

•Half-wave ring detector (CPC5610) or full- w ave ring

detector (CPC5611)

•Caller ID signal reception

•Small 32-pin SOIC plastic package

•Printed-circuit board space and cost savings

•Meets PC Card (PCMCIA) height requirements

•Easy interface with modem ICs and v oice CODECs

•W orldwide dial-up telephone network compatibility

•Supplied application circuit complies with the

requirements of TIA/EIA/I S-968 (FCC part 68),

UL1950, UL60950, EN60950, IEC60950,

EN55022B, CISPR22B, EN55024, and TBR-21

•CPC5610 and CPC5611 comply with UL1577

•TTL compatible logic inputs and output s

•Line-side circuit powe red from telephone line

Applications

•Satellite and cab le set-t op boxes

•V.90 (and other standard) modems

•Fax machines

•Voicemail systems

•Computer telephony

•PBXs

•Telephony gateways

•Embedded modems f or such applications as POS

terminals, automated banking, remote metering,

v ending machines, security, and surveillance

Description

Clare CPC5610 and CPC5611 LITELINKs are silicon

data access arrangement (DAA) ICs used in data and

v oice communication applications to make connec-

tions to the pub l ic switched telephone network

(PSTN). LITELINK uses on-chip opt ical component s

and a few inexpensive external components to form a

complete v oice or high- speed d ata teleph one line

interface.

LITELINK eliminates the need for the large isolation

transformers or capacitors as used in other DAA con-

figurations . It incorporates the required high-voltage

isolation barrier in the surface-mount SOIC package.

The CPC5610 (half-wave ring detect) and CPC56 11

(full-wave ring detect) build upon Clare’s existing

LITELINK line, wit h improved performance and 3.3 V

operation.

Ordering Information

Figure 1. CPC5610/CPC5611 Block Diagram

Part Number Description

CPC5610A 32-pin surface mount DAA with half-wave ring

detect, tubed

CPC5610ATR 32-pin surface mount DAA with half-wave ring

detect, tape and reel

CPC5611A 32-pin surface mount DAA with full-wave ring

detect, tubed

CPC5611ATR 32-pin surface mount DAA with full-wave ring

detect, tape and reel

Transconductance

Stage

2-4 Wire Hybrid

AC/DC Termination

Hookswitch

Isolation Barrier

Vref

AGC

Vref

AGC

Snoop Amplifier

Receive

Isolation

Amplifier

Transmit

Isolation

Amplifier

TIP+

RING-

Transmit

Diff.

Amplifier

Receive

Diff.

Amplifier

CID/

RING

MUX

Tx+

Tx-

RING

CID

Rx+

Rx-

Current Limit Control

AC Impedance Control

VI Slope Control

CSNOOP

RSNOOP

CPC5610/CPC5611

LITELINK™ II Silicon Data Access Arrangement (DAA) IC

CPC5610/CPC5611

2 www.clare.com R9.0

1 Electrical Specifications. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3

1.1 Absolute Maximum Ratings. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3

1.2 Performance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3

1.3 Pin Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

2 Application Circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

2.1 Resistive Termination Application Circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

2.1.1 Resistive Termination Application Circuit Part List . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

2.2 Reactive Termination Application Circuit. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

2.2.1 Reactive Termination Application Circuit Part List. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

3 Using LITELINK. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

3.1 Switch Hook Control (On-hook and Off-hook States) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

3.2 On-hook Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

3.2.1 Ring Signal Detection via the Snoop Circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

3.2.2 Polarity Reversal Detection with CPC5611 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

3.2.3 On-hook Caller ID Signal Processing. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

3.3 Off-Hook Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

3.3.1 Receive Signal Path. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

3.3.2 Transmit Signal Path . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

3.4 DC Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

3.4.1 Resistive Termination Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

3.4.2 Reactive Termination Applications. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

3.5 AC Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

3.5.1 Resistive Termination Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

3.5.2 Reactive Termination Applications. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

4 Regulatory Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

5 LITELINK Design Resources . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

5.1 Clare, Inc. Design Resources . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

5.2 Third Party Design Resources. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

6 LITELINK Performance. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

7 Manufacturing Information. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

7.1 Mechanical Dimensions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

7.2 Tape and Reel Packaging. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

7.3 Soldering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

7.3.1 Moisture Reflow Sensitivity . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

7.3.2 Reflow Profile. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

7.4 Washing. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

CPC5610/CPC5611

Rev. 9.0 www.clare.com 3

1. Electrical Specifications

1.1 Absolute Maximum Ratings Absolute maximum ratings are stress ratings. Stresses in

excess of these ratings can cause permanent damage to

the device. Functional operation of the device at these or

any other conditions beyond those indicated in the opera-

tional sections of this data sheet is not implied. Exposure of

the device to the absolute maximum ratings for an

extended period may degrade the device and affect its reli-

ability.

1.2 Performance

Parameter Minimum Maximum Unit

Isolation Voltage 1500 - VRMS

Continuous Tip to Ring

Current (RZDC = 5.2Ω)150 mA

Total Package Power Dis-

sipation 1W

Operating temperature 0 +85 °C

Storage temperature -40 +125 °C

Soldering temperature - +220 °C

Parameter Minimum Typical Maximum Unit Conditions

DC Characteristics

Operating Voltage VDD 3.0 - 5.50 V Host side

Operating Current IDD - - 10 mA Host side

Operating Voltage VDDL 2.8 - 3.2 V Line side, derived from tip and ring

Operating Current IDDL - 10.5 12 mA Line side, drawn from tip and ring while off-hook

On-hook Characteristics

Metallic DC Resistance 10 - - MΩTip to ring, 100 Vdc applied

Longitudinal DC Resistance 10 - - MΩ150 Vdc applied from tip and ring to Earth ground

Ring Signal Detect Level 5 - - VRMS 68 Hz ring signal applied to tip and ring

Ring Signal Detect Level 28 - - VRMS 15 Hz ring signal applied across tip and ring

Snoop Circuit Frequency Response 166 - >4000 Hz -3 dB corner frequency @ 166 Hz

Snoop Circuit CMRR - -40 - dB 120 VRMS 60 Hz common mode signal across tip

and ring

Ringer Equivalence - 0.1B - REN

Longitudinal Balance 60 - - dB Per FCC part 68.3

Off-Hook Characteristics

AC Impedance - 600 - ΩTip to ring, using resistive termination application

circuit

Longitudinal Balance 40 - - dB Per FCC part 68.3

Return Loss - 26 - dB Into 600 Ω at 1800 Hz

Transmit and Receive Characteristics

Frequency Response 30 - 4000 Hz -3 dB corner frequency 30 Hz

Trans-Hybrid Loss - 36 - dB Into 600 Ω at 1800 Hz, with C18

Transmit and Receive Insertion Loss -1 0 1 dB 30 Hz to 4 kHz

Average In-band Noise - -120 - dBm/Hz 4 kHz flat bandwidth

Harmonic Distortion - -80 - dB -3 dBm, 600 Hz, 2nd harmonic

CPC5610/CPC5611

4 www.clare.com Rev. 9.0

Transmit Level - 0 2.2 VP-P Single-tone sine wave. Or 0 dBm into 600 Ω.

Receive Level - - 2.2 VP-P Single-tone sine wave. Or 0 dBm into 600 Ω.

RX+/RX- Output Drive Current - - 0.5 mA Sink and source

TX+/TX- Input Impedance 60 90 120 kΩ

Isolation Characteristics

Isolation Voltage 1500 - - VRMS Line side to host side

Surge Rise Time 2000 - - V/µS No damage via tip and ring

OH and CID Control Logic Inputs

Input Threshold Voltage 0.8 - 2.0 V

High Level Input Current -120 - 0 µAVIN≤VDD

Low Level Input Current - - -120 µAVIN=GND

RING Output Logic Levels

Output High Voltage VDD -0.4 --V

IOUT = -400 µA

Output Low Voltage - - 0.4 V IOUT = 1 mA

Specifications subject to change wi thout notice. All performance characteristics based on the use of Clare, Inc. application circuits. Functional operation of the

device at condit ions beyond those specified here is not implied. Specification conditions: VDD = 5V, temperature = 25 °C, unless otherwise indicated.

Parameter Minimum Typical Maximum Unit Conditions

CPC5610/CPC5611

Rev. 9.0 www.clare.com 5

1.3 Pin Description Figure 2. Pinout

Pin Name Function

1 VDD Host (CPE) side power supply

2 TXSM Transmit summing junction

3TX- Negative differential transmit signal to DAA

from host

4TX+ Positive differential transmit signal to DAA from

host

5 TX Transmit differential amplifier output

6 REFM Internal voltage reference

7 GND Host (CPE) side analog ground

8OH Assert logic low for off-hook operation

9RING Indicates ring signal, pulsed high to low

10 CID Assert logic low while on hook to place CID

information on RX pins.

11 RX-

Negative differential analog signal received

from the telephone line. Must be AC coupled

with 0.1 µF.

12 RX+

Positive differential analog signal received from

the telephone line. Must be AC coupled with

0.1 µF.

13 SNP+ Positive differential snoop input

14 SNP- Negative differential snoop input

15 RXF Receive photodiode amplifier output

16 RX Receive photodiode summing junction

17 VDDL Power supply for line side, regulated from tip

and ring.

18 RXS Receive isolation amp summing junction

19 RPB Receive LED pre-bias current set

20 BR- Bridge rectifier return

21 ZDC Electronic inductor and DC current limit

22 DCS2 DC feedback output

23 DCS1 V to I slope control

24 REFB 0.625 Vdc reference

25 GAT External MOSFET gate control

26 NTS Receive signal input

27 BR- Bridge rectifier return

28 TXSL Transmit photodiode summing junction

29 ZNT Receiver impedance set

30 ZTX Transmit transconductance gain set

31 TXF Transmit photodiode amplifier output

32 REFL 1.25 Vdc reference

VDD

TXSM

TX-

TX+

REFM

GND

RING

CID

RX-

RX+

SNP+

SNP-

RXF

REFL

TXF

ZTX

ZNT

TXSL

BR-

NTS

GAT

REFB

DCS1

DCS2

ZDC

BR-

RPB

RXS

VDDL

CPC5610/CPC5611

6 www.clare.com Rev. 9.0

2. Application Circuits

LITELINK can be used with telephone networks world-

wide. Some pub lic telephone netw orks, notab ly in

North America and Japan require resistive line temri-

nation. Other telephon e netw orks in Europe and else-

where require reactive line termination.

The application circuits belo w address both line termi-

nation models. The rea ctive termination application

circuit (see Section 2.2 on page 8) describes a TBR-21

implementation. This circuit can be adapted easily for

other reactiv e termination needs. Worldwide applica-

tion of LITELINK is described more fully in Clare appli-

cation note AN-147, Worldwide Application of LITELINK.

2.1 Resistive Termination Application Circuit

Figure 3. Resistive Termination Application Circuit Schematic

1This design w as tested and found to co mply with FCC Part 68 with this

part. Other compliance requirements ma y require a different part.

2Higher-noise pow er suppl ies ma y re quire substit ution of a 220 µH inductor,

Toko 380HB-2215 or simi lar. See the Power Quality section of Cla re applica-

tion note AN-146, Guidelines for Effective LITELINK Designs for more infor ma-

tion.

3Optional for enhanced trans-hybrid loss, see “Trans-Hybrid Loss” on page 16.

RING

CID

TX+

RX+

TX-

RX-

3.3 or 5 V

C13 0.1

C14 0.1

C2 0.1

C3 0.1

C4 0.1

R1 (R ) 80.6K 1%

R23

10²

-BR

TIP

RING

LITELINK

VDD

TXSM

TX-

TX+

REFM

GND

RX-

RX+

SNP+

SNP-

RXF

RING

CID

REFL

TXF

ZTX

ZNT

TXSL

BR1-

NTS

GAT

REFB

DCS1

DCS2

ZDC

BR2-

RPB

RXS

VDDL

DB1

SIZB60

600V_60A

SP1

P3100SB

-BR

0.1

C16

10 FB1

600

200 mA

Ω

R5 (R )

42.2K

TXF

R13

(R )

NTS

C10

0.01

500V

R15 (R ) 1.69M 1%

DCS2

R14

(R )

GAT

R20

(R )

VDDL

R21 (R )

DCS1B

6.2 M

R22 (R )

6.8 M 1%

DCS1A

C12 (C )

0.027

DCS

(R )

127K

RXF

(R )

1.5M

SNPD

(C )

220pF

2000V

SNP-

(C )

220pF

2000V

SNP+

R6 (R )

1.8M 1/10W 1%

SNP-2

R44 (R )

1.8M 1/10W 1%

SNP-1

R7 (R )

1.8M 1/10W 1%

SNP+2

R45 (R )

1.8M 1/10W 1%

SNP+1

(R )

68.1

R8 (R )

200K 1%

HTX

R9 (R )

200K 1%

HNT

-BR

NOTE: Unless otherwise

noted, all resistors are in

Ohms, 5%. All capacitors

are in microFarads.

CPC5602C

R10

(R )

301

ZNT

R18

(R )

150

ZTX

R12 (R ) 1M 1%

NTF

R16 (R ) 8.2 1%

ZDC

-BR

C18³

15 pF

C15

0.01

500V

CPC5610/CPC5611

Rev. 9.0 www.clare.com 7

2.1.1 Resistive Termination Application Circuit Part List

Quantity Reference Designator Description Suppliers

1C1 1 µF, 16 V, ±10%

Panasonic, AVX, Novacap, Murata,

SMEC, etc.

6 C2, C3, C4, C9, C13, C14 0.1 µF, 16 V, ±10%

2C7, C81220 pF, 2 kV, ±5%

2C10, C1510.01 µF, 500 V, ±10%

1 C12 0.027 µF, 16 V, ±10%

1C16 10 µF, 16 V, ±10%

1 C18 (optional) 15 pF, 16V, ±10%

1 R1 80.6 kΩ, 1/16 W, ±1%

Panasonic, Electro Films, FMI, Vishay,

etc.

1 R2 127 kΩ, 1/16 W, ±1%

1 R3 1.5 MΩ, 1/16 W, ±1%

1 R4 68.1 Ω, 1/16 W, ±1%

1 R5 42.2 kΩ, 1/16 W, ±1%

4R6, R7, R44, R4511.8 MΩ, 1/10 W, ±1%

2 R8, R9 200 kΩ, 1/16 W, ±1%

1 R10 301 Ω, 1/16 W, ±1%

2 R12, R13 1 MΩ, 1/16 W, ±1%

1R14 47 Ω, 1/16 W, ±5%

1 R15 1.69 MΩ, 1/16 W, ±1%

1 R16 8.2 Ω, 1/16 W, ±1%

1 R18 150 Ω, 1/16 W, ±1%

1R20 2 Ω, 1/16 W, ±5%

1 R21 6.2 MΩ, 1/16 W, ±1%

1 R22 6.8 MΩ, 1/16 W, ±1%

1R23 10 Ω, 1/16 W, ±5%, or 220 µH inductor

1 FB1 600 Ω, 200 mA ferrite bead Murata BLM11A601S or similar

1 DB1 SIZB60, 600 V, 60 A bridge rectifier Shindengen, Diodes, Inc.

1 SP1 350 V, 100 A Sidactor Teccor, ST Microelectronics, TI

1 Q1 CPC5602 FET Clare

1 U1 CPC5610 LITELINK

1Through-hole components offer significant cost savings over SMT.

CPC5610/CPC5611

8 www.clare.com Rev. 9.0

2.2 Reactive Termination Application Circuit

Figure 4. Reactive Termination Application Circuit Schemat ic

1This design w as tested and found to co mply with FCC Part 68 with this

part. Other compliance requirements ma y require a different part.

2Higher-noise pow er suppl ies ma y re quire substit ution of a 220 µH inductor,

Toko 380HB-2215 or simi lar. See the Power Quality section of Cla re applica-

tion note AN-146, Guidelines for Effective LITELINK Designs for more infor ma-

tion.

RING

CID

TX+

RX+

TX-

RX-

3.3 or 5 V

C13 0.1

C14 0.1

C2 0.1

C3 0.1

C4 0.1

R1 (R ) 80.6K 1%

R23

10²

-BR

TIP

RING

LITELINK

VDD

TXSM

TX-

TX+

REFM

GND

RX-

RX+

SNP+

SNP-

RXF

RING

CID

REFL

TXF

ZTX

ZNT

TXSL

BR1-

NTS

GAT

REFB

DCS1

DCS2

ZDC

BR2-

RPB

RXS

VDDL

DB1

SIZB60

600V_60A

SP1

P3100SB

-BR

0.1

C16

10 FB1

600

200 mA

Ω

R5 (R )

42.2K

TXF

R13

(R )

NTS

C10

0.01

500V

R15 (R ) 1.69M 1%

DCS2

R14

(R )

GAT

R20

(R )

VDDL

R21 (R )

DCS1B

6.2 M

R22 (R )

6.8 M 1%

DCS1A

C12 (C )

0.027

DCS

(R )

127K

RXF

(R )

1.5M

SNPD

(C )

220pF

2000V

SNP-

(C )

220pF

2000V

SNP+

R6 (R )

1.8M 1/10W 1%

SNP-2

R44 (R )

1.8M 1/10W 1%

SNP-1

R7 (R )

1.8M 1/10W 1%

SNP+2

R45 (R )

1.8M 1/10W 1%

SNP+1

(R )

68.1

R8 (R )

200K 1%

HTX

R9 (R )

200K 1%

HNT

-BR

NOTE: Unless otherwise

noted, all resistors are in

Ohms, 5%. All capacitors

are in microFarads.

CPC5602C

R10

(R )

ZNT1

R18

29.4

(R )

ZTX1

R11

(R )

169

ZNT2

R19

84.5

(R )

ZTX2

C20

(C )

0.68

ZNT

C11

(C )

1.5

ZTX

R12 287K 1%(R )

NTF

R16 22.1 1%(R )

ZDC

-BR

C15

0.0022

500V

-BR

MMBT4126

R74

-BR

C32

0.47

CPC5610/CPC5611

Rev. 9.0 www.clare.com 9

2.2.1 Reactive Termination Application Circuit Part List

Quantity Reference Designator Description Supplier

1C1 1 µF, 16 V, ±10%

Panasonic, AVX, Novacap, Murata,

SMEC, etc.

6 C2, C3, C4, C9, C13, C14 0.1 µF, 16 V, ±10%

1 C5 0.47 µF, 16 V, ±10%

2C7, C81220 pF, 2 kV, ±5%

2C1010.01 µF, 500 V, ±10%

1 C11 1.5 µF, 16 V, ±10%

1 C12 0.027 µF, 16 V, ±10%

1C1510.0022 µF, 500 V, ±10%

1C16 10 µF, 16 V, ±10%

1 C20 0.68 µF, 16 V, ±10%

1 C32 0.47 µF, 16 V, ±10%

1 R1 80.6 kΩ, 1/16 W, ±1%

Panasonic, Electro Films, FMI, Vishay,

etc.

1 R2 127 kΩ, 1/16 W, ±1%

1 R3 1.5 MΩ, 1/16 W, ±1%

1 R4 68.1 Ω, 1/16 W, ±1%

1 R5 42.2 kΩ, 1/16 W, ±1%

4R6, R7, R44, R4511.8 MΩ, 1/10 W, ±1%

2 R8, R9 200 kΩ, 1/16 W, ±1%

1R10 59 Ω, 1/16 W, ±1%

1 R11 169 Ω, 1/16 W, ±1%

1 R12 287 kΩ, 1/16 W, ±1%

1R13 1 MΩ, 1/16 W, ±1%

1R14 47 Ω, 1/16 W, ±5%

1 R15 1.69 MΩ, 1/16 W, ±1%

1R16 22.1 Ω, 1/16 W, ±1%

1R18 29.4 Ω, 1/16 W, ±1%

1R19 84.5 Ω, 1/16 W, ±1%

1R20 2 Ω, 1/16 W, ±5%

1 R21 6.2 MΩ, 1/16 W, ±1%

1 R22 6.8 MΩ, 1/16 W, ±1%

1R23 10 Ω, 1/16 W, ±5%, or 220 µH inductor

1R74 10 Ω, 1/16 W, ±1%

1 FB1 600 Ω, 200 mA ferrite bead Murata BLM11A601S or similar

1 DB1 SIZB60, 600 V, 60 A bridge rectifier Shindengen, Diodes, Inc.

1 SP1 350 V, 100 A Sidactor Teccor, ST Microelectronics, TI

1 Q1 CPC5602 FET Clare

1 Q2 MMBT4126 Fairchild

1 U1 CPC5610 LITELINK Clare

1Through-hole components offer significant cost savings over SMT.

CPC5610/CPC5611

10 www.clare.com Rev. 9.0

3. Using LITELINK

As a full-featured telephone line interface, LITELI NK

performs the following functions:

•DC termination

•A C impedance control

•V/I slope control

•2-wire to 4-wire conversion (hybrid)

•Current limiting

•Ring detection

•Caller ID signal reception

•Switch hook

LITELINK can accommodate specific application f ea-

tures without sacrificing basic functionality and perfor-

mance. Application features include, but are not

limited to:

•High gain (+3 dBm) oper ation

•Pulse dialing

•Ground start

•Loop start

•Parallel telephone off-hook detection (911 feature)

•Battery reversal

•Line presence

•W orld-wide progr ammab le oper ation

This section of the data sheet describes LITELINK

operation in st andard configuration for usual oper a-

tion. Clare off ers addit ional applicat ion inf ormation on-

line (see Section 5 on page 14). These include informa-

tion on the following topics:

•Circuit isolation considerations

•Optimizing LITELINK performance

•Data Access Arrangement architect ure

•LITELINK circuit descriptions

•Surge protection

•EMI considerations

Other specific application materials are also refer-

enced in this section as appropriate.

3.1 Switch Hook Control (On-hook

and Off-hook States)

LITELINK operates in one of two conditions, on-hook

and off-hook. In the on -hook condition t he te lephone

line is available for calls. In the off-hook condition the

telephone line is engaged. Use the OH control input to

place LITELINK in one of these two states. With OH

high, LITELINK is on-hook and ready to make or

receive a call. The snoop circuit is enab led. Assert OH

low to place LITELI NK in th e off -hook st ate. In the off-

hook state, loop current flows through LITELINK and

the system is answering or placing a call.

3.2 On-hook Operation

The LITELINK application circuit leakage current is

less than 10 µA with 100 V across ring and tip, equiv a-

lent to greater t han 10 MΩ on-hook resist ance .

3.2.1 Ring Signal Detection via the Snoop

Circuit

In the on-hook state (OH and CID not asserted), an

internal multiplexer turns on the snoop circuit. This cir-

cuit monitors the telephone line for two conditions; an

incoming ring signal, and caller ID data bursts.

Refer to the application schematic diagram (see Figure

3 on page 6). C7 (CSNP-) and C8 (CSNP+) provide a

high-v oltage isolation barrier between the telephone

line and SNP- and SNP+ on the LITELI NK while cou-

pling A C signals to the snoop amplifier. The snoop cir-

cuit “snoops” the telep hone line cont inuously while

dra w ing no current. I n the LITELINK, ringing signals

are compared to a threshold. The comparator output

f orms the RING signal output from LITELINK. This sig-

nal must be qualified by the host system as a valid

ringing signal. A low level on RING indicates that the

LITELINK ring signal threshold has been exceeded.

F or the CPC5610 (wit h t he half-wave ring detector),

the frequency of the RING output f ollo w s the fre-

quency of the ringing signal from the central office

(CO), typically 20 Hz. The RING output of t he

CPC5611 (with the full-wa ve ring detector) is twice the

ringing signal frequency.

Hysteresis is employed in the LITELINK ring detector

circuit to provide noise imm unity. The setup of the ring

detector comparator causes RING output pulses t o

remain low for most of the ringing signal half-cycle.

The RING output returns high f or the entire negativ e

half-cycle of the ringing signal for the CPC5610. For

the CPC5611, the RING output returns high for a short

period near the zero-crossing of the ringing signal

bef o re re turning low during the positive half -cycle . For

both the CPC5610 and CPC5611, t he RING output

remains high between ringing signal b ursts.

The ring detection threshold depends on the v alues of

R3 (RSNPD), R6 (RSNP-), R7 (RSNP+), C7 ( CSNP-), and

C8 (CSNP+). The value s for these components sho wn

in the typical application circuits are recommended f or

CPC5610/CPC5611

Rev. 9.0 www.clare.com 11

typical operation. The ring detection threshold can be

changed according to the following formula:

Clare Application Note AN-117 Customize Caller ID Gain

and Ring Detect Voltage Threshold is a spreadsheet for

trying different component values in this circuit.

Changing the ring detection threshold will also change

the caller ID gain and the timing of the polarity rev ersal

detection pulse, if used.

3.2.2 Polarity Reversal Detection with

CPC5611

The full-wave ring detector in the CPC5611 makes it

possible t o detect tip and ring polarity reversal using

the RING output. When the polarity of tip and ring

re verses, a pulse on RING indicates t he ev ent. Your

host system must be able to discriminate this single

pulse of appro ximately 1 msec (using the recom-

mended snoop circuit e xternal components) from a

v alid ringing signal.

3.2.3 On-hook Caller ID Signal Processing

On-hook caller ID (CID) signals ar e processe d by

LITELINK b y coupling the CI D data burst through the

snoop circuit to the LITELINK RX output s under con-

trol of the CID pin. In North America, CID data signals

are typically sent betw een the first and second ringing

signal.

Figure 5. On-hook Caller ID Signal Timing in

North America for CPC5610 (with Half-

wave Ring Detect)

In North American applications, follow these steps to

receiv e on- hook caller ID data via t he LITELINK RX

outputs:

1. Detect the first ringing signal outputs on RING.

2. Assert CID low.

3. Process the CID data from the RX outputs.

4. De-assert CID (high or floating).

Note: Taking LITELINK off-hook ( via the OH pin) dis-

connects the snoop path from both the receive outputs

and the RING output, regardless of the state of the

CID pin.

CID gain from tip and ring to RX+ and RX- is deter-

mined by:

where ƒ is the frequency of the CID data signal.

The recommended components in the application cir-

cuit yield a gain 0.27 dB at 200 Hz. Clare App licat ion

Note AN-117 Customize Caller ID Gain and Ring Detect

Voltage Threshold is a spreadsheet for trying different

component values in this circuit. Changing the CID

gain will also change the ring detection threshold and

the timing of the polarity reversal detection pulse, if

used.

F or single- ended snoop circuit out put of 0 dBm, set

the total resistance across the series resistors (R6/

R44 and R7/R45) to 1.4 MΩ.

3.3 Off-Hook Operation

3.3.1 Receive Signal Path

Signals to and from the telephone n etwork appear on

the tip and ring connections of the application circuit.

Receive signals ar e e xtracted from transmit signals b y

the LITELINK two-wire to four-wire hybrid. Next, the

receiv e signa l is converted to infrared light by the

receiv e phot odiode amplif ier and receive path LED.

The intensity of the light is modulated by the receiv e

signal and coupled across the electrical isolation bar-

rier by a reflective dome.

On the host equipment side of t he barrier, the receiv e

signal is converted by a photod iode int o a photocu r-

VRINGPK

750mV

-----------------





2R6R3

+()

πfRINGC7

()

-------------------------------+=

Caller ID data

RING

CID

First Ring

Signal levels not to scale

Second Ring

2s 500 ms 3s 475 ms 2s

GAINCID dB() 20 6R3

2R6R3

+()

πfC7

()

-------------------+

-----------------------------------------------------------------

log=

CPC5610/CPC5611

12 www.clare.com Rev. 9.0

rent. The photocurrent, a linear representation of the

receive signal, is amplified and con v erted to a diff eren-

tial v oltage o utput on RX+ and RX-.

Variations in gain are controlled to within ±1 dB by an

on-chip automatic gain control (AGC) circuit, which

sets the output of the photoamplifier to unity gain.

To accommodate single-supply oper ation, LITELINK

includes a small DC bias on the RX outputs of 1.0

Vdc. Most applications should AC couple the RX out-

puts as shown in Figure 6.

LITELINK ma y be used for diff erential or single-ended

output as shown in Figure 6. Single-end ed use will

produce 6 dB less signal output amplitude. Do not

e xceed 0 dBm into 600 Ω (2.2 VP-P) signal input.

Figure 6. Differential and Single-ended Receive

Path Connections to LITELINK

3.3.2 Transmit Signal Path

Connect transmit signals from t he host equipment to

the TX+ and TX- pins of LITELINK. Do not exceed a

signal level of 0 dBm in 600 Ω (or 2.2 VP-P). Differen-

tial transmit signals are converted to single-ended sig-

nals in LITELINK. The signal is coupled to the transmit

photodiode amplifier in a similar manner to the receiv e

path.

The output of the photodiode amplif ier is coupled t o a

v olt age-to-curr ent converter via a transconductance

stage where the transmit signa l modulat es t he tele-

phone line loop current. As in the receive path, gain is

set to unity automatically, limiting insertion loss to 0,

±1 dB.

Figure 7. Differential and Single-ended Transmit

Path Connections to LITELINK

3.4 DC Characteristics

The CPC5610 and CPC5611 are designed for world-

wide application regarding DC characteristics, includ-

ing use under the requirements of TBR-21. The ZDC,

DCS1, and DCS2 pins control the VI slope char act er-

istics of LITELINK. Selecting appropriate resistor val-

ues f or RZDC (R16) and RDCS (R15 ) in the provided

application circuits assure compliance with DC

requirements.

3.4.1 Resistive Termination Applications

LITELINK includes a telephone line current limit fea-

ture that is selectable by selecting th e desired value

for RZDC (R16) using the following formula:

Clare recommends using 8.2 Ω for RZDC in North

America and Japan, limiting telepho ne line current t o

133 mA.

3.4.2 Reactive Termination Applications

TBR-21 sets the telephone line current limit at 60 mA.

To meet this requirement, set R ZDC (R16) to 22. 1 Ω.

See Clare application note AN-146 Guidelines for Effec-

tive LITELINK Designs f or information on FET heat sink-

ing in this application.

RX+

RX-

RX+

RX-

0.1uF

LITELINK

Host-side CODEC

or Voice Circuit

LITELINK

TXA1

TXA2

0.1uf

Host CODEC or

Transmit Circuit

Host CODEC or

Transmit Circuit

TX-

TX+

TXA1

0.1uf

0.1uf TX-

TX+

ICLAmps 1V

RZDC

------------- 0.011A+=

CPC5610/CPC5611

Rev. 9.0 www.clare.com 13

3.5 AC Characteristics

3.5.1 Resistive Termination Applications

North American and Japanese telephone line AC ter-

mination requirements are met with a re sistive 600 Ω

AC termination. Receive termination is applied to the

LITELINK ZNT pin (pin 29) as a 301 Ω resistor, RZNT

(R10). A 150 Ω resistor, R18 (RZTX), applied to the

LITELINK ZTX pin (pin 30) sets the corr ect transmit

gain and impedance.

3.5.2 Reactive Termination Applications

Many areas use a single-pole complex impedance to

model the telephone netw ork transmission line char-

acteristic impedance as shown in the tab le below.

Matching a comple x impedance requires the use of

comple x networks on ZNT and ZTX. In order to

accommodate high pow er levels , it is necessary to

modify the transmit and receiv e gain char acteristics of

your LITELI NK implementation. The complex network

on the ZTX pin increases tr ansmit gain by 7 dB. A 7

dB pad may be inserted bef ore t he TX+ and TX- pins

to provide overall unity gain. Similarly, with a complex

network, the ratio of R12 ( RNTF) and R13 (RNTS) must

be modified from 1:1 to 1:.287, which introduces a 7

dB loss in the receive path from tip and ring to ZNT.

4. Regulatory Information

LITELINK can be used to build products that comply

with the requirements of TIA/EIA/IS-968 (formerly

FCC part 68), FCC part 15B, TBR- 21, EN60950,

UL1950, EN55022B, IEC950/IEC60950, CISPR22B,

EN55024, and many other standards . LITELINK com-

plies with the requirements of UL1577. L ITELINK pro-

vides supplementary isolation. Metallic surge

requirements are met through the inclusion of a Sidac-

tor in the application circuit. Longitudinal surge protec-

tion is provided b y LITELINK’s optical-across-the-

barrier technology and t he use of high-voltage compo-

nents in the application circuit as needed.

The inf ormation provided in this document is intended

to inf orm the equipment designer b ut it is not sufficient

to assure proper system design or regulat ory compli-

ance. Since it is the equipment manuf act urer's respon-

sibility to ha ve their equipment properly designed to

conform to all rele vant regulations, designers using

LITELINK are advised to carefully ve rify that their end-

product design complies with all applicable safet y,

EMC , and oth er relevant standards and regulations.

Semiconductor components are not r ated to withstand

electrical ov erstress or electro-static discharges result -

ing from inadequate protection measures at the board

or system le vel.

Line Impedance Model

TBR-21 Australian

Ra 750 820

Rb 270 220

C 150 nF 120 nF

CPC5610/CPC5611

14 www.clare.com Rev. 9.0

5. LITELINK Design Resources

5.1 Clare, Inc. Design Resources

The Clare, Inc. w eb site has a wealth of information

useful f o r designing with LI TELINK, including applica-

tion notes and ref eren ce designs that already meet all

applicable regulatory requirements. LITELINK data

sheets also contains additional application and design

inf ormation. See the following links:

LITELINK datasheets and reference designs

Application note AN-107 LOCxx Series - Isolated Ampli-

fier Design Principles

Application note AN-114 ITC117P

Application note AN-117 Customize Caller-ID Gain and

Ring Detect Voltage Threshold for CPC5610/11

Application note AN-140, Understanding LITELINK

Application note AN-141, Enhanced Pulse Dialing with

LITELINK

Application note AN-143, Loop Reversal Detection with

LITELINK

Application note AN-146, Guidelines for Effective

LITELINK Designs

Application note AN-147, Worldwide Application of

LITELINK

Application note AN-149, Increased LITELINK II Transmit

Power

Application note AN-150, Ground-start Supervision Cir-

cuit Using IAA110

5.2 Third Party Design Resources

The following also contain information useful for DAA

designs. All of the books are available on ama-

zon.com.

Understanding Telephone Electronics, Stephen J. Big-

elow, et. al., Butterworth-Heinemann; ISBN:

0750671750

Newton’s Telecom Dictionary, Harry Ne wt on, CMP

Books; ISBN: 1578200695

Photodiode Amplifiers: Op Amp Solutions , Jerald

Graeme, McG raw-Hill Prof essional Publishing; ISBN:

007024247X

Teccor, Inc. Surge Protection Products

United States Code of Federal Regulations, CFR 47

Part 68.3

CPC5610/CPC5611

Rev. 9.0 www.clare.com 15

6. LITELINK Performance

The f ollo wing g raphs show LITELINK perf ormance

using the North American application circuit shown in

this data sheet.

Figure 8. Receive Frequency Response at RX

Figure 9. Transmit Frequency Response at TX

Figure 10. Receive THD on RX

Figure 11. Transmit THD on Tip and Ring

+2.5

+1.5

+0.5

-0

-0.5

-1

-1.5

-2

-2.5

-3

-3.5

-4

-4.5

-5

Gain

(dBm)

20 50 100 200 500 1K 2K 4K

Frequency (Hz)

+2.5

+1.5

+0.5

-0

-0.5

-1

-1.5

-2

-2.5

-3

-3.5

-4

-4.5

-5

Gain

(dBm)

20 50 100 200 500 1K 2K 4K

Frequency (Hz)

CPC5610/CPC5611

16 www.clare.com Rev. 9.0

Figure 12. Trans-Hybrid Loss

Figure 13. Return Loss

Figure 14. Snoop Cir cuit Frequency Response

Figure 15. Snoop Circuit THD + N

Figure 16. Snoop Circuit Common Mode

Rejection

-45

-40

-35

-30

-25

-20

-15

300 800 1300 1800 2300 2800 3300

Frequency (Hz)

THL

(dB)

Without C18 With C18

0 500 1000 1500 2000 2500 3000 3500 4000

Frequency (Hz)

Re t u r n

Loss

(dB)

-25

-20

-15

-10

-5

0 500 1000 1500 2000 2500 3000 3500 4000

Frequency (Hz)

Gain (dBm )

500 1K 1.5K 2K

2.5K 3K 3.5K 4K

-2.5

-5

-7.5

-10

-12.5

-15

-17.5

-20

-22.5

-25

-27.5

-30

-32.5

-35

-37.5

-40

-42.5

-45

-47.5

-50

-52.5

-55

-57.5

-60

CMRR

(dBm)

5020 100 200 500 1K 2K 4K

Frequency (Hz)

CPC5610/CPC5611

Rev. 9.0 www.clare.com 17

7. Manufacturing Information

7.1 Mechanical Dimensions

Figure 17. Dimensions

Figure 18. Recommended Printed Circuit Board Layout

10.287 + .254

(0.405 + 0.010)

7.493 + 0.127

(0.295 + 0.005) 10.363 + 0.127

(0.408 + 0.005)

4° Max.

32 PL

7.239 + 0.051

(0.285 + 0.002)

0.203

(0.008)

1.016 Typ.

(0.040 Typ.)

0.635 x 45°

(0.025 x 45°)

0.635 + 0.076

(0.025 + 0.003)

0.330 + 0.051

(0.013 + 0.002)

9.525 + 0.076

(0.375 + 0.003)

2.134 Max.

(0.084 Max.) 1.981 + 0.051

(0.078 + 0.002)

0.051 + 0.051

(0.002 + 0.002)

Coplanar to A 0.08/(0.003) 32 PL.

DIMENSIONS

(Inches)

11.380

(0.448)

1.650

(0.065)

9.730

(0.383)

0.330

(0.013)

0.635

(0.025)

7.2 Tape and Reel Packaging

Figure 19. Tape and Reel Dimensions

7.3 Soldering

7.3.1 Moisture Reflow Sensitivity

Clare has characterized the moist ure reflow sensitivity

of LITELINK using IPC/JEDEC standar d J-STD-020A.

Moisture uptake from atmosphe ric humidity occurs by

diffusion. During the solder reflow process, in which

the component is attached to the PCB, the whole body

of the component is exposed to high process temper a-

tures. The combination of moist ure upt ake and high

reflow soldering temper atu res may lead to moisture

induced delamination and crac king of the component.

To prevent this, this component must be handled in

accordance with IPC/JEDEC standard J-STD-020A

per the labeled moisture sensitivity le vel (MSL), le vel

7.3.2 Reflow Profile

The maximum ramp rates, dwell times, and tempera-

tures of the assemb ly reflo w profile should n ot e xceed

those specified in IPC/JEDEC standard J-STD-020A,

which were used to determine the moisture sensitivity

le vel of this component.

7.4 Washing

Clare does not recommend ultrasonic cleaning of this

part.

Dimensions

(inches)

330.2 DIA.

(13.00)

Top Cover

Tape Thickness

.102 MAX.

(.004)

12.090

(.476)

Embossed Carrier

Embossment

6.731 MAX.

(.265)

.406 MAX.

(.016)

Top Cover

Tape

3.20

(.126)

2.70

(.106)

7.493 ± .102

(.295 ± .004)

1.753 ± .102

(.069 ± .004)

2.007 ± .102

(.079 ± .004)

1.498 ±.102

(.059 ± .004)

3.987 ± .102

(.157 ±.004)

Feed Direction

11.989 ± .102

(.472 ± .004) 10.897 ± .025

(.429 ± .001) 1.549 ± .102

(.061 ± .004)

10.693 ± .025

(.421 ± .001)

16.002 ± .305

(.630 ± .012)

.050R TYP.

For additional information please visit www.clare.com

Clare, Inc. makes no representations or warran ties with respect to the accuracy or completeness of the contents of this publication and reserves the right to make

changes to specifications and product descriptions at any time without notice. Neither circuit patent licenses or indemnity are expressed or implie d. Except as set

forth in Clare’s Standard Terms and Conditions of Sale, Clare, Inc. assumes no liability whatsoever, and disclaims any express or implied warranty relating to its

products, including, but not limited to, the implied warranty of merchantability, fitness for a par ticular purpose, or infringement of any intellectual property right.

The products described in this document are not designed, intended, authorized, or warranted for use as components in systems intended for surgical implant into

the body, or in other applications intended to support or sustain life, or where malfunction of Clare’s product may result in direct physical harm, injury, or death to a

person or severe property or environmental damage. Clare, Inc. reserves the right to discontinue or make changes to its products at any time without notice.

Specification: DS-CPC5610/CPC5611-R9.0

6/27/2002