© 1998,1999
MOS FIELD EFFECT TRANSISTOR
2SK3225
SWITCHING
N-CHANNEL POWER MOS FET
INDUSTRIAL USE
DATA SHEET
Document No. D13798EJ1V0DS00 (1st edition)
Date Published May 1999 NS CP(K)
Printed in Japan
The information in this document is subject to change without notice. Before using this document, please
confirm that this is the latest version.
Not all devices/types available in every country. Please check with local NEC representative for
availability and additional information.
DESCRIPTION
This product is N-Channel MOS Field Effect Transistor
designed for high current switching applications.
FEATURES
Low On-State Resistance
RDS(on)1 = 18 m MAX. (VGS = 10 V, ID = 17 A)
RDS(on)2 = 27 m MAX. (VGS = 4.0 V, ID = 17 A)
Low Ciss : Ciss = 2100 pF TYP.
Built-in Gate Protection Diode
TO-251/TO-252 package
ABSOLUTE MAXIMUM RATINGS (TA = 25 °C)
Drain to Source Voltage VDSS 60 V
Gate to Source Voltage VGSS(AC) ±20 V
Gate to Source Voltage VGSS(DC) +20, 10 V
Drain Current (DC) ID(DC) ±34 A
Drain Current (Pulse) Note ID(pulse) ±136 A
Total Power Dissipation (TC = 25°C) PT40 W
Total Power Dissipation (TA = 25°C) PT2.0 W
Channel Temperature Tch 150 °C
Storage Temperature Tstg –55 to +150 °C
Note PW 10
µ
s, Duty cycle 1 %
THERMAL RESISTANCE
Channel to Case Rth(ch-C) 3.13 °C/W
Channel to Ambient Rth(ch-A) 125 °C/W
ORDERING INFORMATION
PART NUMBER PACKAGE
2SK3225 TO-251
2SK3225-Z TO-252
Data Sheet D13798EJ1V0DS00
2
2SK3225
ELECTRICAL CHARACTERISTICS (TA = 25 °C)
CHARACTERISTICS SYMBOL TEST CONDITIONS MIN. TYP. MAX. UNIT
Drain to Sourc e On-state Resist ance RDS(on)1 VGS = 10 V, ID = 17 A 13 18 m
RDS(on)2 VGS = 4.0 V, I D = 17 A 18 27 m
Gate to Source Cut-off Voltage VGS(off) VDS = 10 V, ID = 1 mA 1.0 1.5 2.0 V
Forward Transfer Adm i ttance | yfs |V
DS = 10 V, ID = 17 A 13 27 S
Drain Leakage Current IDSS VDS = 60 V, V GS = 0 V 10
µ
A
Gate to Source Leakage Current IGSS VGS = ±20 V, VDS = 0 V ±10
µ
A
Input Capaci tance Ciss VDS = 10 V 2100 pF
Output Capaci tance Coss VGS = 0 V 550 pF
Reverse Transf er Capac i tance Crss f = 1 MHz 220 pF
Turn-on Delay Time td(on) ID = 17 A 32 ns
Rise Time trVGS(on) = 10 V 300 ns
Turn-off Del ay T ime td(off) VDD = 30 V 110 ns
Fall Time tfRG = 10 140 ns
Total Gate Charge QGID = 34 A 45 nC
Gate to Source Charge QGS VDD = 48 V 7 nC
Gate to Drain Charge QGD VGS(on) = 10 V 13 nC
Body Diode Forward Voltage VF(S-D) IF = 34 A, VGS = 0 V 0.94 V
Reverse Recovery Time trr If = 34 A, VGS = 0 V 60 ns
Reverse Recovery Charge Qrr di/dt = 100 A /
µ
s95nC
TEST CIRCUIT 3 GATE CHARGE
V
GS
= 20
0
V
PG.
R
G
= 25
50
D.U.T. L
V
DD
TEST CIRCUIT 1 AVALANCHE CAPABILITY
PG. R
G
= 10
D.U.T. R
L
V
DD
TEST CIRCUIT 2 SWITCHING TIME
R
G
PG.
I
G
= 2 mA
50
D.U.T. R
L
V
DD
I
D
V
DD
I
AS
V
DS
BV
DSS
Starting T
ch
V
GS
0
τ = 1 µs
Duty Cycle 1 %
τ
V
GS
Wave Form
I
D
Wave Form
V
GS
I
D
10
%
0
0
90
%
90
%
90
%
V
GS(on)
I
D
t
on
t
off
t
d(on)
t
r
t
d(off)
t
f
10
%10
%
Data Sheet D13798EJ1V0DS00 3
2SK3225
PACKAGE DRAWINGS (Unit : mm)
1)TO-251 (MP-3) 2)TO-252 (MP-3Z)
EQUIVALENT CIRCUIT
Drain
Source
Gate
Gate Protection
Diode
Body
Diode
Remark The diode connected between the gate and source of the transistor serves as a protector against ESD.
When this device actually used, an additional protection circuit is externally required if a voltage
exceeding the rated voltage may be applied to this device.
1.Gate
2.Drain
3.Source
4.Fin (Drain)
213
6.5±0.2
5.0±0.2
4
1.5-
0.1
+0.2
5.5±0.27.0 MAX.
13.7 MIN.
2.32.3
0.75
0.5±0.1
2.3±0.2
1.6±0.2
1.1±0.2
0.5-
0.1
+0.2
0.5-
0.1
+0.2
1. Gate
2. Drain
3. Source
4. Fin (Drain)
123
4
6.5±0.2
5.0±0.2
4.3 MAX.0.8
2.3 2.3 0.9
MAX.
5.5±0.2
10.0 MAX.
2.0
MIN.
1.5-
0.1
+0.2
2.3±0.2
0.5±0.1
0.8
MAX.
0.8
1.0 MIN.
1.8TYP.
0.7
1.1±0.2
2SK3225
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confirm that this is the latest version.
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M7 98. 8