1. Product profile
1.1 General description
Dual N-channel enhancement mode Field-Effect Transistor (FET) in an ultra small
SOT666 Surface-Mounted Device (SMD) plastic package using Trench MOSFET
technology.
1.2 Features and benefits
Logic-level compatible
Very fast switching
Trench MOSFET technology
ESD protection up to 2 kV
AEC-Q101 qualified
1.3 Applications
Relay driver
High-speed line driver
Low-side loadswitch
Switching circuits
1.4 Quick reference data
[1] Device mounted on an FR4 PCB, single-sided copper, tin-plated, mounting pad for drain 1 cm2.
2N7002BKV
60 V, 340 mA dual N-channel Trench MOSFET
Rev. 2 — 22 September 2010 Product data sheet
Table 1. Quick reference data
Symbol Parameter Conditions Min Typ Max Unit
VDS drain-source voltage Tamb =25°C--60V
VGS gate-source voltage Tamb =25°C--±20 V
IDdrain current Tamb =25°C;
VGS =10V [1] --340mA
RDSon drain - so urce on-st a te
resistance Tj=25°C;
VGS =10V;
ID= 500 mA
-11.6Ω
2N7002BKV All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved.
Product data sheet Rev. 2 — 22 September 2010 2 of 16
NXP Semiconductors 2N7002BKV
60 V, 340 mA dual N-channel Trench MOSFET
2. Pinning information
3. Ordering information
4. Marking
5. Limiting values
Table 2. Pinning
Pin Symbol Description Simplified outline Graphic symbol
1S1source1
2 G1 gate 1
3D2drain2
4S2source2
5 G2 gate 2
6D1drain1 123
456
017aaa05
5
6
5
4
1
2
3
Table 3. Ordering i nformation
Type number Package
Name Description Version
2N7002BKV - plastic surface-mounted package; 6 leads SOT666
Table 4. Marking codes
Type number Marking code
2N7002BKV ZG
Table 5. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol Parameter Conditions Min Max Unit
Per transis tor
VDS drain-source voltage Tamb =25°C-60V
VGS gate-source voltage Tamb =25°C-±20 V
IDdrain current VGS =10V [1]
Tamb =25°C-340mA
Tamb =100°C-240mA
IDM peak drain current Tamb =25°C;
single pulse; tp10 μs-1.2A
2N7002BKV All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved.
Product data sheet Rev. 2 — 22 September 2010 3 of 16
NXP Semiconductors 2N7002BKV
60 V, 340 mA dual N-channel Trench MOSFET
[1] Device mounted on an FR4 PCB, single-sided copper, tin-plated, mounting pad for drain 1 cm2.
[2] Device mounted on an FR4 Printed-Circuit Board (PCB), single-sided copper, tin-plated and standard
footprint.
[3] Measured between all pins.
Ptot total power dissipation Tamb =25°C[2] -350mW
[1] -410mW
Tsp =25°C - 1140 mW
Source-drain diode
ISsource current Tamb =25°C[1] -340mA
ESD maximum rating
VESD electrostatic discharge
voltage human body model [3] - 2000 V
Per device
Ptot total power dissipation Tamb =25°C[2] -525mW
Tjjunction temperature 150 °C
Tamb ambient temperature 55 +150 °C
Tstg storage temperature 65 +150 °C
Table 5. Limiting values …continued
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol Parameter Conditions Min Max Unit
Fig 1. Normalized total power dissipation as a
function of ambient temperature Fig 2. Normalized continuous drain current as a
function of ambient temperature
Tamb (°C)
75 17512525 7525
017aaa001
40
80
120
Pder
(%)
0
Tamb (°C)
75 17512525 7525
017aaa002
40
80
120
Ider
(%)
0
Pder Ptot
Ptot 25°C()
------------------------100 %×=Ider ID
ID25°C()
--------------------100 %×=
2N7002BKV All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved.
Product data sheet Rev. 2 — 22 September 2010 4 of 16
NXP Semiconductors 2N7002BKV
60 V, 340 mA dual N-channel Trench MOSFET
6. Thermal characteristics
[1] Device mounted on an FR4 PCB, single-sided copper, tin-plated and standard footprint.
[2] Device mounted on an FR4 PCB, single-sided copper, tin-plated, mounting pad for drain 1 cm2.
IDM = single pulse
(1) tp= 100 μs
(2) tp=1ms
(3) tp=10ms
(4) DC; Tsp =25°C
(5) tp= 100 ms
(6) DC; Tamb =25°C; drain mounting pad 1 cm2
Fig 3. Safe operating area ; junc tion to ambient; continuous and peak drain currents as a function of
drain-source voltage
017aaa059
101
102
1
10
ID
(A)
103
VDS (V)
101102
101
(1)
(2)
(3)
(4)
(5)
(6)
Limit RDSon = VDS/ID
Table 6. Thermal characteristics
Symbol Parameter Conditions Min Typ Max Unit
Per transis tor
Rth(j-a) thermal resistance from
junction to ambient in free air [1] - 315 360 K/W
[2] - 265 305 K/W
Rth(j-sp) thermal resistance from
junction to solder point --110K/W
Per device
Rth(j-a) thermal resistance from
junction to ambient in free air [1] - - 240 K/W
2N7002BKV All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved.
Product data sheet Rev. 2 — 22 September 2010 5 of 16
NXP Semiconductors 2N7002BKV
60 V, 340 mA dual N-channel Trench MOSFET
FR4 PCB, standard footprint
Fig 4. Transient thermal impedance from junc tio n to ambient as a function of pulse du ration; typical values
FR4 PCB, mounting pad for drain 1 cm2
Fig 5. Transient thermal impedance from junc tio n to ambient as a function of pulse du ration; typical values
017aaa060
tp (s)
103102103
101102101
102
10
103
Zth(j-a)
(K/W)
1
duty cycle = 1
0.75
0.5 0.33
0.25 0.2
0.1 0.05
0.02
0.01
0
017aaa061
tp (s)
103102103
101102101
102
10
103
Zth(j-a)
(K/W)
1
duty cycle = 1
0.75
0.5 0.33
0.25 0.2
0.1
0.05
0.02
0.01
0
2N7002BKV All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved.
Product data sheet Rev. 2 — 22 September 2010 6 of 16
NXP Semiconductors 2N7002BKV
60 V, 340 mA dual N-channel Trench MOSFET
7. Characteristics
[1] Pulse test: tp300 μs; δ≤0.01.
Table 7. Characteristics
Tj=25
°
C unless otherwise specified.
Symbol Parameter Conditions Min Typ Max Unit
Sta tic chara cteristics
V(BR)DSS drain-source breakdown
voltage ID=10μA; VGS =0V 60--V
VGS(th) gate-source threshold
voltage ID=250μA; VDS =V
GS 1.1 1.6 2.1 V
IDSS drain leakage current VDS =60V; V
GS =0V
Tj=25°C --1μA
Tj= 150 °C --10μA
IGSS gate leakage current VGS =±20 V; VDS =0V--10μA
RDSon drain-source on-state
resistance [1]
VGS =5V; I
D=50mA - 1.3 2 Ω
VGS =10V; I
D=500mA - 1 1.6 Ω
gfs forward
transconductance VDS =10V; I
D= 200 mA [1] - 550 - mS
Dynamic characteristics
QG(tot) total gate charge ID=300mA;
VDS =30V;
VGS =4.5V
-0.50.6nC
QGS gate-source charge - 0.2 - nC
QGD gate-drain charge - 0.1 - nC
Ciss input capacitance VGS =0V; V
DS =10V;
f=1MHz - 3350pF
Coss output capacitance - 7 - pF
Crss reverse transfer
capacitance -4-pF
td(on) turn-on delay time VDD =50V;
RL=250Ω;
VGS =10V;
RG=6Ω
- 5 10 ns
trrise time -6-ns
td(off) turn-off delay time - 12 24 ns
tffall time - 7 - ns
Source-drain diode
VSD source-drain voltage IS=115mA; V
GS = 0 V 0.47 0.75 1.1 V
2N7002BKV All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved.
Product data sheet Rev. 2 — 22 September 2010 7 of 16
NXP Semiconductors 2N7002BKV
60 V, 340 mA dual N-channel Trench MOSFET
Tamb =25°CT
amb =25°C; VDS =5V
(1) minimum values
(2) typical values
(3) maximum values
Fig 6. Output cha racteristics: drain current as a
function of drain-source voltage; typical
values
Fig 7. Sub-threshold drain current as a function of
gate-source voltage
Tamb =25°C
(1) VGS =3.25V
(2) VGS =3.5V
(3) VGS =4V
(4) VGS =5V
(5) VGS =10V
ID=500mA
(1) Tamb = 150 °C
(2) Tamb =25°C
Fig 8. Drain-source on-state resistance as a function
of drain current; typical values Fig 9. Drain-source on-state resistance as a function
of gate-source voltage; typical values
VDS (V)
0.0 4.03.01.0 2.0
017aaa039
0.4
0.5
0.3
0.2
0.1
0.6
0.7
ID
(A)
0.0
3.5 V
VGS = 4.0 V
3.0 V
2.75 V
2.5 V
3.25 V
017aaa040
VGS (V)
0.0 3.02.01.0
104
105
103
ID
(A)
106
(2)(1) (3)
ID (A)
0.0 1.00.80.4 0.60.2
017aaa041
2.0
4.0
6.0
RDSon
(Ω)
0.0
(1)
(2)
(3)
(4)
(5)
VGS (V)
0.0 10.08.04.0 6.02.0
017aaa042
2.0
4.0
6.0
RDSon
(Ω)
0.0
(1)
(2)
2N7002BKV All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved.
Product data sheet Rev. 2 — 22 September 2010 8 of 16
NXP Semiconductors 2N7002BKV
60 V, 340 mA dual N-channel Trench MOSFET
VDS >I
D×RDSon
(1) Tamb =25°C
(2) Tamb = 150 °C
Fig 10. Transfer characteristics: drain current as a
function of gate-source voltage; typical values Fig 11. Normalized drain-so urc e on -state resistance
as a function of ambient temperature; typical
values
ID= 0.25 mA; VDS =V
GS
(1) maximum values
(2) typical values
(3) minimum values
f=1MHz; V
GS =0V
(1) Ciss
(2) Coss
(3) Crss
Fig 12. Gate-source threshold voltage as a function of
ambient temperature Fig 13. Input, output and rever se transfer
capacitances as a function of drain-source
voltage; typical values
VGS (V)
0.0 5.04.02.0 3.01.0
017aaa043
0.4
0.6
0.2
0.8
1.0
ID
(A)
0.0
(1) (2)
Tamb (°C)
60 180120060
017aaa044
1.2
0.6
1.8
2.4
a
0.0
aRDSon
RDSon 25°C()
-----------------------------
=
Tamb (°C)
60 180120060
017aaa045
1.0
2.0
3.0
VGS(th)
(V)
0.0
(2)
(1)
(3)
017aaa046
VDS (V)
101102
101
10
102
C
(pF)
1
(2)
(1)
(3)
2N7002BKV All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved.
Product data sheet Rev. 2 — 22 September 2010 9 of 16
NXP Semiconductors 2N7002BKV
60 V, 340 mA dual N-channel Trench MOSFET
ID= 300 mA; VDD =6V; T
amb =25°C
Fig 14. Gate-source voltage as a function of gate
charge; typical va lues Fig 15. Gate charge waveform definitions
VGS =0V
(1) Tamb = 150 °C
(2) Tamb =25°C
Fig 16. Source current as a function of so urce-drain voltage; typical values
QG (nC)
0.0 0.80.60.2 0.4
017aaa047
2.0
3.0
1.0
4.0
5.0
VGS
(V)
0.0
003aaa50
8
VGS
VGS(th)
QGS1 QGS2
QGD
VDS
QG(tot)
ID
QGS
VGS(pl)
VSD (V)
0.0 1.20.80.4
017aaa048
0.4
0.8
1.2
IS
(A)
0.0
(1) (2)
2N7002BKV All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved.
Product data sheet Rev. 2 — 22 September 2010 10 of 16
NXP Semiconductors 2N7002BKV
60 V, 340 mA dual N-channel Trench MOSFET
8. Test information
Fig 17. Duty cycle definition
t
1
t
2
P
t
006aaa812
duty cycle δ =
t
1
t
2
2N7002BKV All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved.
Product data sheet Rev. 2 — 22 September 2010 11 of 16
NXP Semiconductors 2N7002BKV
60 V, 340 mA dual N-channel Trench MOSFET
9. Package outline
Fig 18. Package outline SOT666
UNIT bpcDE e1HELpw
REFERENCES
OUTLINE
VERSION EUROPEAN
PROJECTION ISSUE DATE
04-11-08
06-03-16
IEC JEDEC JEITA
mm 0.27
0.17
0.18
0.08
1.7
1.5
1.3
1.1 0.5
e
1.0 1.7
1.5 0.1
y
0.1
DIMENSIONS (mm are the original dimensions)
0.3
0.1
SOT666
bp
pin 1 index
D
e1
e
A
Lp
detail X
HE
E
A
S
0 1 2 mm
scale
A
0.6
0.5
c
X
123
456
Plastic surface-mounted package; 6 leads SOT66
6
YS
wMA
2N7002BKV All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved.
Product data sheet Rev. 2 — 22 September 2010 12 of 16
NXP Semiconductors 2N7002BKV
60 V, 340 mA dual N-channel Trench MOSFET
10. Soldering
Reflow soldering is the only recommended soldering method.
Fig 19. Reflow soldering footprint SOT666
solder lands
placement area
occupied area
solder paste
sot666_
fr
2.75
2.45
2.1
1.6
0.4
(6×)
0.55
(2×)
0.25
(2×)
0.6
(2×)
0.65
(2×)
0.3
(2×)
0.325
(4×)
0.45
(4×)
0.5
(4×)
0.375
(4×)
1.72
1.7
1.075
0.538
Dimensions in mm
2N7002BKV All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved.
Product data sheet Rev. 2 — 22 September 2010 13 of 16
NXP Semiconductors 2N7002BKV
60 V, 340 mA dual N-channel Trench MOSFET
11. Revision history
Table 8. Revision history
Document ID Release date Data sheet status Change notice Supersedes
2N7002BKV v.2 20100922 Product data sheet - 2N7002BKV v.1
Modifications: Table 2 “Pinning: graphic symbol amen ded
Table 6 “Thermal characteristics: typo for Rth(j-sp) maximum value per transistor amended
Table 6 “Thermal characteristics: typo for Rth(j-a) maximum value per device amended
2N7002BKV v.1 20100610 Product data sheet - -
2N7002BKV All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved.
Product data sheet Rev. 2 — 22 September 2010 14 of 16
NXP Semiconductors 2N7002BKV
60 V, 340 mA dual N-channel Trench MOSFET
12. Legal information
12.1 Data sheet status
[1] Please consult the most recently issued document before initiating or completing a design.
[2] The term ‘short data sheet’ is explained in section “Definitions”.
[3] The product status of de vice(s) descr ibed in th is document m ay have cha nged since thi s document w as publish ed and may di ffe r in case of multiple devices. The latest product status
information is available on the Internet at URL http://www.nxp.com.
12.2 Definitions
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. NXP Semiconductors does not give any
representations or warranties as to the accuracy or completeness of
information included herein and shall have no liab ility for the consequences of
use of such information.
Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and tit le. A short data sh eet is intended
for quick reference only and shou ld not b e relied u pon to cont ain det ailed and
full information. For detailed and full information see the relevant full data
sheet, which is available on request via the local NXP Semicond uctors sales
office. In case of any inconsistency or conflict with the short data sheet, the
full data sheet shall pre va il.
Product specificat ionThe information and data provided in a Product
data sheet shall define the specification of the product as agreed between
NXP Semiconductors and its customer, unless NXP Semiconductors and
customer have explicitly agreed otherwise in writing. In no event however,
shall an agreement be valid in which the NXP Semiconductors product is
deemed to off er functions and qualities beyond those described in the
Product data sheet.
12.3 Disclaimers
Limited warr a nty and liability — Information in this document is believed to
be accurate and reliable. However, NXP Semiconductors does not give any
representations or warrant ies, expressed or implied, as to the accuracy or
completeness of such information and shall have no liability for the
consequences of use of such information.
In no event shall NXP Semiconductors be liable for any indire ct, incidental,
punitive, special or consequ ential damages (including - wit hout limitation - lost
profits, lost savings, business interruption, costs related to the removal or
replacement of any products or rework charges) whether or not such
damages are based on tort (including negligence), warranty, breach of
contract or any other legal theory.
Notwithstanding any damages that customer might incur for any reason
whatsoever, NXP Semiconductors’ aggreg ate and cumulative l iability towards
customer for the products described herein shall be limited in accordance
with the Terms and conditions of commercial sale of NXP Semiconductors.
Right to make changes — NXP Semiconductors reserves the right to make
changes to information published in this document, including without
limitation specifications and product descripti ons, at any time and without
notice. This document supersedes and replaces all informa tion supplied prior
to the publication hereof .
Suitability for use — NXP Semiconductors products are not designed,
authorized or warranted to be suit able for use in life support, life-crit ical or
safety-critical systems or equipment, nor in applications where failure or
malfunction of an NXP Semiconductors product can reasonably be expected
to result in perso nal injury, death or severe property or environmental
damage. NXP Semiconductors accepts no liab ility for inclusion and/or use of
NXP Semiconductors products in such equipment or applications and
therefore such inclusion and/or use is at the customer’s own risk.
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. NXP Semiconductors makes no
representation or warranty that such applications will be suitable for the
specified use without further testing or modification.
Customers are responsible for the design and ope ration of their applications
and products using NXP Semiconductors product s, and NXP Semiconductors
accepts no liability for any assistance with applications or customer product
design. It is customer’s sole responsibility to determine whether the NXP
Semiconductors product is suit able and fit for the custome r’s applications and
products planned, as well as fo r the planned application and use of
customer’s third party customer(s). Custo mers should provide appropriate
design and operating safeguards to minimize the risks associate d with their
applications and products.
NXP Semiconductors does not accept any liabil i ty related to any default,
damage, costs or problem which is based on any weakness or default in the
customer’s applications or products, or the appl ication or use by customer’s
third party custo m er(s). Customer is responsible for doing all necessa ry
testing for the customer’s applications and products using NXP
Semiconductors products in order to avoid a default of the applications and
the products or of the application or use by customer’s third party
customer(s). NXP does not accept any liability in this respect.
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) will cause permanent
damage to the device. Limiting values are stress rating s only and (proper)
operation of the device at these or any other conditions above those given in
the Recommended operating conditions section (if present) or the
Characteristics sections of this document is not warranted. Constant or
repeated exposure to limiting values will permanently and irreversibly affect
the quality and reliability of the device.
Terms and conditions of commercial sale — NXP Semiconductors
products are sold subject to the general terms and conditions of commercial
sale, as published at http://www.nxp.com/profile/terms, unless otherwise
agreed in a valid written individua l agreement. In case an individual
agreement is concluded only the ter m s and conditions of the respective
agreement shall apply. NXP Semiconductors hereby expressly objects to
applying the customer’s general terms and conditions with regard to the
purchase of NXP Semiconductors products by customer.
No offer to sell or license — Nothing i n this document may be interpreted or
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conveyance or implication of any license under any copyrights, patents or
other industrial or inte llectual property right s.
Export control — This document as well as the item(s) described herein
may be subject to export control regulatio ns. Export might require a prior
authorization from national authorities.
Document status[1][2] Product status[3] Definition
Objective [short] data sheet Development This document contain s data from the objective specification for product development.
Preliminary [short] dat a sheet Qualification This document contains data from the preliminary specificat ion.
Product [short] data sheet Production This document contains the product specification.
2N7002BKV All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved.
Product data sheet Rev. 2 — 22 September 2010 15 of 16
NXP Semiconductors 2N7002BKV
60 V, 340 mA dual N-channel Trench MOSFET
Quick reference data The Quick reference data is an extract of the
product data given in the Limiting values and Characteristics sections of this
document, and as such is not complete, exhaustive or legally binding.
12.4 Trademarks
Notice: All referenced b rands, produc t names, service names and trademarks
are the property of their respective ow ners.
13. Contact information
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
NXP Semiconductors 2N7002BKV
60 V, 340 mA dual N-channel Trench MOSFET
© NXP B.V. 2010. All rights reserved.
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
Date of release: 22 September 2010
Document identifier: 2N7002BKV
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section ‘Legal information’.
14. Contents
1 Product profile. . . . . . . . . . . . . . . . . . . . . . . . . . 1
1.1 General description . . . . . . . . . . . . . . . . . . . . . 1
1.2 Features and benefits. . . . . . . . . . . . . . . . . . . . 1
1.3 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
1.4 Quick reference data . . . . . . . . . . . . . . . . . . . . 1
2 Pinning information. . . . . . . . . . . . . . . . . . . . . . 2
3 Ordering information. . . . . . . . . . . . . . . . . . . . . 2
4 Marking. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
5 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 2
6 Thermal characteristics . . . . . . . . . . . . . . . . . . 4
7 Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . 6
8 Test information. . . . . . . . . . . . . . . . . . . . . . . . 10
9 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 11
10 Soldering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
11 Revision history. . . . . . . . . . . . . . . . . . . . . . . . 13
12 Legal information. . . . . . . . . . . . . . . . . . . . . . . 14
12.1 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 14
12.2 Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
12.3 Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . 14
12.4 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 15
13 Contact information. . . . . . . . . . . . . . . . . . . . . 15
14 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16