Logic-Level Power MOSFETs RFD14NO05L, RFD14NO05LSM, RFP14N05L File Number 2246 N-Channel Logic-Level Enhancement-Mode Power Field-Effect Transistors (MegaFETs) 14A,50V ros(on): 0.10 Features N-CHANNEL ENHANCEMENT MODE = Design optimized for 5-volt gate drive D = Can be driven directly from QMOS, NMOS, TTL circuits = Compatible with automotive drive requirements = SOA is power-dissipation limited S = Nanosecond switching speeds = Linear transfer characteristics High input impedance s = Majority carrier device 92s-42658 The RFD14NOSL, RFD14NOSLSM, and RFP14NOS5L n-chan- TERMINAL DIAGRAM nei logic-level power MOSFETs are manufacfured using the MegaFET process. This process, which uses feature sizes approaching those of LSI integrated circuits gives optimum . utilization of silicon, resulting in outstanding performance. TERMINAL DESIGNATION They were designed for use with logic-leve! (5 volt) driving sources in applications such as programmable controllers, automotive switching, switching regulators, switching con- a) verters, motor-relay drivers and emitter switches for bipolar transistors. This performance is accomplished through a DRAIN + brain special gate-oxide design which provides fully rated con- ductance at gate biases in the 3-5 volt range, thereby facili- => tating true on-off power control directiy from logic circuit i supply voltages. TOP view 7 GATE The RFD14NO5L is supplied in the JEDEC TO-251 plastic JEDEC TO-251AA package and the RFD14NO5LSM is supplied in the JEDEC r SOURCE TO-252 surface-mount plastic package. The RFP14NO05L is , i supplied in the JEDEC TO-220AB plastic package. SOURCE TERMINAL DESIGNATION ie DRAIN Cn DRAIN __ a SSS SSS 7 (FLANGE} OC DRAIN tL TOP view GATE ___ JEDEC TO-252AA TOP VIEW GATE 92cs- 43478 JEDEC TO-220AB MAXIMUM RATINGS, Absolute-Maximum Values (Tc=25 C): DRAIN-SOURCE VOLTAGE, Vogs ...-..... 002 c cece eee cece eee e ee eben eee e cnet tenet en ee sete t estar enaeeneenueneeresnus DRAIN-GATE VOLTAGE, Rye=1 MQ, Voor .. GATE-SOURCE VOLTAGE, Vas ...........5 DRAIN CURRENT: RMS Continuous, Ip... 6.6 ccc cee en eee ee nee ne ONE n ERE EE DEED EEE ED ERE ESSE ERE EEE FEES abe OE o EERO REED SES Pulsed, lomo... sce eee e reece tenet eneene AVALANCHE CURRENT, las POWER DISSIPATION, Pr: Ta Scat OCR 40W 5-30 Logic-Level Power MOSFETs RFD14NO05L, RFD14NO5LSM, RFP14N05L ELECTRICAL CHARACTERISTICS, At Case Temperature (Tc) = 25C Unless Otherwise Specified. LIMITS CHARACTERISTIC TEST CONDITIONS MIN. MAX. UNITS Drain-Source Breakdown Voltage BVoss lo = 0.25 MA, Vas = 0 V 50 _ Vv Gate-Threshold Voltage Ves(th) Ves = Vos, lp = 0.25 MA 1 2 Zero-Gate Voltage Drain Current loss Vos eos ov = = HA Gate-Source Leakage Current lass Vas = 10 V, Vos = 0 V am 100 nA : . . Ip = 14.A, Ves = 5 V _ 0.1 Static Drain-Source On-Resistance fos(on) lo= 14A, Vas=4V _ 0.12 nQ Turn-On Time t(on) Voo=25V,lb=7A _ 60 Turn-On Delay Time ta(on) lor = bgp =O.4A _ 13 (typ.) Rise Time t Vas(clamp) +5 V, -0.6 V _ 24 (typ.) ns Turn-Off Delay Time ta(off) Ri = 3.570 _ 42 (typ.) Fall Time tr (See Figs. 10 & 11) 16 (typ.) Turn-Off Time t(off) _ 100 Total Gate Charge Q,(total) Voo = 40 V Vas = 0-10 V _ 40 Gate Charge at 5 V Q,(5) lp =14A Ves = 0-5 V - 25 nc Threshold Gate Charge Q,(th) Ri = 2.869 Ves = 0-1 V _ 1.5 Plateau Voltage V(plateau) lo = 14 A, Vos = 15 V _ 4 Vv Voo = 25 V, lo= 7 A, L = 0.2 wH, Turn-Off Energy Loss Per Cycle Eott Ri = 3.57 Q, Ioi = Ig2 = 0.2 A, _ 14 ws Ves(clamp) +5 V, -0.6 V Thermal Resistance, Junction-to-Case Rasc = 3.125 Thermal Resistance, Junction-to-Ambient Rgua TO a 282 ~ cw SOURCE-DRAIN DIODE RATINGS AND CHARACTERISTICS . LIMITS CHARACTERISTIC TEST CONDITIONS MIN. MAX. UNITS Diode Forward Voltage Vsp Isp = 14A _ 1.5 Vv Reverse Recovery Time tr lp = 14. A, ditr/d, = 100 A/us _ 125 ns CASE TEMPERATURE AREA 1S BY Rds(on) DRAIN CURRENT(d)-A ORAIN-TO-SQUACE VOLTAGE WVds)-V SOAGEXI4NOSLCFS Fig. 1 - Safe-operating-area curve. (Curves must be derated linearly with increase in case temperature.) 5-31 Logic-Level Power MOSFETs RFD14N05L, RFD14NO5LSM, RFP14NO05L DRAIN CURRENT 6d)-A POWER DISSIPATION MULTIPUIER 50 75 100 125 750 CASE TEMPERATURE (Tcl-degC CASE TEMPERATURE (TC}-degC IOGEX14NO5CFS POWGEXI4NOSLCFS: Fig. 2 - Maximum continuous drain current vs. temperature. Fig. 3 - Normalized power dissipation vs. temperature derating curve. ~5SdegC 25degC 180degC PULSE DURATION=80us Tc=25degC Vds=15V 1 yn = g = = g 4 2 3 b E a a 3 3 3 z 2 a a E < Z 4 4 DRAIN-TO-SOURCE VOLTAGE Vds)-V SATGEXI4NOSLCFS GATE-TO-SOURCE VOLTAGE (gs)-V VGSGEX'4NOSLCFS. Fig. 4 - Typical saturation characteristics. Fig. 5 - Typical transfer characteristics, Vde=16V, d=14A 2. Vgs=5V Id=14A 5 2.0) z 5 | o g : a sr 9 a N 5 Z = 10 <A x 8 $ fe 0.55 0 : =50 0 50 400 150 Vgs - VOLTS) JUNCTION TEMPERATURE (T)~degC NADSGEDI4CFE. ROSGEX{4NOSLCF5 Fig. 6 - Normalized ros(on) vs. Vos. Fig. 7 - Normalized ros(on) vs. junction temperature. 5-32 NORMALIZED GATE THRESHOLD VOLTAGE {Vgsith)) CAPACITANCE (C)~pt JUNCTION TEMPERATURE (Tj}-degC GTHGEXI4NOSLCF5: Fig. 8 - Gate threshold voltage vs. temperature. CRSS ciss coss FREQUENCY (f=1MHz SOQURCE-TO-DRAIN VOLTAGE WVsd)-V CAPGEXI4NOSLCFS: Fig. 10 - Typical capacitance vs. voltage. Logic-Level Power MOSFETs RFD14NO05L, RFD14NO05LSM, RFP14NO5L. Id=250uA NORMALIZED ORAIN-TO-SOURCE BREAKDOWN VOLTAGE Vdsa)-V JUNCTION TEMPERATURE (1))-degC BYDGEX14NOSLCF5 Fig. 9 - Drain source breakdown voltage vs. temperature. RL*3.570 Ig({REFI=.275 mA 5 Vpg VOLTS Veg VOLTS Vpss Voss 0.50 Voss Ig Timemicroseconos = "Te fact Fig. 11 - Normalized switching waveforms for constant gate current. (Refer to RCA application notes AN-7254 and AN7260.) 5-33 Logic-Level Power MOSFETs RFD14NO5L, RFD14NO05LSM, RFP14NO05L Yoo fon | Ru td(on) td (off) o} att ~ te 4 tf Vos 90% Vs 90% Tg, *1 10% &2 | DUT 10% a Tot GATE CURRENT 5 v~ Q 10% VW = Iga - SWITCHING TEST CIRCUIT SWITCHING WAVEFORMS 9208-42922 Fig. 12 - Resistive switching. VARY ty TO OBTAIN REQUIRED PEAK IL DUT e al 3 is < 3 | Lo XN < NS Vas = 5V | Fl te 0.012 9205-42659 9208-42660 Fig. 13 - Unclamped energy test circuit. Fig. 14 - Unclamped energy waveforms. 5-34