AS7C1028
AS7C1028L
2
Functional description
The AS7C1028 is a high performance CMOS 1,048,576-bit Static Random Access Memory (SRAM) organized as 262,144 words × 4 bits. It
is designed for memory applications where fast data access, low power, and simple interfacing are desired.
Equal address access and cycle times (tAA, tRC, tWC) of 12/15/20/25/35 ns with output enable access times (tOE) of 4/4/5/6/8 ns are ideal
for high performance applications. A chip enable (CE) input permits easy memory expansion with multiple-bank memory organizations.
When CE is HIGH the device enters standby mode. The standard AS7C1028 is guaranteed not to exceed 27.5 mW power consumption in
standby mode; the L version is guaranteed not to exceed 5.5 mW, and typically requires only 800 µW. The L version also offers 2.0V data
retention, with maximum power consumption in this mode of 600 µW.
A write cycle is accomplished by asserting chip enable (CE) and write enable (WE) LOW. Data on the input pins I/O0-I/O3 is written on
the rising edge of WE (write cycle 1) or CE (write cycle 2). To avoid bus contention, external devices should drive I/O pins only after
outputs have been disabled with output enable (OE) or write enable (WE).
A read cycle is accomplished by asserting chip enable (CE) and output enable (OE) LOW, with write enable (WE) HIGH. The chip drives
I/O pins with the data word referenced by the input address. When chip enable or output enable is HIGH, or write enable is LOW, output
drivers stay in high-impedance mode.
All chip inputs and outputs are TTL-compatible, and operation is from a single 5V supply. The AS7C1028 is packaged in high volume
industry standard packages.
Absolute maximum ratings
Stresses greater than those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only and functional operation
of the device at these or any other conditions outside those indicated in the operational sections of this specification is not implied. Exposure to absolute max-
imum rating conditions for extended periods may affect reliability.
Truth table
Key: X = Don’t Care, L = LOW, H = HIGH
Recommended operating conditions (Ta = 0°C to +70°C)
†VIL min = –3.0V for pulse width less than tRC/2
Parameter Symbol Min Max Unit
Voltage on any pin relative to GND Vt–0.5 +7.0 V
Power dissipation PD–1.0W
Storage temperature (plastic) Tstg –55 +150 oC
Temperature under bias Tbias –10 +85 oC
DC output current Iout –20mA
CE WE OE Data Mode
H X X High Z Standby (ISB, ISB1)
L H H High Z Output Disable
LHLD
out Read
LLXD
in Write
Parameter Symbol Min Typ Max Unit
Supply voltage VCC 4.5 5.0 5.5 V
GND 0.0 0.0 0.0 V
Input voltage VIH 2.2 – VCC+1 V
VIL –0.5†–0.8V