ADNB-7051-EV - Agilent / Hewlett-Packard

ADNB-7051-EV and ADNB-7052-EV

Low P o wer Laser Mouse Bundles

Data Sheet

Description

The Avago Technologies ADNB-7051-EV and ADNB-7052-EV low power

laser mouse bundles are the laser-illuminated system enabled for cordless

application. Powered by Avago Technologies LaserStream™ technology,

the mouse can operate on many surfaces that proved difficult for traditional

LED-based optical navigation. Its low power architecture is capable of sens-

ing mouse motion while prolonging battery life, two performance areas

essential in demanding cordless applications.

ADNB-7051-EV and ADNB-7052-EV Low Power Laser Mouse Bundles include:

Bundle Part

Number Part Number Description

ADNB-7051-EV ADNS-7050 Low Power Laser Mouse Sensor

ADNV-6340 Single-Mode Vertical-Cavity Surface

Emitting Laser (VCSEL)

ADNS-6120 Laser Mouse Round Lens

ADNS-6230-001 Laser Mouse VCSEL Assembly Clip

Bundle Part

Number Part Number Description

ADNB-7052-EV ADNS-7050 Low Power Laser Mouse Sensor

ADNV-6340 Single-Mode Vertical-Cavity Surface

Emitting Laser (VCSEL)

ADNS-6130-001 Laser Mouse Trim Lens

ADNS-6230-001 Laser Mouse VCSEL Assembly Clip

The ADNS-7050 sensor along with the ADNS-6120 or ADNS-6130-001 lens,

ADNS-6230-001 clip and ADNV-6340 VCSEL form a complete and compact

laser mouse tracking system. There is no moving part, which means high

reliability and less maintenance for the end user. In addition, precision opti-

cal alignment is not required, facilitating high volume assembly.

This document will begin with some general information and usage guide-

lines on the bundle set, followed by individual detailed information on

ADNS-7050 laser mouse sensor, ADNV-6340 VCSEL, ADNS-6120 or ADNS-

6130-001 lens and ADNS-6230-001 clip.

Overview of Laser Mouse Sensor Assembly

Figure 1. 2D Assembly drawing of ADNB-7052-EV (top and cross-sectional view).

A7050

XYYWWZ

16.00

(0.630)

31.17

(1.227)

BASE PLATE

SURFACE

CLIP

SENSOR

PCB

15.37

(0.605)

SURFACE TO

VCSEL BODY

20.49

(0.807)

TOP OF PCB TO

BOTTOM OF SENSOR

3.20

(0.126)

3.75

(0.148)

VCSEL PCB

TOP OF PCB TO TOP

OF LENS FLANGE

2.40

(0.094)

BOTTOM OF LENS

FLANGE TO SURFACE

2D Assembly Drawing of ADNB-7051/52-EV, PCBs and Base Plate

Figure 2. Exploded view drawing.

Shown with ADNS-6130-001 Laser Mouse Lens, ADNS-6230-001 VCSEL As-

sembly Clip and ADNV-6340 VCSEL. The components interlock as they are

mounted onto defined features on the base plate.

The ADNS-7050 laser mouse sensor is designed for mounting on a through

hole PCB, looking down. There is an aperture stop and features on the

package that align to the lens.

The ADNV-6340 VCSEL is recommended for illumination, provides a laser

diode with a single longitudinal and a single transverse mode. It is particu-

larly suited as lower power consumption and highly coherent replacement

of LEDs. It also provides wider operation range while still remaining within

single-mode, reliable operating conditions.

The ADNS-6120 or ADNS-6130-001 Laser Mouse Lens is designed for use

with ADNS-7050 sensor and the illumination subsystem provided by the

assembly clip and the VCSEL. Together with the VCSEL, the lens provides the

directed illumination and optical imaging necessary for proper operation of

the Laser Mouse Sensor. ADNS-6120 and ADNS-6130-001 are precision

molded optical components and should be handled with care to avoid

scratching of the optical surfaces. ADNS-6120 also has a large round flange

to provide a long creepage path for any ESD events that occur at the open-

ing of the base plate.

The ADNS-6230-001 VCSEL Assembly Clip is designed to provide mechanical

coupling of the ADNV-6340 VCSEL to the ADNS-6120 or ADNS-6130-001

lens. This coupling is essential to achieve the proper illumination alignment

required for the sensor to operate on a wide variety of surfaces.

Avago Technologies provides an IGES file drawing describing the base plate

molding features for lens and PCB alignment.

ADNS-6230-001 (CLIP)

ADNV-6340 (VCSEL)

CUSTOMER SUPPLIED VCSEL PCB

ADNS-7050 (SENSOR)

ADNS-6130-001 (LENS)*

* or ADNS-6120 FOR ROUND LENS

CUSTOMER SUPPLIED PCB

CUSTOMER SUPPLIED BASE PLATE

WITH RECOMMENDED FEATURES

PER IGES DRAWING

Figure 3. Recommended PCB mechanical cutouts and spacing.

9. Tune the laser output power from the VCSEL to meet the Eye Safe Class I

Standard as detailed in the LASER Power Adjustment Procedure.

10. Install the mouse top case. There must be a feature in the top case (or

other area) to press down onto the sensor to ensure the sensor and lens

are interlocked to the correct vertical height.

Assembly Recommendation

1. Insert the sensor and all other electrical components into the applica-

tion PCB (main PCB board and VCSEL PCB board).

2. Wave-solder the entire assembly in a no-wash solder process utilizing a

solder fixture. The solder fixture is needed to protect the sensor during

the solder process. It also sets the correct sensor-to -PCB distance, as

the lead shoulders do not normally rest on the PCB surface. The fixture

should be designed to expose the sensor leads to solder while shielding

the optical aperture from direct solder contact.

3. Place the lens onto the base plate.

4. Remove the protective kapton tape from the optical aperture of the

sensor. Care must be taken to keep contaminants from entering the

aperture.

5. Insert the PCB assembly over the lens onto the base plate. The sensor

aperture ring should self-align to the lens. The optical position refer-

ence for the PCB is set by the base plate and lens. Note that the PCB

motion due to button presses must be minimized to maintain optical

alignment.

6. Remove the protective cap from the VCSEL.

7. Insert the VCSEL assembly into the lens.

8. Slide the clip in place until it latches. This locks the VCSEL and lens

together.

Design Considerations for Improving ESD Performance

For improved electrostatic discharge performance, typical creepage and

clearance distance are shown in the table below. Assumption: base plate

construction as per the Avago Technologies supplied IGES file and ADNS-

6130-001 trim lens (or ADNS-6120 round lens).

Typical Distance Millimeters

Creepage 12.0

Clearance 2.1

Note that the lens material is polycarbonate and therefore, cyanoacrylate

based adhesives or other adhesives that may damage the lens should NOT

be used.

(0.000)

0.89

(0.035)

0.2

(0.008)

12.6

(0.496) 11.0

(0.433) 6.3

(0.248) 1.6

(0.063)

1.78

(0.070) 14.84

(0.584)

15.15

(0.596) 25.0

(0.984) 36.0

(1.417)

2 mm MAX. COMPONENT

HEIGHT CLEAR ZONE

2 mm MAX. COMPONENT

HEIGHT RECOMMENDED FINGER

CLEARANCE ZONE (BOTH SIDES)

DIMENSIONS IN MILLIMETERS (INCHES).

10.0

(0.394)

18X ∅0.75

(0.030)RECOMMENDED

MAX.

6X R 0.75

(0.030)

PIN 1 HOLE 0

22.6

(0.890)

12.6

(0.496)

OPTICAL NAVIGATION CENTER

Figure 4. Sectional view of PCB assembly highlighting optical mouse components.

Figure 5a. Schematic diagram for 3-button scroll wheel corded mouse.

LENS CLIP

PCB

SURFACE

VCSEL PCB

SENSOR

BASE PLATE

VCSEL

# Multilayer Ceramic Capacitor

Figure 5b. Schematic diagram for 3-button scroll wheel cordless mouse.

Notes

The supply and ground paths should be laid out using a star methodology.

Level shifting is required to interface a 5V micro-controller to the ADNS-7050.

If a 3V micro-controller is used, the 74VHC125 component shown may be

omitted.

LASER Drive Mode

The laser is driven in pulsed mode during normal operation. A calibration

mode is provided which drives the laser in continuous (CW) operation.

Eye Safety

The ADNS-7050 and the associated components in the schematic of Figure 5

are intended to comply with Class 1 Eye Safety Requirements of IEC 60825-1.

Avago Technologies suggests that manufacturers perform testing to verify

eye safety on each mouse. It is also recommended to review possible single

fault mechanisms beyond those described below in the section “Single Fault

Detection”. Under normal conditions, the ADNS-7050 generates the drive

current for the laser diode (ADNV-6340).

In order to stay below the Class 1 power requirements, LASER_CTRL0 (register

0x1a), LASER_CTRL1 (register 0x1f), LSRPWR_CFG0 (register 0x1c) and

LSRPWR_CFG1 (register 0x1d) must be programmed to appropriate values.

The system comprised of the ADNS-7050 and ADNV-6340, is designed to

maintain the output beam power within Class 1 requirements over compo-

nents manufacturing tolerances and the recommended temperature range

when adjusted per the procedure below and implemented as shown in the

recommended application circuit of Figure 5. For more information, please

refer to Eye Safety Application Note AN 5230.

LASER Power Adjustment Procedure

1. The ambient temperature should be 25°C ±5°C.

2. Set VDD to its permanent value.

3. Set the Range bit (bit 7 of register 0x1a) to 0.

4. Set the Range_C complement bit (bit 7 of register 0x1f) to 1.

5. Set the Match_bit (bit 5 of register 0x1a) to the correct value for the bin

designation of the laser being used.

6. Set the Match_C_bit (bit 5 of register 0x1f) to the complement of the

Match_bit.

7. Enable the Calibration mode by writing to bits [3,2,1] of register 0x1A so

the laser will be driven with 100% duty cycle.

8. Write the Calibration mode complement bits to register 0x1f.

9. Set the laser current to the minimum value by writing 0x00 to register

0x1c, and the complementary value 0xFF to register 0x1d.

10. Program registers 0x1c and 0x1d with increasing values to achieve an

output power as close to 506uW as possible without exceeding it. If this

power is obtained, the calibration is complete, skip to step 14.

11. If it was not possible to achieve the power target, set the laser current to

the minimum value by writing 0x00 to register 0x1c, and the comple-

mentary value 0xff to register 0x1d.

12. Set the Range and Range_C bits in registers 0x1a and 0x1f, respectively,

to choose to the higher laser current range.

13. Program registers 0x1c and 0x1d with increasing values to achieve an

output power as close to 506uW as possible without exceeding it.

14. Save the value of registers 0x1a, 0x1c, 0x1d, and 0x1f in non-volatile

memory in the mouse. These registers must be restored to these values

every time the ADNS-7050 is reset.

15. Reset the mouse, reload the register values from non-volatile memory,

enable Calibration mode, and measure the laser power to verify that the

calibration is correct.

Good engineering practices such as regular power meter calibration, random

quality assurance retest of calibrated mice, etc. should be used to guarantee

performance, reliability and safety for the product design.

LASER Output Power

The laser beam output power as measured at the navigation surface plane is

specified below. The following conditions apply:

1. The system is adjusted according to the above procedure.

2. The system is operated within the recommended operating temperature

range.

3. The VDD value is no greater than 300mV above its value at the time of

adjustment.

4. No allowance for optical power meter accuracy is assumed.

Parameter Symbol Minimum Maximum Units Notes

Laser out- LOP 716 µWClass 1 limit with

put power recommended

VCSEL and lens.

Disabling the LASER

LASER_NEN is connected to the gate of a P-channel MOSFET transistor which

when ON connects VDD to the LASER. In normal operation, LASER_NEN is low.

In the case of a fault condition (ground or VDD3 at XY_LASER), LASER_NEN

goes high to turn the transistor off and disconnect VDD3 from the LASER.

Single Fault Detection

ADNS-7050 is able to detect a short circuit or fault condition at the XY_LASER

pin, which could lead to excessive laser power output. A path to ground on this

pin will trigger the fault detection circuit, which will turn off the laser drive

current source and set the LASER_NEN output high. When used in combina-

tion with external components as shown in the block diagram below, the

system will prevent excess laser power for a resistive path to ground at

XY_LASER by shutting off the laser. In addition to the ground path fault

detection described above, the fault detection circuit is continuously checked

for proper operation by internally generating a path to ground with the laser

turned off via LASER_NEN. If the XY_LASER pin is shorted to VDD3, this test

will fail and will be reported as a fault.

Figure 6. Single fault detection and eye safety feature block diagram.

VDD

LASER_NEN

FAULT CONTROL

BLOCK

ADNS-7050MICROCONTROLLER

XY_LASER

VOLTAGE SENSE

GND

VCSEL

SERIAL PORT

CURRENT SET

ADNS-7050

Laser Mouse Sensor

Data Sheet

Theory of Operation

The ADNS-7050 is based on LaserStream™ Technology, which measures

changes in position by optically acquiring sequential surface images (frames)

and mathematically determining the direction and magnitude of movement.

The ADNS-7050 contains an Image Acquisition System (IAS), a Digital Signal

Processor (DSP), and a four wire serial port. The IAS acquires microscopic

surface images via the lens and illumination system. These images are pro-

cessed by the DSP to determine the direction and distance of motion. The DSP

calculates the ∆x and ∆y relative displacement values. An external

microcontroller reads the ∆x and ∆y information from the sensor serial port.

The microcontroller then translates the data into PS2, USB, or RF signals

before sending them to the host PC or game console.

Features

•Low power architecture

•New LaserStream™ technology

•Self-adjusting power-saving modes for longest battery life

•Speed motion detection up to 20 ips and 8G

•Enhanced SmartSpeed self-adjusting frame rate for optimum performance

•Motion detect pin output

•Internal oscillator – no clock input needed

•Selectable 400 and 800 cpi resolution

•Wide operating voltage: 2.7 V-3.6 V nominal

•Four wire serial port

•Minimal number of passive components

•Laser fault detect circuitry on-chip for Eye Safety Compliance

Applications

•Laser mice

•Optical trackballs

•Integrated input devices

•Battery-powered input devices

Pinout of ADNS-7050 Optical Mouse Sensor

Pin Name Description

1NCS Chip Select (Active Low Input)

2MISO Serial Data Output (Master In/Slave Out)

3SCLK Serial Clock Input

4MOSI Serial Data Input (Master Out/Slave In)

5MOTION Motion Detect (Active Low Output)

6LASER_NEN LASER Enable (Active LOW)

7GND Ground

8XY_LASER LASER Control

9AGND Analog Ground

10 AVDD Analog Supply Voltage

11 AGND Analog Ground

12 GND Ground

13 GND Ground

14 NC No Connection

15 GND Ground

16 VDD Supply Voltage

17 NC No Connection

18 NC No Connection

A7050

XYYWWZ

1 NCS

2 MISO

3 SCLK

4 MOSI

5 MOTION

6 LASER_NEN

7 GND

8 XY_LASER

9 AGND

18 NC

17 NC

16 VDD

15 GND

14 NC

13 GND

12 GND

11 AGND

10 AVDD

Figure 7. Package outline drawing (top view).

Figure 8. Package outline drawing.

CAUTION: It is advised that normal static precautions be taken in handling and assembly of this component to prevent damage and/or degradation which

may be induced by ESD.

3.68

(0.145)

9.10

(0.358)

12.85 ± 0.9

(0.506 ± 0.035)

NOTES:

1. DIMENSIONS IN MILLIMETERS (INCHES).

2. DIMENSIONAL TOLERANCE: ± 0.1 mm.

3. COPLANARITY OF LEADS: 0.1 mm.

4. LEAD PITCH TOLERANCE: ± 0.15 mm.

5. CUMULATIVE PITCH TOLERANCE: ± 0.15 mm.

6. ANGULAR TOLERANCE: ± 3.0 DEGREES.

7. MAXIMUM FLASH: + 0.2 mm.

8. CHAMFER (25° X 2) ON THE TAPER SIDE OF THE LEAD.

9. * THESE DIMENSIONS ARE FOR REFERENCES ONLY AND SHOULD

NOT BE USED TO MECHANICALLY REFERENCE THE SENSOR.

(AT LEAD TIP)

12.85

(0.506)(AT SHOULDER)

0.25

(0.010)

17.84

(0.702)

0.38

(0.015)

LEAD WIDTH

0.89

(0.035)

LEAD OFFSET

1.78

(0.070)

LEAD PITCH

8.61

(0.339)

90° ± 3°

CLEAR

OPTICAL

PATH

GATE LOCATION

SURFACE RECESSED

BY 0.3 mm

6.60*

(0.260)

PIN 1

4.55

(0.179)

PIN 1

8.99*

(0.354)

5.0 KAPTON TAPE

(REMOVE BEFORE

FINAL ASSEMBLY)

∅

1.40 ± 0.03

(0.055 ± 0.001)

21.5°

SECTION A–A

∅

A7050

XYYWWZ

Figure 9. Block diagram of ADNS-7050 optical mouse sensor.

Regulatory Requirements

•Passes FCC B and worldwide analogous emission limits when assembled

into a mouse with shielded cable and following Avago Technologies

recommendations.

•Passes IEC-1000-4-3 radiated susceptibility level when assembled into a

mouse with shielded cable and following Avago Technologies recom-

mendations.

•Passes EN61000-4-4/IEC801-4 EFT tests when assembled into a mouse

with shielded cable and following Avago Technologies recommendations.

•UL flammability level UL94 V-0.

•Provides sufficient ESD creepage/clearance distance to avoid discharge

up to 15 kV when assembled into a mouse according to usage instruc-

tions above.

POWER AND CONTROL

SERIAL PORT AND REGISTERS

IMAGE ARRAY

DSP

OSCILLATOR

LAZER DRIVE

GND

AGND

XY_LASER

AVDD

VDD NCS

ADNS-7050

SCLK

MOSI

MISO

MOTION

LASER_NEN

Absolute Maximum Ratings

Parameter Symbol Minimum Maximum Units Notes

Storage Temperature TS-40 85 ºC

Lead Solder Temp 260 ºC For 10 seconds, 1.6 mm below seating plane.

Supply Voltage VDD -0.5 3.7 V

ESD 2 kV All pins, human body model MIL 883 Method 3015

Input Voltage VIN -0.5 VDD + 0.5 V All Pins

Latchup Current Iout 20 mA All Pins

Recommended Operating Conditions

Parameter Symbol Minimum Typical Maximum Units Notes

Operating Temperature TA040ºC

Power Supply Voltage VDD 2.7 2.8 3.6 V Including noise

Power Supply Rise Time VRT 1100 ms 0 to 2.8 V

Supply Noise (Sinusoidal) VNA 100 mVp-p 10 kHz - 50 MHz

Serial Port Clock Frequency fSCLK 1MHz Active drive, 50% duty cycle

Distance from Lens Reference Z 2.18 2.40 2.62 mm Results in ±0.2 mm minimum DOF.

Plane to Surface See Figure 10.

Speed S 20 in/sec

Acceleration A 8 G

Load Capacitance Cout 100 pF MOTION, MISO

Voltage at XY_LASER Vxy_laser 0.3 VDD V

Figure 10. Distance from lens reference plane to surface, Z.

SURFACELENS

CLIP

VCSEL PCB

SENSOR

SENSOR PCB

2.40

(0.094)

AC Electrical Specifications

Electrical Characteristics over recommended operating conditions. Typical values at 25 °C, VDD=2.8V.

Parameter Symbol Minimum Typical Maximum Units Notes

Motion Delay tMOT-RST 23 ms From SW_RESET register write to valid motion, assuming

after Reset motion is present

Shutdown tSTDWN 50 ms From Shutdown mode active to low current

Wake from Shutdown tWAKEUP 23 From Shutdown mode inactive to valid motion.

Notes: A RESET must be asserted after a shutdown.

Refer to section "Notes on Shutdown and Forced Rest",

also note tMOT-RST

Forced Rest Enable tREST-EN 1s From RESTEN bits set to low current

Wake from Forced Rest tREST-DIS 1s From RESTEN bits cleared to valid motion

MISO Rise Time tr-MISO 150 300 ns CL = 100 pF

MISO Fall Time tf-MISO 150 300 ns CL = 100 pF

MISO Delay after SCLK tDLY-MISO 120 ns From SCLK falling edge to MISO data valid, no load

conditions

MISO Hold Time thold-MISO 0.5 1/fSCLK µs Data held until next falling SCLK edge

MOSI Hold Time thold-MOSI 200 ns Amount of time data is valid after SCLK rising edge

MOSI Setup Time tsetup-MOSI 120 ns From data valid to SCLK rising edge

SPI Time between tSWW 30 µs From rising SCLK for last bit of the first data byte, to rising

Write Commands SCLK for last bit of the second data byte.

SPI Time between Write tSWR 20 µs From rising SCLK for last bit of the first data byte, to rising

and Read Commands SCLK for last bit of the second address byte.

SPI Time between Read tSRW 500 ns From rising SCLK for last bit of the first data byte, to falling

and Subsequent tSRR SCLK for the first bit of the address byte of the next

Commands command.

SPI Read Address-Data tSRAD 4 µs From rising SCLK for last bit of the address byte, to falling

Delay SCLK for first bit of data being read.

NCS Inactive after tBEXIT 500 ns Minimum NCS inactive time after motion burst before next

Motion Burst SPI usage

NCS to SCLK Active tNCS-SCLK 120 ns From NCS falling edge to first SCLK rising edge

SCLK to NCS Inactive tSCLK-NCS 120 ns From last SCLK rising edge to NCS rising edge, for valid MISO

(for Read Operation) data transfer

SCLK to NCS Inactive tSCLK-NCS 20 µs From last SCLK rising edge to NCS rising edge, for valid MOSI

(for Write Operation) data transfer

NCS to MISO High-Z tNCS-MISO 500 ns From NCS rising edge to MISO high-Z state

MOTION Rise Time tr-MOTION 150 300 ns CL = 100 pF

MOTION Fall Time tf-MOTION 150 300 ns CL = 100 pF

Transient Supply Current IDDT 45 mA Max supply current during a V DD ramp from 0 to 2.8 V

DC Electrical Specifications

Electrical Characteristics over recommended operating conditions. Typical values at 25 °C, VDD=2.8 V.

Parameter Symbol Minimum Typical Maximum Units Notes

DC Supply Current in IDD_RUN 410mAAverage current, including LASER current. No load on

Various Modes IDD_REST1 0.5 1.8 MISO, MOTION.

IDD_REST2 0.15 0.4

IDD_REST3 0.05 0.15

Peak Supply Current 40 mA

Shutdown Supply Current IDDSTDWN 112 µANCS, SCLK = VDD

MOSI = GND

MISO = Hi-Z

Input Low Voltage VIL 0.5 V SCLK, MOSI, NCS

Input High Voltage VIH VDD – 0.5 V SCLK, MOSI, NCS

Input Hysteresis VI_HYS 100 mV SCLK, MOSI, NCS

Input Leakage Current Ileak ±1±10 µAVin = VDD -0.6 V, SCLK, MOSI, NCS

XY_LASER Current ILAS 0.8 mA Vxy_laser ≥ 0.3 V

LP_CFG0 = 0xFF

LP_CFG1 = 0x00

LASER Current ILAS_FAULT 300 uA XY_LASER Rleakage < 75 kOhms to GND

(Fault Mode)

Output Low Voltage, VOL 0.7 V Iout = 1 mA, MISO, MOTION

MISO, LASER_NEN Iout = 1 mA, LASER_NEN

Output High Voltage, VOH VDD – 0.7 V Iout = -1 mA, MISO, MOTION

MISO, LASER_NEN Iout = -0.5 mA, LASER_NEN

Input Capacitance Cin 10 pF MOSI, NCS, SCLK

Typical Performance Characteristics

Figure 11. Mean resolution vs. Z at 800 cpi.

Figure 12. Average error vs. distance at 800 cpi .

Typical Resolution vs. Z

400

500

600

700

800

900

1000

1.6 1.7 1.8 1.9 2 2.1 2.2 2.3 2.4 2.5 2.6 2.7 2.8 2.9 3 3.1 3.2 3.3 3.4

Distance from Lens Reference Plane to Surface, Z (mm)

Resolution (counts/inches)

Photo Paper White Melamine Bookshelf Manila Black Formica White Paper

Typical Path Deviation Largest Single Perpendicular Deviation From A Straight Line At 45

Degrees Path Length = 4 inches; Speed = 6 ips ; Resolution = 800 cpi

1.6 1.7 1.8 1.9 2 2.1 2.2 2.3 2.4 2.5 2.6 2.7 2.8 2.9 3 3.1 3.2 3.3 3.4

Distance From Lens Reference Plane To Surface, Z (mm)

Maximum Distance (mouse count)

Photo Paper White Melamine Bookshelf Manila Black Formica White Paper

Figure 13. Wavelength responsivity.

RELATIVE RESPONSIVITY

400

WAVELENGTH (nm)

RELATIVE RESPONSIVITY for ADNS-7050

900

1.0

0.4

0.5

0.6

0.7

0.8

0.9

0.3

700 800 1000

0.1

0.2

600500

Power Management Modes

The ADNS-7050 has three power-saving modes. Each mode has a different

motion detection period, affecting response time to mouse motion (Response

Time). The sensor automatically changes to the appropriate mode, depending

on the time since the last reported motion (Downshift Time). The parameters

of each mode are shown in the following table.

Mode Response Time (nominal) Downshift Time (nominal)

Rest 1 16.5 ms 237 ms

Rest 2 82 ms 8.4 s

Rest 3 410 ms 504 s

Motion Pin Timing

The motion pin is a level-sensitive output that signals the micro-controller

when motion has occurred. The motion pin is lowered whenever the motion

bit is set; in other words, whenever there is data in the Delta_X or Delta_Y

registers. Clearing the motion bit (by reading Delta_X and Delta_Y, or writing

to the Motion register) will put the motion pin high.

LASER Mode

For power savings, the VCSEL will not be continuously on. ADNS-7050 will

flash the VCSEL only when needed.

Synchronous Serial Port

The synchronous serial port is used to set and read parameters in the ADNS-

7050, and to read out the motion information.

The port is a four-wire port. The host micro-controller always initiates com-

munication; the ADNS-7050 never initiates data transfers. SCLK, MOSI, and

NCS may be driven directly by a micro-controller. The port pins may be shared

with other SPI slave devices. When the NCS pin is high, the inputs are ignored

and the output is tri-stated.

The lines that comprise the SPI port:

SCLK: Clock input. It is always generated by the master (the micro-

controller).

MOSI: Input data. (Master Out/Slave In)

MISO: Output data. (Master In/Slave Out)

NCS: Chip select input (active low). NCS needs to be low to activate the

serial port; otherwise, MISO will be high Z, and MOSI & SCLK will

be ignored. NCS can also be used to reset the serial port in case of

an error.

Chip Select Operation

The serial port is activated after NCS goes low. If NCS is raised during a

transaction, the entire transaction is aborted and the serial port will be reset.

This is true for all transactions. After a transaction is aborted, the normal

address-to-data or transaction-to-transaction delay is still required before

beginning the next transaction. To improve communication reliability, all

serial transactions should be framed by NCS. In other words, the port should

not remain enabled during periods of non-use because ESD and EFT/B events

could be interpreted as serial communication and put the chip into an un-

known state. In addition, NCS must be raised after each burst-mode transac-

tion is complete to terminate burst-mode. The port is not available for further

use until burst-mode is terminated.

Write Operation

Write operation, defined as data going from the micro-controller to the

ADNS-7050, is always initiated by the micro-controller and consists of two

bytes. The first byte contains the address (seven bits) and has a “1” as its

MSB to indicate data direction. The second byte contains the data. The

ADNS-7050 reads MOSI on rising edges of SCLK.

Figure14. Write operation.

Figure 15. MOSI setup and hold time.

234567891011 12 13 14 15 16 21

A61A

D4D3D2D1

SCLK

NCS

MOSI

MOSI DRIVEN BY MICRO-CONTROLLER

MISO

tsetup, MOSI

thold, MOSI

SCLK

MOSI

Read Operation

A read operation, defined as data going from the ADNS-7050 to the micro-

controller, is always initiated by the micro-controller and consists of two

bytes. The first byte contains the address, is sent by the micro-controller over

MOSI, and has a “0” as its MSB to indicate data direction. The second byte

contains the data and is driven by the ADNS-7050 over MISO. The sensor

outputs MISO bits on falling edges of SCLK and samples MOSI bits on every

rising edge of SCLK.

Figure 16. Read operation.

Figure 17. MISO delay and hold time.

Note: The 0.5/fSCLK minimums high state of SCLK is also the minimum

MISO data hold time of the ADNS-7050. Since the falling edge of SCLK is

actually the start of the next read or write command, the ADNS-7050 will

hold the state of data on MISO until the falling edge of SCLK.

Required Timing Between Read and Write Commands

There are minimum timing requirements between read and write com-

mands on the serial port.

Figure 18. Timing between two write commands.

234567 8 91011 12 13 14 15 16

SCLK

NCS

SCLK

CYCLE #

MOSI

tSRAD DELAY

D4D3D2D1

MISO

tHOLD-MISO

tDLY-MISO

SCLK

MISO

SCLK

SWW

WRITE OPERATION

ADDRESS DATA

WRITE OPERATION

ADDRESS DATA

If the rising edge of the SCLK for the last data bit of the second write

command occurs before the required delay (tSWW), then the first write com-

mand may not complete correctly.

Figure 19. Timing between write and read commands.

If the rising edge of SCLK for the last address bit of the read command

occurs before the required delay (tSWR), the write command may not com-

plete correctly.

Figure 20. Timing between read and either write or subsequent read commands.

During a read operation SCLK should be delayed at least tSRAD after the last

address data bit to ensure that the ADNS-7050 has time to prepare the

requested data. The falling edge of SCLK for the first address bit of either

the read or write command must be at least tSRR or tSRW after the last SCLK

rising edge of the last data bit of the previous read operation.

Burst Mode Operation

Burst mode is a special serial port operation mode that may be used to

reduce the serial transaction time for a motion read. The speed improve-

ment is achieved by continuous data clocking to or from multiple registers

without the need to specify the register address, and by not requiring the

normal delay period between data bytes.

Burst mode is activated by reading the Motion_Burst register. The ADNS-

7050 will respond with the contents of the Motion, Delta_X, Delta_Y, SQUAL,

Shutter_Upper, Shutter_Lower, and Maximum_Pixel registers in that or-

der. The burst transaction can be terminated anywhere in the sequence

after the Delta_X value by bringing the NCS pin high. After sending the

ing data. All data bits can be read with no delay between bytes by driving

SCLK at the normal rate. The data are latched into the output buffer after

the last address bit is received. After the burst transmission is complete, the

micro-controller must raise the NCS line for at least tBEXIT to terminate burst

mode. The serial port is not available for use until it is reset with NCS, even

for a second burst transmission.

Figure 21. Motion burst timing.

SCLK

SWR

WRITE OPERATION

ADDRESS DATA

NEXT READ OPERATION

ADDRESS

• • •

SCLK

SRAD

READ OPERATION

ADDRESS

NEXT READ

or WRITE OPERATION

ADDRESS

• • •

SRW

SRR

DATA

MOTION_BURST REGISTER ADDRESS READ FIRST BYTE

FIRST READ OPERATION READ SECOND BYTE READ THIRD BYTE

SCLK

• • •

tSRAD

Notes on Power-up

The ADNS-7050 does not perform an internal power up self-reset; the

POWER_UP_RESET register must be written every time power is applied.

The appropriate sequence is as follows:

1. Apply power

2. Drive NCS high, then low to reset the SPI port

3. Write 0x5a to register 0x3a

4. Wait for tWAKEUP

5. Write 0xFE to register 0x28

6. Read from registers 0x02, 0x03, and 0x04 (or read these same 3 bytes

from burst motion register 0x42) one time regardless of the motion pin

state.

During power-up there will be a period of time after the power supply is

high but before any clocks are available. The table below shows the state of

the various pins during power-up and reset.

State of Signal Pins after VDD is Valid

Pin On Power-Up NCS High before Reset NCS Low before Reset After Reset

NCS Functional Hi Low Functional

MISO Undefined Undefined Functional Depends on NCS

SCLK Ignored Ignored Functional Depends on NCS

MOSI Ignored Ignored Functional Depends on NCS

XY_LASER Undefined Undefined Undefined Functional

MOTION Undefined Undefined Undefined Functional

LASER_NEN Undefined Undefined Undefined Functional

Notes on Shutdown and Forced Rest

The ADNS-7050 can be set in Rest mode through the Configuration_Bits

where the sensor does not need to operate all the time.

The ADNS-7050 can be set in Shutdown mode by writing 0xe7 to register

0x3b. The SPI port should not be accessed when Shutdown mode is as-

serted, except the power-up command (writing 0x5a to register 0x3a). (Other

ICs on the same SPI bus can be accessed, as long as the sensor’s NCS pin is

not asserted.) The table below shows the state of various pins during shut-

down. To deassert Shutdown mode:

1. Write 0x5a to register 0x3a.

2. Wait for tWAKEUP.

3. Write 0xFE to register 0x28.

4. Any register settings must then be reloaded.

Pin Status when Shutdown Mode

NCS Functional*1

MISO Undefined*2

SCLK Ignore if NCS = 1*3

MOSI Ignore if NCS = 1*4

XYLASER High(Off)

LASER_NEN High(Off)

MOTION Undefined *2

*1 NCS pin must be held to 1 (high) if SPI bus is shared with other devices. It is

recommended to hold to 1 (high) during Power Down unless powering up

the Sensor. It must be held to 0 (low) if the sensor is to be re-powered up

from shutdown (writing 0x5a to register 0x3a).

*2 Depend on last state.

*3 SCLK is ignore if NCS is 1 (high). It is functional if NCS is 0 (low).

*4 MOSI is ignore if NCS is 1 (high). If NCS is 0 (low), any command present on

the MOSI pin will be ignored except power-up command (writing 0x5a to

Note: There are long wakeup times from shutdown and forced Rest. These features

should not be used for power management during normal mouse motion.

Registers

The ADNS-7050 registers are accessible via the serial port. The registers are

used to read motion data and status as well as to set the device configura-

tion.

Address Register Read/Write Default Value

0x00 Product_ID R 0x23

0x01 Revision_ID R 0x03

0x02 Motion R/W 0x00

0x03 Delta_X R 0x00

0x04 Delta_Y R 0x00

0x05 SQUAL R 0x00

0x06 Shutter_Upper R 0x00

0x07 Shutter_Lower R 0x64

0x08 Maximum_Pixel R 0xd0

0x09 Pixel_Sum R 0x80

0x0a Minimum_Pixel R 0x00

0x0b Pixel_Grab R/W 0x00

0x0c CRC0 R 0x00

0x0d CRC1 R 0x00

0x0e CRC2 R Undefined

0x0f CRC3 R Undefined

0x10 Self_Test W NA

0x11 Configuration_Bits R/W 0x03

0x12-0x19 Reserved

0x1a LASER_CTRL0 R/W 0x00

0x1b Reserved

0x1c LSRPWR_CFG0 R/W 0x00

0x1d LSRPWR_CFG1 R/W 0x00

0x1e Reserved

0x1f LASER_CTRL1 R/W 0x01

0x20-0x2d Reserved

0x2e Observation R/W Undefined

0x2f-0x39 Reserved

0x3a POWER_UP_RESET W NA

0x3b Shutdown W NA

0x3c-0x3d Reserved

0x3e Inverse_Revision_ID R 0xfc

0x3f Inverse_Product_ID R 0xdc

0x42 Motion_Burst R 0x00

Revision_ID Address: 0x01

Access: Read Reset Value: 0x03

Product_ID Address: 0x00

Access: Read Reset Value: 0x23

Data Type: 8-Bit unsigned integer

USAGE: This register contains a unique identification assigned to the ADNS-7050. The value in this register does not change; it can be used to verify that

the serial communications link is functional.

Bit 76543210

Field PID7PID6PID5PID4PID3PID2PID1PID0

Data Type: 8-Bit unsigned integer

USAGE: This register contains the IC revision. It is subject to change when new IC versions are released.

Bit 76543210

Field RID7RID6RID5RID4RID3RID2RID1RID0

Motion Address: 0x02

Access: Read/Write Reset Value: 0x00

Field Name Description

MOT Motion since last report

0 = No motion

1 = Motion occurred, data ready for reading in Delta_X and Delta_Y registers

PIXRDY Pixel Dump data byte is available in Pixel_Dump register.

0 = Data not available

1 = Data available

PIXFIRST This bit is set when the Pixel_Grab register is written to or when a complete pixel array has been read, initiating an increment to pixel 0,0.

0 = Pixel_Grab data not from pixel 0,0

1 = Pixel_Grab data is from pixel 0,0

OVF Motion overflow, ∆Y and/or ∆X buffer has overflowed since last report.

0 = No overflow

1 = Overflow has occurred

LP_VALID Laser Power Settings

0 = Register 0x1a and register 0x1f or register 0x1c and register 0x1d do not have complementary values.

1 = Laser power is valid

FAULT Indicates that XY_LASER is shorted to GND or VDD

0 = No fault detected

1 = Fault detected.

NOTE: Avago Technologies recommends that registers 0x02, 0x03, and 0x04 be read sequentially.

Data Type: Bit field

USAGE: Register 0x02 allows the user to determine if motion has occurred since the last time it was read. If the MOT bit is set, then the user should read

registers 0x03 and 0x04 to get the accumulated motion. Read this register before reading the Delta_X and Delta_Y registers.

Writing anything to this register clears the MOT and OVF bits, Delta_X and Delta_Y registers. The written data byte is not saved.

Internal buffers can accumulate more than eight bits of motion for X or Y. If either one of the internal buffers overflows, then absolute path data is

lost and the OVF bit is set. To clear the overflow, write anything to this register.

Check the OVR bit if more than 4" of motion is accumulated without reading it. If bit set, discard the motion as erroneous. Write anything to this

The PIXRDY bit will be set whenever a valid pixel data byte is available in the Pixel_Dump register. Check that this bit is set before reading from

Pixel_Dump. To ensure that the Pixel_Grab pointer has been reset to pixel 0,0 on the initial write to Pixel_Grab, check to see if PIXFIRST is set to

high.

Bit 76543210

Field MOT PIXRDY PIXFIRST OVF LP_VALID FAULT Reserved Reserved

Delta Y Address: 0x04

Access: Read Reset Value: 0x00

Delta X Address: 0x03

Access: Read Reset Value: 0x00

Data Type: Eight bit 2’s complement number

USAGE: Y movement is counts since last report. Absolute value is determined by resolution. Reading clears the register.

NOTE: Avago Technologies recommends that registers 0x02, 0x03, and 0x04 be read sequentially.

Bit 76543210

Field Y7Y6Y5Y4Y3Y2Y1Y0

Data Type: Eight bit 2’s complement number

USAGE: X movement is counts since last report. Absolute value is determined by resolution. Reading clears the register.

NOTE: Avago Technologies recommends that registers 0x02, 0x03, and 0x04 be read sequentially.

Bit 76543210

Field X7X6X5X4X3X2X1X0

80 81 FE FF 00 01 02 7E 7F

-128 -127 -2 -1 0 +1 +2 +126 +127MOTION

DELTA_X

80 81 FE FF 00 01 02 7E 7F

-128 -127 -2 -1 0 +1 +2 +126 +127MOTION

DELTA_Y

Figure 22. SQUAL values at 800cpi (white paper).

Squal Address: 0x05

Access: Read Reset Value: 0x00

Figure 23. Mean SQUAL vs. Z (white paper).

Data Type: Upper 8 bits of a 9-bit unsigned integer

USAGE: SQUAL (Surface Quality) is a measure of the number of valid features visible by the sensor in the current frame.

The maximum SQUAL register value is 127. Since small changes in the current frame can result in changes in SQUAL, variations in SQUAL when looking

at a surface are expected. The graph below shows 250 sequentially acquired SQUAL values, while a sensor was moved slowly over white paper. SQUAL

is nearly equal to zero, if there is no surface below the sensor. SQUAL is typically maximized when the navigation surface is at the optimum distance

from the imaging lens (the nominal Z-height).

Bit 76543210

Field SQ7SQ6SQ5SQ4SQ3SQ2SQ1SQ0

Mean SQUAL vs. Z (White Paper)

800dpi, Circle@7.5" diameter, Speed-6ips

100

120

140

160

1.6 1.8 2 2.2 2.4 2.6 2.8 3 3.2

Distance of Lens Reference Plane to Surface,

Z (mm)

Squal count

Avg-3sigma

Avg

Avg+3sigma

SQUAL Value (White Paper)

At Z = 0 mm, Circle@7.5" diameter, Speed-6ips

100

120

140

160

14589133 177 221 265 309 353 397 441 485 529 573 617 661 705 749 793 837 881

Count

Squal Value

Figure 24. Shutter values at 800cpi (white paper).

Figure 25. Mean shutter vs. Z (white paper).

Shutter_Upper Address: 0x06

Access: Read Reset Value: 0x00

Data Type: Sixteen bit unsigned integer

USAGE: Units are clock cycles. Read Shutter_Upper first, then Shutter_Lower. They should be read consecutively. The shutter is adjusted to keep the

average and maximum pixel values within normal operating ranges. The shutter value is automatically adjusted.

Bit 76543210

Field S7S6S5S4S3S2S1S0

Bit 76543210

Field S15 S14 S13 S12 S11 S10 S9S8

Shutter_Lower Address: 0x07

Access: Read Reset Value: 0x64

Mean Shutter vs. Z (White paper)

800dpi, Circle@7.5" diameter, Speed-6ips

100

110

120

130

140

150

160

1.6 1.8 2 2.2 2.4 2.6 2.8 3 3.2

Distance of Lens Reference Plane to Surface, Z

(mm)

Shutter value (Count)

Avg-3sigma

Avg

Avg+3sigma

At Z = 0 mm, Circle@7.5" diameter, Speed-6ips

Shutter Value (White Paper)

100

120

140

160

14283124 165 206 247 288 329 370 411 452 493 534 575 616 657 698 739 780 821 862

Count

Shutter Value

Pixel_Sum Address: 0x09

Access: Read Reset Value: 0x80

Maximum_Pixel Address: 0x08

Access: Read Reset Value: 0xd0

Data Type: High 8 bits of an unsigned 17-bit integer

USAGE: This register is used to find the average pixel value. It reports the upper eight bits of a 17-bit counter, which sums all pixels in the current frame. It

may be described as the full sum divided by 512. To find the average pixel value, use the following formula:

Average Pixel = Register Value * 512/484 = Register Value * 1.058

The maximum register value is 241. The minimum is 0. The pixel sum value can change on every frame.

Bit 76543210

Field AP7AP6AP5AP4AP3AP2AP1AP0

Data Type: Eight-bit number

USAGE: Maximum Pixel value in current frame. Minimum value = 0, maximum value = 254. The maximum pixel value can vary with every frame.

Bit 76543210

Field MP7MP6MP5MP4MP3MP2MP1MP0

Pixel_Grab Address: 0x0b

Access: Read Reset Value: 0x00

Minimum_Pixel Address: 0x0a

Access: Read Reset Value: 0x00

Data Type: Eight-bit word

USAGE: For test purposes, the sensor will read out the contents of the pixel array, one pixel per frame. To start a pixel grab, write anything to this register

to reset the pointer to pixel 0,0. Then read the PIXRDY bit in the Motion register. When the PIXRDY bit is set, there is valid data in this register to

read out. After the data in this register is read, the pointer will automatically increment to the next pixel. Reading may continue indefinitely; once

a complete frame’s worth of pixels has been read, PIXFIRST will be set to high to indicate the start of the first pixel and the address pointer will

start at the beginning location again.

Bit 765432 10

Field PD7PD6PD5PD4PD3PD2PD1PD0

Data Type:Eight-bit number

USAGE: Minimum Pixel value in current frame. Minimum value = 0, maximum value = 254. The minimum pixel value can vary with every frame.

Bit 765432 10

Field MP7MP6MP5MP4MP3MP2MP1MP0

Figure 26. Pixel address map (looking through the ADNS-6130-001 or ADNS-6120 lens).

33022 44 66 88 110 132 154 176 198 220 242 264 2860

33123 45 67 89 111 133 155 177 199 221 243 265 2871

33224 46 68 90 112 134 156 178 200 222 244 266 2882

33325 47 69 91 113 135 157 179 201 223 245 267 2893

33426 48 70 92 114 136 158 180 202 224 246 268 2904

33527 49 71 93 115 137 159 181 203 225 247 269 2915

33628 50 72 94 116 138 160 182 204 226 248 270 2926

33729 51 73 95 117 139 161 183 205 227 249 271 2937

33830 52 74 96 118 140 162 184 206 228 250 272 2948

33931 53 75 97 119 141 163 185 207 229 251 273 2959

34032 54 76 98 120 142 164 186 208 230 252 274 29610

34133 55 77 99 121 143 165 187 209 231 253 275 29711

34234 56 78 100 122 144 166 188 210 232 254 276 29812

34335 57 79 101 123 145 167 189 211 233 255 277 29913

344

308

309

310

311

312

313

314

315

316

317

318

319

320

321

322

352

353

354

355

356

357

358

359

360

361

362

363

364

365

366

374

375

376

377

378

379

380

381

382

383

384

385

386

387

388

396

397

398

399

400

401

402

403

404

405

406

407

408

409

410

418

419

420

421

422

423

424

425

426

427

428

429

430

431

432

440

441

442

443

444

445

446

447

448

449

450

451

452

453

454

462

463

464

465

466

467

468

469

470

471

472

473

474

475

47636 58 80 102 124 146 168 190 212 234 256 278 30014

103

104

105

106

107

108

109

125

126

127

128

129

130

131

147

148

149

150

151

152

153

169

170

171

172

173

174

175

191

192

193

194

195

196

197

213

214

215

216

217

218

219

235

236

237

238

239

240

241

257

258

259

260

261

262

263

279

280

281

282

283

284

285

301

302

303

304

305

306

307

323

324

325

326

327

328

329

345

346

347

348

349

350

351

367

368

369

370

371

372

373

389

390

391

392

393

394

395

411

412

413

414

415

416

417

433

434

435

436

437

438

439

455

456

457

458

459

460

461

477

478

479

480

481

482

483

LAST PIXEL

FIRST PIXEL

LB RB

POSITIVE X

POSITIVE Y

TOP X-RAY VIEW OF MOUSE

A7050

XYYWWZ

CRC0 Address: 0x0c

Access: Read Reset Value: 0x00

Data Type: Eight-bit number

USAGE: Register 0x0f reports the fourth byte of the system self test results. Value = 0B. See Self Test register 0x10.

Bit 765432 10

Field CRC37CRC36CRC35CRC34CRC33CRC32CRC31CRC30

CRC3 Address: 0x0f

Access: Read Reset Value: 0x00

Data Type: Eight-bit number

USAGE: Register 0x0e reports the third byte of the system self test results. Value = CA. See Self Test register 0x10.

Bit 765432 10

Field CRC27CRC26CRC25CRC24CRC23CRC22CRC21CRC20

CRC2 Address: 0x0e

Access: Read Reset Value: 0x00

Data Type: Eight-bit number

USAGE: Register 0x0c reports the second byte of the system self test results. Value = 9A. See Self Test register 0x10.

Bit 765432 10

Field CRC17CRC16CRC15CRC14CRC13CRC12CRC11CRC10

CRC1 Address: 0x0d

Access: Read Reset Value: 0x00

Data Type: Eight-bit number

USAGE: Register 0x0c reports the first byte of the system self test results. Value = 05. See Self Test register 0x10.

Bit 765432 10

Field CRC07CRC06CRC05CRC04CRC03CRC02CRC01CRC00

Bit 76543210

Field RES Reserved RESTEN1RESTEN0Reserved Reserved Reserved Reserved

Data Type: Bit field

USAGE: Register 0x11 allows the user to change the configuration of the sensor. Setting the RESTEN1-0 bits forces the sensor into Rest mode, as described

in the power modes section above. The RES bit allows selection between 400 and 800 cpi resolution.

Note: Forced Rest has a long wakeup time and should not be used for power management during normal mouse motion.

Field Name Description

RESTEN1-0 Puts chip into Rest mode

00 = normal operation

01 = force Rest1

11 = force Rest3

RES Sets resolution

0 = 400

1 = 800

Self_Test Address: 0x10

Access: Write Reset Value: NA

Configuration_bits Address: 0x11

Access: Read/Write Reset Value: 0x03

Field Name Description

TESTEN Enable System Self Test

0 = Disabled

1 = Enable

Data Type: Bit field

USAGE: Set the TESTEN bit in register 0x10 to start the system self-test. The test takes 250ms. During this time, do not write or read through the SPI port.

Results are available in the CRC0-3 registers. After self-test, reset the chip to start normal operation.

Bit 76543210

Field Reserved Reserved Reserved Reserved Reserved Reserved Reserved TESTEN

Reserved Address: 0x1b

LASER_CTRL0 Address: 0x1a

Access: Read/Write Reset Value: 0x00

Field Name Description

Range Rbin Settings

0 = Laser current range from approximately 2 mA to 7 mA

1 = Laser current range from approximately 5 mA to 13 mA

Match_bit Match the sensor to the laser characteristics. Set per the bin table specification for the laser in use based on the bin letter.

VCSEL Bin Number Match_bit

2A 0

3A 0

CAL2-0 Laser calibration mode

-Write 101b to bits [3,2,1] to set the laser to continuous ON (CW) mode.

-Write 000b to exit laser calibration mode, all other values are not recommended.

Reading the Motion register (0x03 or 0x42) will reset the value to 000b and exit calibration mode.

Force_Disable LASER force disabled

0 = LASER_NEN functions as normal

1 = LASER_NEN output is high.

Reserved Address: 0x12-0x19

Data Type: Bit field

USAGE: This register is used to control the laser drive. Bits 5 and 7 require complement values in register 0x1F. If the registers do not contain complementary

values for these bits, the laser is turned off and the LP_VALID bit in the MOTION register is set to 0. The registers may be written in any order after

the power ON reset.

Bit 76 5432 10

Field Range Reserved Match_bit Reserved CAL2CAL1CAL0Force_Disable

LSRPWR_CFG1 Address: 0x1d

Access: Read and Write Reset Value: 0x00

Reserved Address: 0x1e

LSRPWR_CFG0 Address: 0x1c

Access: Read and Write Reset Value: 0x00

Data Type: 8 Bit unsigned

USAGE: This register is used to set the laser current. It is to be used together with register 0x1D, where register 0x1D contains the complement of register 0x1C.

If the registers do not contain complementary values, the laser is turned off and the LP_VALID bit in the MOTION register is set to 0. The registers may

be written in any order after the power ON reset.

Field Name Description

LP7 – LP0Controls the 8-bit DAC for adjusting laser current.

One step is equivalent to (1/384)*100% = 0.26% drop of relative laser current.

Refer to the table below for examples of relative laser current settings.

LP7 - LP3LP 2 LP 1 LP 0 Relative Laser Current

00000 00033.59%

00000 00133.85%

00000 01034.11%

: : :::: :

11111 10199.48%

11111 11099.74%

11111 111100%

Data Type: 8 Bit unsigned

USAGE: The value in this register must be a complement of register 0x1C for laser current to be as programmed, otherwise the laser is turned off and the

LP_VALID bit in the MOTION register is set to 0. Registers 0x1C and 0x1D may be written in any order after power ON reset.

Bit 76543210

Field LPC7LPC6LPC5LPC4LPC3LPC2LPC1LPC0

Bit 76543210

Field LP7LP6LP5LP4LP3LP2LP1LP0

Observation Address: 0x2e

Access: Read/Write Reset Value: 0x00

LASER_CTRL1 Address: 0x1f

Access: Read and Write Reset Value: 0x01

Reserved Address: 0x20-0x2d

Reserved Address: 0x2f-0x39

Data Type: Bit field

USAGE: Register 0x2e provides bits that are set every frame. It can be used during EFT/B testing to check that the chip is running correctly. Writing

anything to this register will clear the bits.

Field Name Description

MODE1-0 Mode Status: Reports which mode the sensor is in.

00 = Run

01 = Rest 1

10 = Rest 2

11 = Rest 3

OBS4-0 Set every frame

Bit 76543210

Field MODE1MODE0Reserved OBS4OBS3OBS2OBS1OBS0

Data Type: 8 Bit unsigned

USAGE: Bits 5 and 7 of this register must be the complement of the corresponding bits in register 0x1A for the VCSEL control to be as progrmmed, otherwise

the laser turned is off and the LP_VALID bit in the MOTION register is set to 0. Registers 0x1A and 0x1F may be written in any order after power ON

reset.

Bit 76543210

Field Range_C Reserved Match_bit_C Reserved Reserved Reserved Reserved Reserved

POWER_UP_RESET Address: 0x3a

Access: Write Reset Value: NA

SHUTDOWN Address: 0x3b

Access: Write Only Reset Value: NA

Inverse_Revision_ID Address: 0x3e

Access: Read Reset Value: 0xfc

Reserved Address: 0x3c-0x3d

Data Type: Inverse 8-Bit unsigned integer

USAGE: This value is the inverse of the Revision_ID. It can be used to test the SPI port.

Bit 76543210

Field NRID7NRID6NRID5NRID4NRID3NRID2NRID1NRID0

Data Type: 8-bit integer

USAGE: Write 0xe7 to set the chip to shutdown mode, use POWER_UP_RESET register (address 0x3b) to power up the chip.

Bit 76543210

Field SD7SD 6 SD 5 SD 4 SD 3 SD 2 SD 1 SD 0

Data Type: 8-bit integer

USAGE: Write 0x5a to this register to reset the chip. All settings will revert to default values. Reset is required after recovering from shutdown mode.

Bit 76543210

Field RST7RST6RST5RST4RST3RST2RST1RST0

Inverse_Product_ID Address: 0x3f

Access: Read Reset Value: 0xdc

Motion_Burst Address: 0x42

Access: Read Reset Value: 0x00

Data Type: Various

USAGE: Read from this register to activate burst mode. The sensor will return the data in the Motion register, Delta_X, Delta_Y, Squal, Shutter_Upper,

Shutter_Lower, and Maximum_Pixel. Reading the first 3 bytes clears the motion data. The read may be terminated anytime after Delta_X is read.

Bit 76543210

Field MB7MB6MB5MB4MB3MB2MB1MB0

Data Type: Inverse 8-Bit unsigned integer

USAGE: This value is the inverse of the Product_ID. It can be used to test the SPI port.

Bit 76543210

Field NPID7NPID6NPID5NPID4NPID3NPID2NPID1NPID0

ADNV-6340

Single-Mode Vertical-Ca vity Surface Emitting Laser (VCSEL)

Data Sheet

Description

This advanced class of VCSELs was engineered by Avago Technologies

providing a laser diode with a single longitudinal as well as a single trans-

verse mode. In contrast to most oxide-based single-mode VCSELs, these

VCSELs remain within a single mode operation over a wide range of output

power. When compared to an LED, the ADNV-6340 has a significantly

lower power consumption making it an ideal choice for optical navigation

applications.

Features

•Advanced Technology VCSEL chip

•Single Mode Lasing operation

•Non-hermetic plastic package

•832-865 nm wavelength

•Enhanced ESD up to 2 ˝KV

Figure 27. Outline drawing for ADNV-6340 VCSEL.

Note: With the can unsealed, the protective kapton tape should not

be removed until just prior to assembly into the ADNS-6120 or

ADNS-6130-001 lens.

(5.25)

AT SHOULDER

7.22

5.25 ± 0.65

AT LEAD TIP

5.72

2X 90°

3.28

CATHODE

FLAT

∅4.70 ± 0.05

(BASE)

1° MAX.

0.90

0.50

0.25

5.36

4.3

∅

KAPTON TAPE

= BIN NUMBER

= BIN LETTER

= SUBCONTRACTOR CODE

= DIE SOURCE

+3°

– 5°

Figure 28. Suggested ADNV-6340 PCB mounting guide.

Absolute Maximum Ratings

Parameter Rating Units Notes

DC Forward Current 12 mA

Peak Pulsing Current 19 mA Duration = 100ms, 10% duty cycle

Power Dissipation 24 mW

Reverse Voltage 5 V I = 10 µA

Laser Junction Temperature 150 ºC

Operating Case Temperature 5 to 45 ºC

Storage Case Temperature -40 to +85 ºC

Lead Soldering Temperature 260 ºC See IR reflow profile (Figure 32)

ESD (Human-Body Model) 2 KV

Comments:

1. Stresses greater than those listed under “Absolute Maximum Ratings”

may cause permanent damage to the device. These are the stress ratings

only and functional operation of the device at these or any other condition

beyond those indicated for extended period of time may affect device

reliability.

2. The maximum ratings do not reflect eye-safe operation. Eye safe

operating conditions are listed in the power adjustment procedure section

in the ADNS-7050 laser sensor datasheet.

3. The inherent design of this component causes it to be sensitive to

electrostatic discharge. The ESD threshold is listed above. To prevent

ESD-induced damage, take adequate ESD precautions when handling

this product.

11.00

1.70

7.20 MAX.

CABLE/WIRE CONNECTION PLASTIC VCSEL PACKAGE: 5.00 PITCH

LEADS: 0.5 x 0.25

RECOMMENDED PCB THICKNESS: 1.5 – 1.6 mm

5.00

Optical/Electrical Characteristics (at Tc = 5°C to 45°C):

Parameter Symbol Min. Typ. Max. Units Notes

Peak Wavelength l832 842 865 nm

Maximum Radiant Power[1] LOP max 4.5 mW Maximum output power under any condition.

This is not a recommended operating condition

and does not meet eye safety requirements.

Wavelength Temperature Coefficient dl/dT 0.065 nm/ºC

Wavelength Current Coefficient dl/dI 0.21 nm/mA

Beam Divergence qFW@1/e^2 15 deg

Threshold Current I th 4.2 mA

Slope Efficiency SE 0.4 W/A

Forward Voltage[2] VF1.9 V At 500 µW output power

Comments:

VCSELs are sorted into bins as specified in the power adjustment procedure

section in the ADNS-6XXX laser sensor datasheets. Appropriate binning resis-

tor and register data values are used in the application circuit to achieve the

target output power.

Danger:

When driven with current or temperature range greater than specified in the

power adjustment procedure section, eye safety limits may be exceeded. At

this level, the VCSEL should be treated as a Class IIIb laser, potentially an eye

safety hazard.

Typical Characteristics

Figure 29. Forward voltage vs. forward current . Figure 30. Optical power vs. forward current.

FORWARD VOLTAGE (V)

FORWARD CURRENT (I

)

2.5

1.0

1.5

2.0

6810

0.5

OPTICAL POWER, LOP (mW)

FORWARD CURRENT, IF (mA)

4.5

4.0

3.0

2.0

1.0

1.5

2.5

3.5

15 20 25

0.5

105

Figure 32. Recommended reflow soldering profile.

Figure 31. Junction temperature rise vs. forward current.

TEMPERATURE (°C)

TIME

108 129 150 171 192

213 235 256 278

255°C

250°C

217°C

125°C

40°C

299 320 341 363 384

300

100

150

250

66 87

4522

200 60-150 SEC

10-20 SEC

120 SEC

TEMPERATURE RISE (°C)

I (mA)

56789

10 11 12 13 14

Description

The Avago Technologies ADNS-6120 and ADNS-6130-001 laser mouse lens

are designed for use with Avago Technologies laser mouse sensors and the

illumination subsystem provided by the ADNS-6230-001 VCSEL assembly

clip and the ADNV-6340 Single-Mode Vertical-Cavity Surface Emitting

Lasers (VCSEL). Together with the VCSEL, the ADNS-6120 or ADNS-6130-001

laser mouse lens provides the directed illumination and optical imaging

necessary for proper operation of the laser mouse sensor. ADNS-6120 or

ADNS-6130-001 laser mouse lens is a precision molded optical component

and should be handled with care to avoid scratching of the optical surfaces.

Part Number Description

ADNS-6120 Laser Mouse Round Lens

ADNS-6130-001 Laser Mouse Trim Lens

Figure 33. ADNS-6120 laser mouse round lens outline drawings and details.

ADNS-6120 and ADNS-6130-001

Laser Mouse Lens

Data Sheet

BWXYZ

31.00

∅

8.25

(0.325)

2.05 ± 0.03

(0.081 ± 0.001)

1.30 ± 0.03

(0.051 ± 0.001)

NOTES:

1. DIMENSIONS IN MILLIMETERS (INCHES).

2. DIMENSIONAL TOLERANCE: ±0.01 mm.

3. ANGULAR TOLERANCE ± 3.0°.

4. MAXIMUM FLASH +0.20 mm.

16.50

(0.650)

LENS SURFACE 1

LENS SURFACE 4

LENS SURFACE 3

LENS SURFACE 2

21.50°

SECTION A-A

33.00

(1.299)

Figure 34. ADNS-6130-001 laser mouse trim lens outline drawings and details.

Mechanical Assembly Requirements

All specifications reference Figure 35, Optical System Assembly Diagram

Parameters Symbol Min. Typical Max. Units Notes

Distance from Object Surface to Lens A 2.18 2.40 2.62 mm For ADNS-6120 and ADNS-6130-001

Reference Plane

Distance from Mouse Sensor Lid Surface B 10.65 mm Sensor lid must be in contact with lens housing

to Object Surface surface

Figure 35. Optical system assembly cross-section diagram.

MOUSE SENSOR LID

ADNS-6120

OBJECT SURFACE

16.34

(0.643)

VCSEL LENS SURFACE

IMAGING LENS SURFACE 1

IMAGING LENS SURFACE 2

VCSEL LENS SURFACE 2

21.50°

SECTION A-A

27.95

(1.100)

12.00

(0.472)

8.25

(0.325)

1.30

(0.051)

2.05

(0.081)

NOTES:

1. DIMENSIONS IN MILLIMETERS (INCHES).

2. DIMENSIONAL TOLERANCE: ±0.10 mm.

3. ANGULAR TOLERANCE: ± 3.0°.

4. MAXIMUM FLASH: +0.20 mm.

Figure 36. Avago’s logo locations.

Lens Design Optical Performance Specifications

All specifications are based on the Mechanical Assembly Requirements.

Parameters Symbol Min. Typical Max. Units Conditions

Design Wavelength l842 nm

Lens Material* Index of Refraction N 1.5693 1.5713 1.5735 l = 842 nm

*Lens material is polycarbonate. Cyanoacrylate based adhesives should not be used as they will cause lens material deformation.

BWXYZ

LOGO

Figure 37. Illustration of base plate mounting features for ADNS-6120 laser mouse round lens.

Figure 38. Illustration of base plate mounting features for ADNS-6130-001 laser mouse trim lens.

Mounting Instructions for the ADNS-6120 and

ADNS-6130-001 Laser Mouse Lenses to the Base Plate

An IGES format drawing file with design specifications for laser mouse base

plate features is available. These features are useful in maintaining proper

positioning and alignment of the ADNS-6120 or ADNS-6130-001 laser mouse

lens when used with the Avago Technologies Laser Mouse Sensor. This

file can be obtained by contacting your local Avago Technologies sales

representative.

ADNS-6230-001

Laser Mouse V CSEL Assembly Chip

Data Sheet

Description

The Avago Technologies ADNS-6230-001 VCSEL Assembly Clip is designed

to provide mechanical coupling of the ADNV-6340 VCSEL to the ADNS-6120

or ADNS-6130-001 Laser Mouse Lens. This coupling is essential to achieve

the proper illumination alignment required for the sensor to operate on a

wide variety of surfaces.

Figure 39. Outline drawing for ADNS-6230-001 VCSEL assembly clip.

8.37

(0.329) 10.60

(0.417)

1.65

(0.065)

9.60

(0.378)

7.60

(0.299)

10.40

(0.409)

CA1

12.20

(0.480)

8.80

(0.346)

3.30

(0.130)

CAVITY NUMBER

CLIP ID

NOTES:

1. DIMENSIONS IN MILLIMETERS (INCHES).

2. DIMENSIONAL TOLERANCE: ±0.10 mm.

3. MAXIMUM FLASH: ±0.20 mm.

For product information and a complete list of distributors, please go to our website: www.avagotech.com

Avago, Avago Technologies, and the A logo are trademarks of Avago Technologies, Pte. in the United States and other countries.

AV01-0036EN February 23, 2006