RT8292AHZSP - Richtek Technology - Datasheet.Directory

RT8292A

DS8292A-04 October 2016 www.richtek.com

Design

Tools Sample &

Buy

Ordering Information

Note :

Richtek products are :

 RoHS compliant and compatible with the current require-

ments of IPC/JEDEC J-STD-020.

 Suitable for use in SnPb or Pb-free soldering processes.

Pin Configurations

(TOP VIEW)

Applications

 Wireless AP/Router

Set-Top-Box

Industrial a nd Commercial Low Power Syste ms

LCD Monitors and TVs

Green Electronics/Applia nces

Point of Load Regulation of High-Performa nce DSPs

SOP-8 (Exposed Pad)

2A, 23V, 340kHz Synchronous Step-Down Converter

General Description

The RT8292A is a high efficiency , monolithic synchronous

step-down DC/DC converter that can deliver up to 2A

output current from a 4.5V to 23V input supply. The

RT8292A's current mode architecture and external

compensation allow the transient response to be

optimized over a wide range of loads and output capacitors.

Cycle-by-cycle current limit provides protection against

shorted outputs and soft-start eliminates input current

surge during start-up. The RT8292A also provides under

voltage protection and thermal shutdown prptection. The

low current (<3μA) shutdown mode provides output

disconnection, enabling easy power management in

battery-powered systems. The RT8292A is available in

a n SOP-8 (Exposed Pad) pa ckage.

Features



 ±±

±±

±1.5% High Accuracy Feedback Voltage



 4.5V to 23V Input Voltage Range



 2A Output Current



 Integrated N-MOSFET Switches



 Current Mode Control



 Fixed Frequency Operation : 340kHz



 Output Adjustable from 0.8V to 20V



 Up to 95% Efficiency



 Programmable Soft-Start



 Stable with Low-ESR Ceramic Output Capacitors



 Cycle-by-Cycle Over Current Protection



 Input Under Voltage Lockout



 Output Under Voltage Protection



 Thermal Shutdown Protection



 RoHS Compliant and Halogen Free

BOOT

VIN

GND

COMP

GND

Marking Information

RT8292AxGSP : Product Number

x : H or L

YMDNN : Date Code

RT8292AxZSP : Product Number

x : H or L

YMDNN : Date Code

RT8292Ax

GSPYMDNN

RT8292Ax

ZSPYMDNN

RT8292AxGSP RT8292AxZSP

Package Type

SP : SOP-8 (Exposed Pad-Option 1)

RT8292A

Lead Plating System

G : Green (Halogen Free and Pb Free)

Z : ECO (Ecological Element with

Halogen Free and Pb free)

H : UVP Hiccup

L : UVP Latch-Off

RT8292A

2DS8292A-04 October 2016www.richtek.com

Functional Pin Description

Pi n No. Pi n Name Pin Function

1 BOOT

Bootstrap for High Side Gate Driver. Connect a 0.1F or greater ceramic

c apa ci tor from BOOT to S W p ins .

2 VIN

Input Supply Voltage, 4.5V to 23V. Must bypass with a suitably large ceramic

capacitor.

3 SW Phase Node. C onnect this pin t o an external L- C filter.

9 (E xp osed P ad) GND G r ound. The exposed pad mu s t be sol der ed to a lar ge P CB and connected to

G N D fo r maxi mu m pow er d issipat io n.

5 FB

Feed back I nput pi n. This pin i s connect ed to the converter out put . It is used t o

set the out put of the converter to r egulat e to the desired value via an int er nal

resistive voltage divider. For an adjustable output, an external resistive

vol tage divi der is connected to this pin.

6 COMP

Compensation Node. COMP is used to compensate the regulation control

loop. Connect a series RC network from COMP to GND. In some cases, an

additional capacitor from COMP to GND is requir ed.

7 EN Enable Input Pin. A logic high enables the converter; a logic low forces the

RT8292A into shutdown mode reducing the supply current to less than 3A.

Attach this pin t o VI N wi th a 100k pull up re sist or for au to matic st ar tup.

8 SS Soft-Start Contr ol Input. SS controls the soft-start period. Connect a capacitor

from SS to GND to set the soft-start period. A 0.1F capacitor sets the

s oft-st a rt per i o d to 1 3 .5 ms .

Typical Application Circuit

VOUT (V) R1 (k) R2 (k) RC (k) CC (nF) L (H) COUT (F)

8 27 3 27 3.3 22 22 x 2

5 62 11.8 20 3.3 15 22 x 2

3.3 75 24 13 3.3 10 22 x 2

2.5 25.5 12 9. 1 3.3 6.8 22 x 2

1.5 10.5 12 4. 7 3.3 3.6 22 x 2

1.2 12 24 3.6 3.3 3.6 22 x 2

1 3 12 3 3.3 2 22 x 2

VIN

GND

BOOT

10µH

100nF

22µF x 2

75k

24k

VOUT

3.3V/2A

10µF

VIN

4.5V to 23V RT8292A

CSS

COMP

3.3nF RC

13k

Open

4, 9 (Exposed Pad)

CBOOT

CIN

0.1µF

COUT

REN 100k

Table 1. Recommended Component Selection

RT8292A

DS8292A-04 October 2016 www.richtek.com

Function Block Diagram

Comparator

Oscillator

Foldback

Control

0.4V

Internal

Regulator

2.7V

Shutdown

Comparator

Current Sense

Amplifier

BOOT

VIN

GND

COMP

VA VCC

6µA

Slope Comp

Current

Comparator

-EA

0.8V

1.2V

Lockout

Comparator

VCC

130m

RT8292A

4DS8292A-04 October 2016www.richtek.com

Electrical Characteristics

(VIN = 12V, TA = 25°C, unless otherwise specified)

Absolute Maximum Ratings (Note 1)

Supply Voltage, VIN ------------------------------------------------------------------------------------------------- −0.3V to 25V

Input Voltage, SW--------------------------------------------------------------------------------------------------- −0.3V to (VIN + 0.3V)

VBOOT - VSW ----------------------------------------------------------------------------------------------------------- −0.3V to 6V

 Other Pin Voltages ------------------------------------------------------------------------------------------------- −0.3V to 6V

Power Dissipation, PD @ TA = 25°C

SOP-8 (Exposed Pad) --------------------------------------------------------------------------------------------- 1.333W

Pack age Thermal Resista nce (Note 2)

SOP-8 (Exposed Pad), θJA ---------------------------------------------------------------------------------------- 75°C/W

SOP-8 (Εxposed Pad), θJC --------------------------------------------------------------------------------------- 15°C/W

Lead Temperature (Soldering, 10 sec.)------------------------------------------------------------------------- 260°C

Junction T emperature----------------------------------------------------------------------------------------------- 150°C

Storage T emperature Range -------------------------------------------------------------------------------------- −65°C to 150°C

ESD Susceptibility (Note 3)

HBM (Human Body Mode) ---------------------------------------------------------------------------------------- 2kV

MM (Ma chine Mode) ------------------------------------------------------------------------------------------------ 200V

Recommended Operating Conditions (Note 4)

Supply Voltage, VIN ------------------------------------------------------------------------------------------------- 4.5V to 23V

Junction T emperature Range-------------------------------------------------------------------------------------- −40°C to 125°C

Ambient T emperature Range-------------------------------------------------------------------------------------- −40°C to 85°C

Parameter Symbol Test Conditions Min Typ Max Unit

Shutdown Supply Curr ent VEN = 0 V - - 0.5 3 A

Supply Curr ent VEN = 3 V, VFB = 0. 9V - - 0.8 1. 2 mA

Feedback Voltage V FB 4.5V  VIN 23V 0.788 0.8 0.812 V

Er ro r Ampl if ier

Transconductance GEA IC = ± 10 A -- 940 -- A/V

H igh Side Sw it ch

On-Resistance RDS(ON)1 -- 130 -- m

Low Si de S wi t ch

On-Resistance RDS(ON)2 -- 130 -- m

H igh Side Sw it ch Leakage

Current V

EN = 0V, VSW = 0V -- 0 10 A

Upper Switch Current Limit Min. Duty Cycle, VBOOTVSW = 4.8 V -- 4.3 -- A

Lower Switch Current Lim it Fr om Dr ain t o Source -- 1.3 -- A

CO MP to Current Sense

Transconductance GCS -- 4 -- A/V

Oscill at ion Fr equency fOSC1 300 340 380 kHz

S hor t Ci r cuit O scill ation

Frequency fOSC2 V

FB = 0 V -- 1 00 -- k H z

Maximum Du ty C ycle DMAX V

FB = 0 . 7V -- 93 -- %

Minimum On Time tON -- 100 -- ns

RT8292A

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Parameter Symbol Test Conditions Min Typ Max Unit

Logic-High VIH 2.7 -- 5.5

E N Input Threshold

Vol tage Logic-Low VIL -- -- 0.4

Input Under Vol tage Lockout Threshold VUVLO V

IN Ri sing 3.8 4.2 4.5 V

I nput Und er Volt age L oc kout Hyst er esis VUVLO -- 320 -- mV

Soft-Start Current ISS V

SS = 0V -- 6 -- A

Soft-S tart Period tSS C

SS = 0 .1 F -- 13.5 -- ms

Ther mal Shutdown TSD -- 150 -- C

Note 1. Stresses listed as the above "Absolute Maximum Ratings" may cause permanent damage to the device. These are for

stress ratings. Functional operation of the device at these or any other conditions beyond those indicated in the

operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended

periods may remain possibility to affect device reliability.

Note 2. θJA is measured in the natural convection at TA = 25 °C on a high effective thermal conductivity four -layer test board of

JEDEC 51-7 thermal measurement standard. The measurement case position of θJC is on the exposed pad of the

package.

Note 3. Devices are ESD sensitive. Handling precaution is recommended.

Note 4. The device is not guaranteed to function outside its operating conditions.

RT8292A

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Typical Operating Characteristics

Efficiency vs. Output Current

100

0 0.25 0.5 0.75 1 1.25 1.5 1.75 2

Output Current (A)

Effi ciency (% )

VIN = 4.5V

VIN = 12V

VIN = 23V

VOUT = 3.3V

Referenc e Voltage vs . Input Voltage

0.780

0.785

0.790

0.795

0.800

0.805

0.810

0.815

0.820

4 6 8 1012141618202224

In put Volt age ( V)

Reference Volt age (V)

Reference Voltage vs. Temperature

0.780

0.785

0.790

0.795

0.800

0.805

0.810

0.815

0.820

-50 -25 0 25 50 75 100 125

Temperatur e (°C)

Reference Vol tage (V)

Output Voltage vs. Output Current

3.290

3.293

3.295

3.298

3.300

3.303

3.305

3.308

3.310

0 0.25 0.5 0.75 1 1.25 1.5 1.75 2

Output Current (A)

Output Vol tage (V)

VIN = 4.5V

VIN = 12V

VIN = 23V

VOUT = 3.3V

Frequency vs. Input Voltage

300

310

320

330

340

350

360

370

380

4 6 8 1012141618202224

Input V o lt age (V)

Fr equency (kHz) 1

VOUT = 3.3V, I OUT = 0A

Frequency vs. Tem pe rature

300

310

320

330

340

350

360

370

380

-50 -25 0 25 50 75 100 125

Temperature (°C)

Fr equency (kHz

)

VIN = 12V, VOUT = 3.3V, IOUT = 0A

RT8292A

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Current Limit vs. Te m pe rature

3.00

3.25

3.50

3.75

4.00

4.25

4.50

4.75

5.00

5.25

5.50

5.75

6.00

-50 -25 0 25 50 75 100 125

Temprature (°C)

Current Limi t ( A)

VIN = 12V, VOUT = 3.3V

Load Transient Response

Time (100μs/Div)

VOUT

(100mV/Div)

IOUT

(1A/Div)

VIN = 12V, VOUT = 3.3V, IOUT = 0A to 2A

Load Transient Response

Time (100μs/Div)

VIN = 12V, VOUT = 3.3V, IOUT = 1A to 2A

IOUT

(1A/Div)

VOUT

(100mV/Div)

Switching

Time (1μs/Div)

VIN = 12V, VOUT = 3.3V, IOUT = 2A

(1A/Div)

VOUT

(10mV/Div)

VSW

(10V/Div)

Power Off from VIN

Time (10ms/Div)

(2A/Div)

VOUT

(2V/Div)

VIN

(5V/Div)

VIN = 12V, VOUT = 3.3V, IOUT = 2A

Power On from VIN

Time (10ms/Div)

VIN = 12V, VOUT = 3.3V, IOUT = 2A

(2A/Div)

VOUT

(2V/Div)

VIN

(5V/Div)

RT8292A

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Power On from EN

Time (10ms/Div)

VOUT

(2V/Div)

VEN

(2V/Div)

(1A/Div) VIN = 12V, VOUT = 3.3V, IOUT = 2A

Power Off from EN

Time (10ms/Div)

VIN = 12V, VOUT = 3.3V, IOUT = 2A

VOUT

(2V/Div)

VEN

(2V/Div)

(1A/Div)

RT8292A

DS8292A-04 October 2016 www.richtek.com

Application Information

The RT8292A is a synchronous high voltage buck converter

that can support the input voltage range from 4.5V to 23V

a nd the output current ca n be up to 2A.

Output Voltage Setting

The resistive voltage divider allows the FB pin to sense

the output voltage a s shown in Figure 1.

Figure 1. Output Voltage Setting

The output voltage is set by a n external resistive voltage

divider a ccording to the following equation :









OUT FB R1

V = V1

where VFB is the feedback reference voltage (0.8V typ.).

External Bootstrap Diode

Connect a 100nF low ESR ceramic capacitor between

the BOOT pin and SW pin. This capacitor provides the

gate driver voltage for the high side MOSFET.

It is recommended to add an external bootstrap diode

between an external 5V and BOOT pin for efficiency

improvement when input voltage is lower than 5.5V or duty

ratio is higher than 65% .The bootstrap diode can be a

low cost one such as IN4148 or BA T54. The external 5V

ca n be a 5V fixed input from system or a 5V output of the

RT8292A. Note that the external boot voltage must be

lower than 5.5V .

Figure 2. External Bootstra p Diode

Soft-Start

The RT8292A contains an external soft-start clamp that

gradually raises the output voltage. The soft-start timing

can be programmed by the external capacitor between

SS pin and GND. The chip provides a 6μA charge current

for the external capacitor. If 0.1μF capacitor is used to

set the soft-start, the period will be 13.5ms(typ.).

Chip Enable Operation

The EN pin is the chip enable input. Pulling the EN pin

low (<0.4V) will shut down the device. During shutdown

mode, the RT8292A quiescent current drops to lower than

3μA. Driving the EN pin high (>2.7V, < 5.5V) will turn on

the device again. For external timing control (e.g.RC),

the EN pin can also be externally pulled high by adding a

REN* resistor and CEN* capacitor from the VIN pin

(see Figure 5).

An external MOSFET ca n be added to i mplement digital

control on the EN pin when no system voltage above 2.5V

is available, as shown in Figure 3. In this case, a 100kΩ

pull-up resistor, REN, is connected between VIN and the

EN pin. MOSFET Q1 will be under logic control to pull

down the EN pin.

Figure 3. Enable Control Circuit for Logic Control with

Low V oltage

To prevent enabling circuit when VIN is smaller than the

VOUT target value, a resistive voltage divider can be placed

between the input voltage a nd ground and connected to

the EN pin to adjust IC lockout threshold, as shown in

Figure 4. For exa mple, if an 8V output voltage is regulated

from a 12V input voltage, the resistor REN2 can be selected

to set input lockout threshold larger than 8V.

RT8292A

GND

VOUT

BOOT

RT8292A 100nF

VIN

GND

BOOT

VOUT

Chip Enable

VIN RT8292A

CSS COMP CCRC

CBOOT

COUT

CIN

REN

100k

9 (Exposed Pad)

RT8292A

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Having a lower ripple current reduces not only the ESR

losses in the output ca pacitors but also the output voltage

ripple. High frequency with small ripple current can achieve

highest efficiency operation. However , it requires a large

inductor to a chieve this goal.

For the ripple current selection, the value of ΔIL = 0.24(IMAX)

will be a reasonable starting point. The largest ripple

current occurs at the highest VIN. To guarantee that the

OUT OUT

L(MAX) IN(MAX)

L = 1

fI V

 



 



 

The inductor's current rating (caused a 40°C temperature

rising from 25°C ambient) should be greater than the

maximum load current and its saturation current should

be greater than the short circuit peak current limit. Plea se

see Table 2 for the inductor sele ction reference.

Table 2. Suggested Inductors for Typical

Application Circuit

Compo nen t

Supplier Series Dimensions

(mm)

TDK VLF10045 10 x 9.7 x 4.5

TDK SLF 12565 12.5 x 12.5 x 6.5

TAIYO

YUDEN NR8040 8 x 8 x 4

OUT IN

RMS OUT(MAX) IN OUT

I = I 1



This formula has a maximum at VIN = 2VOUT, where

IRMS = IOUT/2. This simple worst-case condition is

commonly used for design because even significant

deviations do not offer much relief.

Choose a capacitor rated at a higher temperature than

required. Several capacitors may also be paralleled to

meet size or height requirements in the design.

For the input capacitor, one 10μF low ESR ceramic

capacitors are recommended. For the recommended

ca p a citor , plea se refer to ta ble 3 for more detail.

The selection of COUT is determined by the required ESR

to minimize voltage ripple.

Moreover, the amount of bulk capacitance is also a key

for COUT selection to ensure that the control loop is stable.

Loop stability can be checked by viewing the load transient

CIN and COUT Selection

The input capacitance, CIN, is needed to filter the

tra pezoidal current at the source of the high side MOSFET .

To prevent large ripple current, a low ESR input ca pacitor

sized for the maximum RMS current should be used. The

RMS current is given by :

OUT OUT

LIN

I = 1

fL V

 



 



 

Hiccup Mode

For the RT8292AH, Hiccup Mode Under V oltage Protection

(UVP) is provided. When the FB voltage drops below half

of the feedback reference voltage, VFB, the UVP function

will be triggered a nd the R T8292AH will shut down f or a

period of time and then recover automatically . The Hiccup

Mode UVP can reduce input current in short-circuit

conditions.

Latch-Off Mode

For the RT8292AL, Latch-Off Mode Under Voltage

Protection (UVP) is provided. When the FB voltage drops

below half of the feedback reference voltage, VFB, UVP

will be triggered and the RT8292AL will shutdown in Latch-

Off Mode. In shutdown condition, the R T8292AL can be

reset via the EN pin or power input VIN.

Inductor Selection

The inductor value and operating frequency determine the

ripple current according to a specific input and output

voltage. The ripple current ΔIL increases with higher VIN

and decrea ses with higher inductance.

Figure 4. The Resistors can be Selected to Set IC

Lockout Threshold

ripple current stays below the specified maximum, the

inductor value should be chosen according to the following

equation :

VIN

GND

BOOT

VOUT

VIN

RT8292A

CSS COMP CCRC

CBOOT

COUT

CIN

100k 8V

12V

REN2

REN1 10µF

9 (Exposed Pad)

RT8292A

DS8292A-04 October 2016 www.richtek.com

OUT L OUT

VIESR

8fC



 





The output ripple will be highest at the maximum input

voltage since ΔIL increases with input voltage. Multiple

capa citors pla ced in parallel may be needed to meet the

ESR and RMS current handling requirement. Dry tantalum,

special polymer, aluminum electrolytic and ceramic

capacitors are all available in surface mount

pa ckages.Special polymer ca pa citors offer very low ESR

value. However, it provides lower ca pacitance density than

other types. Although T antalum capacitors have the highest

ca p a cita nce density, it is importa nt to only use types that

pass the surge test for use in switching power supplies.

Aluminum electrolytic ca pacitors have significantly higher

ESR. However, it can be used in cost-sensitive a pplications

for ripple current rating and long term reliability

considerations. Ceramic capacitors have excellent low

ESR characteristics but can have a high voltage coefficient

and audible piezoelectric effe cts. The high Q of ceramic

ca pacitors with trace inductance can also lead to significant

ringing.

Higher values, lower cost ceramic capacitors are now

becoming available in smaller ca se sizes. Their high ripple

current, high voltage rating and low ESR make them ideal

for switching regulator applications. However, care must

be taken when these capacitors are used at input and

output. When a ceramic capacitor is used at the input

a nd the power is supplied by a wall ada pter through long

wires, a load ste p at the output ca n induce ringing at the

input, VIN. At best, this ringing can couple to the output

response as described in a later section.

The output ripple, ΔVOUT , is determined by :

and be mistaken as loop instability. At worst, a sudden

inrush of current through the long wires can potentially

cause a voltage spike at VIN large enough to da mage the

part.

Checking Tran sient Re spon se

The regulator loop response can be checked by looking

at the load tra nsient response. Switching regulators ta ke

several cycles to respond to a step in load current. When

a load step occurs, VOUT immediately shifts by a n amount

equal to ΔILOAD (ESR) and COUT also begins to be charged

or discharged COUT to generate a feedba ck error signal

for the regulator to return VOUT to its steady-state value.

During this recovery time, VOUT can be monitored for

overshoot or ringing that would indicate a stability problem.

EMI Consideration

Since para sitic inductance a nd capacitance effects in PCB

circuitry would cause a spike voltage on SW pin when

high side MOSFET is turned-on/off, this spike voltage on

SW may impact on EMI performance in the system. In

order to enhance EMI performance, there are two methods

to suppress the spike voltage. One way is by pla cing an

R-C snubber between SW a nd GND and locking them a s

close as possible to the SW pin (see Figure 5). Another

method is by adding a resistor in series with the bootstrap

ca pacitor , CBOOT, but this method will decrea se the driving

capability to the high side MOSFET. It is strongly

recommended to reserve the R-C snubber during PCB

layout for EMI improvement. Moreover , reducing the SW

trace area and keeping the main power in a small loop will

be helpful on EMI perf orma nce. For detailed PCB layout

guide, plea se refer to the section Layout Considerations.

Figure 5. Reference Circuit with Snubber and Enable Timing Control

VIN

GND

BOOT

10µH

100nF

22µFx2

75k

24k

VOUT

3.3V/2A

10µF

Chip Enable

VIN

4.5V to 23V RT8292A

CSS

0.1µF COMP

3.3nF RC

13k

9 (Exposed Pad)

CBOOT

COUT

CIN

RBOOT*

RS*

CS*

REN*

CEN*

* : Optional

RT8292A

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Figure 7. Derating Curves for RT8292A Package

(a) Copper Area = (2.3 x 2.3) mm2, θJA = 75°C/W

(b) Copper Area = 10mm2, θJA = 64°C/W

Thermal Considerations

For continuous operation, do not exceed the maximum

operation junction temperature 125°C. The maximum

power dissipation depends on the thermal resistance of

IC pa ckage, PCB layout, the rate of surroundings airflow

and temperature difference between junction to a mbient.

The maximum power dissipation can be calculated by

following formula :

PD(MAX) = (TJ(MAX) − TA ) / θJA

where TJ(MAX) is the maximum operation junction

temperature , TA is the a mbient temperature and the θJA is

the junction to ambient thermal resistance.

For recommended operating conditions specification of

RT8292A, the maximum junction temperature is 125°C.

The junction to ambient thermal resistance θJA is layout

dependent. For SOP-8 (Exposed Pad) package, the

thermal resistance θJA is 75°C/W on the standard JEDEC

51-7 four-layers thermal test board. The maximum power

dissipation at TA = 25°C can be calculated by following

formula :

PD(MAX) = (125°C − 25°C) / (75°C/W) = 1.333W

(min.copper area PCB layout)

PD(MAX) = (125°C − 25°C) / (49°C/W) = 2.04W

(70mm2copper area PCB layout)

The thermal resistance θJA of SOP-8 (Exposed Pad) is

determined by the package architecture design and the

PCB layout design. However, the package architecture

design had been designed. If possible, it's useful to

increa se thermal perf ormance by the PCB layout copper

design. The thermal resistance θJA can be decreased by

adding copper area under the exposed pad of SOP-8

(Exposed Pad) pa ckage.

As shown in Figure 6, the a mount of copper area to which

the SOP-8 (Exposed Pad) is mounted affects thermal

performance. When mounted to the standard

SOP-8 (Exposed Pad) pad (Figure 6a), θJA is 75°C/W.

Adding copper area of pad under the SOP-8 (Exposed

Pad) (Figure 6.b) reduces the θJA to 64°C/W. Even further,

increasing the copper area of pad to 70mm2 (Figure 6.e)

reduces the θJA to 49°C/W.

The maximum power dissipation depends on operating

ambient temperature for fixed TJ(MAX) and thermal

resista nce θJA. For RT8292A packages, the derating curves

in Figure 7 allow the designer to see the effect of rising

a mbient temperature on the maximum power dissi pation

allowed.

0.0

0.2

0.4

0.6

0.8

1.0

1.2

1.4

1.6

1.8

2.0

2.2

0 25 50 75 100 125

Ambient Tem peratu re (°C)

Power Dissipat ion (W )

Copper Area

70mm2

50mm2

30mm2

10mm2

Min.Layout

Four Layer PCB

RT8292A

DS8292A-04 October 2016 www.richtek.com

(d) Copper Area = 50mm2 , θJA = 51°C/W (e) Copper Area = 70mm2 , θJA = 49°C/W

Figure 6. Themal Resista nce vs. Copper Area Layout Design

Figure 8. PCB Layout Guide

Table 3. Suggested Capacitors for CIN and COUT

Location Co mpo nent Supplier P art No. Capacitance (F) Case Size

CIN MURATA GRM31CR61E106K 10 1206

CIN TDK C3225X5R1E106K 10 1206

CIN TAIYO YUDEN TMK316BJ106ML 10 1206

COUT MURATA GRM31CR60J476M 47 1206

COUT TDK C3225X5R0J476M 47 1210

COUT MURATA GRM32ER71C226M 22 1210

COUT TDK C3225X5R1C22M 22 1210

Layout Considerations

For best performa nce of the R T8292A, the following layout gi idelines must be strictly followed.

Input capacitor must be placed as close to the IC as possible.

SW should be connected to inductor by wide a nd short trace. Keep sensitive components away from this tra ce.

The feedba ck components must be connected as close to the device as possible

VIN

VOUT

GND

VOUT

COUT L1

Input capacitor must

be placed as close

to the IC as possible.

SW should be connected to inductor by

wide and short trace. Keep sensitive

components away from this trace.

The feedback components

must be connected as close

to the device as possible.

BOOT

VIN

GND

COMP

GND

CSS

RSCS

GND

VIN

REN

CIN

RT8292A

14 DS8292A-04 October 2016www.richtek.com

Richtek Technology Corporation

14F, No. 8, Tai Yuen 1st Street, Chupei City

Hsinchu, Taiwan, R.O.C.

Tel: (8863)5526789

Richtek products are sold by description only. Richtek reserves the right to change the circuitry and/or specifications without notice at any time. Customers should

obtain the latest relevant information and data sheets before placing orders and should verify that such information is current and complete. Richtek cannot

assume responsibility for use of any circuitry other than circuitry entirely embodied in a Richtek product. Information furnished by Richtek is believed to be

accurate and reliable. However, no responsibility is assumed by Richtek or its subsidiaries for its use; nor for any infringements of patents or other rights of third

parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Richtek or its subsidiaries.

Outline Dimension

EXPOSED THERMAL PAD

(Bottom of Package)

8-Lead SOP (Exposed Pad) Plastic Package

Symbol Dimensions In Millimeters Dimensions In Inches

Min Max Min Max

A 4.801 5.004 0.189 0.197

B 3.810 4.000 0.150 0.157

C 1.346 1.753 0.053 0.069

D 0.330 0.510 0.013 0.020

F 1.194 1.346 0.047 0.053

H 0.170 0.254 0.007 0.010

I 0.000 0.152 0.000 0.006

J 5.791 6.200 0.228 0.244

M 0.406 1.270 0.016 0.050

Option 1 X 2.000 2.300 0.079 0.091

Y 2.000 2.300 0.079 0.091

Option 2 X 2.100 2.500 0.083 0.098

Y 3.000 3.500 0.118 0.138