NC7WZ16P6X_NL - Fairchild Semiconductor

September 2009

NC7WZ16 • Rev. 1.0.3

NC7WZ16 — TinyLogic

®

UHS Dual Buffer

NC7WZ16

TinyLogic® UHS Dual Buffer

Features

 Ultra-High Speed: tPD 2.4ns (Typical) into 50pF at

5V VCC

 High Output Drive: ±24mA at 3V VCC

 Broad VCC Operating Range: 1.65V to 5.5V

 Matches Performance of LCX when Operated at

3.3V VCC

 Power Down High-Impedance Inputs/Outputs

 Over-Voltage Tolerance Inputs Facilitate 5V to 3V

Translation

 Proprietary Noise/EMI Reduction Circuitry

 Ultra-Small MicroPak™ Packages

 Space-Saving SC70 Package

Description

The NC7WZ16 is a dual buffer from Fairchild’s Ultra-

High Speed Series of TinyLogic®. The device is

fabricated with advanced CMOS technology to achieve

ultra-high speed with high output drive while maintaining

low static power dissipation over a very broad VCC

operating range. The device is specified to operate over

the 1.65V to 5.5V VCC range. The inputs and outputs are

high impedance when VCC is 0V. Inputs tolerate

voltages up to 7V independent of VCC operating voltage.

Ordering Information

Part Number Top Mark Eco Status Package Packing Method

NC7WZ16P6X Z16 RoHS 6-Lead SC70, EIAJ SC-88a, 1.25mm Wide 3000 Units on

Tape & Reel

NC7WZ16L6X C7 RoHS 6-Lead MicroPak™, 1.00mm Wi de 5000 Units on

Tape & Reel

NC7WZ16FHX

(Preliminary) C7 Green

6-Lead, MicroPak2, 1x1mm Body, .35mm

Pitch 5000 Units on

Tape & Reel

For Fairchild’s defini t i on of Eco St atus, pleas e visit: http://www.fairchildsemi.com/company/green/rohs_green.html.

NC7WZ16 • Rev. 1.0.3 2

NC7WZ16 — TinyLogic

®

UHS Dual Buffer

Connection Diagrams IEEC/IEC

Figure 1. Logic Symbol

Pin Configurations

Figure 2. SC70 (Top View) Figure 3. MicroPak (Top Through View)

Notes:

1. AAA represents Product Code Top Mark (see ordering code).

2. Orientation of Top Mark determines Pin One location. Read the top product code mark left to right.

Pin One is the lower left pin. Figure 4. Pin 1 Orientation

Pin Definitions

Pin # SC70 Pin # MicroPak Name Description

1 1 A1 Input

2 2 GND Ground

3 3 A2 Input

4 4 Y2 Output

5 5 VCC Supply Voltage

6 6 Y1 Output

Function Table

Y= A

Inputs Output

A Y

L L

H H

H = HIGH Logic Level

L = LOW Logic Level

NC7WZ16 • Rev. 1.0.3 3

NC7WZ16 — TinyLogic

®

UHS Dual Buffer

Absolute Maximum Ratings

Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be

operable above the recommended operating conditions and stressing the parts to these levels is not recommended.

In addition, extended exposure to stresses above the recommended operating conditions may affect device

reliability. The absolute maximum ratings are stress ratings only.

Symbol Parameter Min. Max. Unit

VCC Supply Voltage -0.5 7.0 V

VIN DC Input Voltage -0.5 7.0 V

VOUT DC Output Voltage -0.5 7.0 V

IIK DC Input Diode Current VIN < 0V -50 mA

IOK DC Output Diode Current VOUT < 0V -50 mA

IOUT DC Output Source / Sink Current ±50 mA

ICC or IGND DC VCC or Ground Current ±100 mA

TSTG Storage Temperature Range -65 +150 °C

TJ Junction Temperature Under Bias +150 °C

TL Junction Lead Temperature (Soldering, 10 Seconds) +260 °C

SC70-6 180

MicroPak-6 130

PD Power Dissipation MicroPak2-6 120

mW

Human Body Model, JEDEC:JESD22-A114 4000

ESD Charge Device Model, JEDEC:JESD22-C101 2000 V

Recommended Operating Conditions

The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended

operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not

recommend exceeding them or designing to Absolute Maximum Ratings.

Symbol Parameter Conditions Min. Max. Unit

Supply Voltage Operating 1.65 5.50

VCC Supply Voltage Data Retention 1.50 5.50 V

VIN Input Voltage 0 5.5 V

VOUT Output Voltage 0 VCC V

VCC=1.8V, 2.5V ±0.2V 0 20

VCC=3.3V ±0.3V 0 10

tr,tf Input Rise and Fall Times VCC=5.5V ±0.5V 0 5 ns/V

TA Operating Temperature -40 +125 °C

SC70-6 425

MicroPak-6 500

θJA Thermal Resistance MicroPak2-6 560

°C/W

Note:

3. Unused inputs must be held HIGH or LOW. They may not float.

NC7WZ16 • Rev. 1.0.3 4

NC7WZ16 — TinyLogic

®

UHS Dual Buffer

DC Electrical Characteristics

TA=25°C TA=-40 to +85°C

Symbol Parameter VCC (V) Conditions

Min. Typ. Max. Min. Max.

Units

1.65 to 1.95 0.75VCC 0.75VCC

VIH HIGH Level Cont rol

Input Vol tage 2.3 to 5.5 0.70VCC 0.70 VCC V

1.65 to 1.95 0.25VCC 0.25VCC

VIL LOW Level Control

Input Vol tage 2.3 to 5.5 0.30VCC 0.30VCC V

1.65 1.55 1.65 1.55

1.80 1.70 1.80 1.70

2.30 2.20 2.30 2.20

3.00 2.90 3.00 2.90

4.50

IOH=-100µA

4.40 4.50 4.40

1.65 IOH=-4mA 1.29 1.52 1.21

2.30 IOH=-8mA 1.90 2.14 1.90

3.00 IOH=-16mA 2.40 2.75 2.40

3.00 IOH=-24mA 2.30 2.62 2.30

VOH HIGH Level Output

Voltage

4.50

VIN=VIH

IOH=-32mA 3.80 4.13 3.80

V

1.65 0.00 0.10 0.10

1.80 0.00 0.10 0.10

2.30 0.00 0.10 0.10

3.00 0.00 0.10 0.10

4.50

IOL=100µA

0.00 0.10 0.10

1.65 IOL=4mA 0.08 0.24 0.24

2.30 IOL=8mA 0.10 0.30 0.30

3.00 IOL=16mA 0.16 0.40 0.40

3.00 IOL=24mA 0.24 0.55 0.55

VOL LOW Level Output

Voltage

4.50

VIN=VIL

IOL=32mA 0.25 0.55 0.55

V

IIN Input Leakage

Current 0 to 5.5 0 ≥ VIN ≥ 5.5V ±0.1 ±1.0 µA

IOFF Power Off Leakage

Current 0 VIN or VOUT=5.5V 1.0 10 µA

ICC Quiescent Supply

Current 1.65 to 5.50 VIN=5.5V, GND 1. 0 10 µA

NC7WZ16 • Rev. 1.0.3 5

NC7WZ16 — TinyLogic

®

UHS Dual Buffer

AC Electrical Characteristics

TA=25°C TA=-40 to +85°C

Symbol Parameter VCC (V) Conditions

Min. Typ. Max. Min. Max.

Units Figure

1.65 1.8 5.5 9.6 1.8 10.6

1.80 1.8 4.6 8.0 1.8 8.8

2.50 ± 0.20 1.0 3. 0 5.2 1.0 5.8

3.30 ± 0.30 0.8 2. 3 3.6 0.8 4.0

5.00 ± 0.50

CL=15pF,

RL=1MΩ

0.5 1.8 2.9 0.5 3.2

Figure 5

Figure 6

3.30 ± 0.30 1.2 3. 0 4.6 1.2 5.1

tPLH, tPHL Propagation Delay

5.00 ± 0.50 CL=50pF,

RL=500Ω 0.8 2.4 3.8 0.8 4.2

ns

Figure 5

Figure 6

CIN Input Capacitance 0.00 2.5 pF

3.30 10

CPD Power Dissipati on

Capacitance(4) 5.00 12 pF Figure 7

Note:

4. CPD is defined as the value of the internal equivalent capacitance which is derived from dynamic operating

current consumption (ICCD) at no output loading and operating at 50% duty cycle. CPD is related to ICCD dynamic

operating current by the expression: ICCD=(CPD)(VCC)(fIN)+(ICCstatic).

Note:

5. CL includes load and stray capacitance;

Input PRR=1.0MHz; tW=500ns

Figure 5. AC Test Circuit Figure 6. AC Waveforms

Note:

6. Input=AC Waveform; tr=tf=1.8ns; PRR=10 MHz Duty Cycle=50%.

Figure 7. ICCD Test Circuit

NC7WZ16 • Rev. 1.0.3 6

NC7WZ16 — TinyLogic

®

UHS Dual Buffer

Physical Dimensions

DETAIL A

SCALE: 60X

B

1.90

2.00±0.20

0.50 MIN

1.00

0.80

1.10

0.80

0.10 C

0.25

0.10

0.46

0.26

0.20

GAGE

PLANE (R0.10)

30°

0°

SEATING

PLANE

C0.10

0.00

NOTES: UNLESS OTHERWISE SPECIFIED

A) THIS PACKAGE CONFORMS TO EIAJ

SC-88, 1996.

B) ALL DIMENSIONS ARE IN MILLIMETERS.

C) DIMENSIONS DO NOT INCLUDE BURRS

OR MOLD FLASH.

D) DRAWING FILENAME: MKT-MAA06AREV6

2.10±0.30

0.10 AB

0.65

1.30

(0.25) 0.30

0.15

1

1.25±0.10

3

1.30 0.40 MIN

SEE DETAIL A

LAND PATTERN RECOMMENDATION

6

A

4

C

0.65 L

SYMM

PIN ONE

Figure 8. 6-Lead, SC70, EIAJ SC-88a, 1.25mm Wide

Pack age drawings are provided as a service to customers consideri ng Fai rchild components . Drawings may c hange i n any manner

without notice. P l ease note the revi sion and/or date on t he drawing and contac t a Fairchild S emiconductor represent ative to v er ify

or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically

the warranty therein, which covers Fairchild products.

Always visit Fairchild Semiconductor’ s online packaging area for the most recent package drawings:

http://www.fairchildsemi.com/packaging/.

Tape and Reel Specifications

Please visit Fairchild Semiconductor’s online packaging area for the most recent tape and reel specifications:

http://www.fairchildsemi.com/products/analog/pdf/sc70-6_tr.pdf.

Package Designator Tape Section Cavity Number Cavity Status Cover Type Status

Leader (Start End) 125 (Typical) Empty Sealed

Carrier 3000 Filled Sealed

P6X Trailer (Hub End) 75 (Typical) Empty Sealed

NC7WZ16 • Rev. 1.0.3 7

NC7WZ16 — TinyLogic

®

UHS Dual Buffer

Physical Dimensions

2. DIMENSIONS ARE IN MILLIMETERS

1. CONFORMS TO JEDEC STANDARD M0-252 VARIATION UAAD

MAC06AREVC

Notes:

3. DRAWING CONFORMS TO ASME Y14.5M-1994

TOP VIEW

RECOMMENED

LAND PATTERN

BOTTOM VIEW

1.45

1.00

A

B0.05 C

0.05 C

2X

0.55MAX

0.05 C

(0.49)

(1)

(0.75)

(0.52)

(0.30)

6X

1X

6X

PIN 1

DETAIL A

0.075 X 45

CHAMFER

0.25

0.15

0.35

0.25

0.40

0.30

0.5

(0.05)

1.0

5X

DETAIL A

PIN 1 TERMINAL

0.40

0.30

0.45

0.35

0.10

0.00

0.10 CBA

0.05 C

C0.05 C

0.05

0.00

5X

6X (0.13)

4X

6X

Figure 9. 6-Lead, MicroPak™, 1.0mm Wide

Pack age drawings are provided as a service to customers consideri ng Fai rchild components . Drawings may c hange i n any manner

without notice. P l ease note the revi sion and/or date on t he drawing and contac t a Fairchild S emiconductor representative to verify

or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically

the warranty therein, which covers Fairchild products.

Always visit Fairchild Semiconductor’ s online packaging area for the most recent package drawings:

http://www.fairchildsemi.com/packaging/.

Tape and Reel Specifications

Please visit Fairchild Semiconductor’s online packaging area for the most recent tape and reel specifications:

http://www.fairchildsemi.com/products/logic/pdf/micropak_tr.pdf.

Package Designator Tape Section Cavity Number Cavity Status Cover Type Status

Leader (Start End) 125 (Typical) Empty Sealed

Carrier 5000 Filled Sealed

L6X Trailer (Hub End) 75 (Typical) Empty Sealed

NC7WZ16 • Rev. 1.0.3 8

NC7WZ16 — TinyLogic

®

UHS Dual Buffer

Physical Dimensions

5X

DETAIL A

Figure 10. 6-Lead, MicroPak2, 1x1mm Body, .35mm Pitch

Pack age drawings are provided as a service to customers consideri ng Fai rchild components . Drawings may c hange i n any manner

without notice. P l ease note the revi sion and/or date on t he drawing and contac t a Fairchild S emiconductor represent ative to v er ify

or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically

the warranty therein, which covers Fairchild products.

Always visit Fairchild Semiconductor’ s online packaging area for the most recent package drawings:

http://www.fairchildsemi.com/packaging/.

Tape and Reel Specifications

Please visit Fairchild Semiconductor’s online packaging area for the most recent tape and reel specifications:

http://www.fairchildsemi.com/packaging/MicroPAK2_6L_tr.pdf.

Package Designator Tape Section Cavity Number Cavity Status Cover Type Status

Leader (Start End) 125 (Typical) Empty Sealed

Carrier 5000 Filled Sealed

FHX Trailer (Hub End) 75 (Typical) Empty Sealed

NC7WZ16 • Rev. 1.0.3 9

NC7WZ16 — TinyLogic

®

UHS Dual Buffer