1. General description
The 74LVC1G17-Q100 provides a buffer function with Schmitt trigger input. It is capable
of transforming slowly changing input signals into sharply defined outputs.
The input can be driven from either 3.3 V or 5 V devices. This feature allows the use of
this device in a mixed 3.3 Vand 5 V environment.
This device is fully specified for partial power-down applications using IOFF. The IOFF
circuitry disables the outpu t, preventing the damaging ba ckflow current through the device
when it is powered down.
This product has been qualified to the Automotive Electronics Council (AEC) standard
Q100 (Grade 1) and is suitable for use in automotive applications.
2. Features and benefits
Automotive product qualification in accordance with AEC-Q100 (Grade 1)
Specified from 40 C to +85 C and from 40 C to +125 C
Wide supply voltage range from 1.65 V to 5.5 V
High noise immunity
Complies with JEDEC standard
JESD8-7 (1.65 V to 1.95 V)
JESD8-5 (2.3 V to 2.7 V)
JESD8B/JESD36 (2.7 V to 3.6 V)
ESD protection:
MIL-STD-883, method 3015 exceeds 2000 V
HBM JESD22-A114F exceeds 2000 V
MM JESD22-A115-A exceeds 200 V (C = 200 pf, R = 0 )
24 mA output drive (VCC =3.0V)
CMOS low power consumption
Latch-up performance exceeds 250 mA
Direct interface with TTL levels
Unlimited rise and fall times
Inputs accept voltages up to 5 V
Multiple package options
74LVC1G17-Q100
Single Schmitt trigger buffer
Rev. 1 — 9 July 2012 Product data sheet
74LVC1G17_Q100 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved.
Product data sheet Rev. 1 — 9 July 2012 2 of 15
NXP Semiconductors 74LVC1G17-Q100
Single Schmitt trigger buffer
3. Ordering information
4. Marking
[1] The pin 1 indicator is located on the lower left corner of the device, below the marking code.
5. Functional diagram
Table 1. Ordering information
Type number Package
Temperature ran ge Name Description Version
74LVC1G17GW-Q100 40 C to +125 C TSSOP5 plastic thin shrink small outline package;
5 leads; body width 1.25 mm SOT353-1
74LVC1G17GV-Q100 40 C to +125 C SC-74A plastic surface-mounted package; 5 leads SOT753
Table 2. Marking codes
Type number Marking[1]
74LVC1G17GW-Q100 VJ
74LVC1G17GV-Q100 V17
Fig 1. Logic symbol Fig 2. IEC logic symbol
mnb150
AY
24
24
mnb151
Fig 3. Logic diagra m
mnb152
AY
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Product data sheet Rev. 1 — 9 July 2012 3 of 15
NXP Semiconductors 74LVC1G17-Q100
Single Schmitt trigger buffer
6. Pinning information
6.1 Pinning
6.2 Pin description
7. Functional description
[1] H = HIGH voltage level; L = LOW voltage level
Fig 4. Pin configuration SOT353-1 and SOT753
74LVC1G17-Q100
n.c. VCC
A
GND Y
aaa-003474
1
2
3
5
4
Table 3. Pin description
Symbol Pin Description
n.c. 1 not connected
A 2 data input
GND 3 ground (0 V)
Y 4 data output
VCC 5 supply voltage
Table 4. Function table[1]
Input Output
A Y
LL
HH
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Product data sheet Rev. 1 — 9 July 2012 4 of 15
NXP Semiconductors 74LVC1G17-Q100
Single Schmitt trigger buffer
8. Limiting values
[1] The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
[2] When VCC = 0 V (Power-down mode), the output voltage can be 5.5 V in normal operation.
[3] For TSSOP5 and SC-74A packages: above 87.5 C the value of Ptot derates linearly with 4.0 mW/K.
9. Recommended operating conditions
10. Static characteristics
Table 5. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol Parameter Conditions Min Max Unit
VCC supply voltage 0.5 +6.5 V
IIK input clamping current VI < 0 V 50 - mA
VIinput voltage [1] 0.5 +6.5 V
IOK output clamping current VO > VCC or VO < 0 V - 50 mA
VOoutput voltage Active mode [1][2] 0.5 VCC + 0.5 V
Power-down mode [1][2] 0.5 +6.5 V
IOoutput current VO = 0 V to VCC -50 mA
ICC supply current - 100 mA
IGND ground current 100 - mA
Ptot total power dissipation Tamb = 40 C to +125 C[3] - 250 mW
Tstg storage temperature 65 +150 C
Table 6. Recommended operating con ditions
Symbol Parameter Conditions Min Typ Max Unit
VCC supply voltage 1.65 - 5.5 V
VIinput voltage 0 - 5.5 V
VOoutput voltage Active mode 0 - VCC V
VCC = 0 V; Power-down mode 0 - 5.5 V
Tamb ambient temp erature 40 - +125 C
Table 7. Static characteristics
At recommended operating conditions. V oltages are referenced to GND (ground = 0 V).
Symbol Parameter Conditions Min Typ[1] Max Unit
Tamb = 40 C to +85 C
VOH HIGH-level output voltage VI= VT+ or VT
IO= 100 A; VCC = 1.65 V to 5.5 V VCC 0.1 - - V
IO= 4 mA; VCC = 1.65 V 1.2 - - V
IO= 8 mA; VCC = 2.3 V 1.9 - - V
IO= 12 mA; V CC = 2.7 V 2.2 - - V
IO= 24 mA; V CC = 3.0 V 2.3 - - V
IO= 32 mA; V CC = 4.5 V 3.8 - - V
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Product data sheet Rev. 1 — 9 July 2012 5 of 15
NXP Semiconductors 74LVC1G17-Q100
Single Schmitt trigger buffer
[1] All typical values are measured at maximum VCC and Tamb = 25 C.
VOL LOW-level output voltage VI= VT+ or VT
IO= 100 A; VCC = 1.65 V to 5.5 V - - 0.1 V
IO= 4 mA; VCC =1.65 V - - 0.45 V
IO= 8 mA; VCC = 2.3 V - - 0.3 V
IO= 12 m A; V CC = 2.7 V - - 0.4 V
IO= 24 m A; V CC = 3.0 V - - 0.55 V
IO= 32 m A; V CC = 4.5 V - - 0.55 V
IIinput leakage current VI= 5.5 V or GND; VCC =0Vto5.5V - 0.1 5A
IOFF power-off leakage current VIor VO = 5.5 V; VCC =0 V - 0.1 10 A
ICC supply current VI= 5.5 V or GND;
VCC =1.65Vto5.5V; I
O=0A -0.110A
ICC additional supply current VI=V
CC 0.6 V; IO=0A;
VCC = 2.3 V to 5.5 V; per pin - 5 500 A
CIinput capacitance - 5 - pF
Tamb = 40 C to +125 C
VOH HIGH-level output voltage VI= VT+ or VT
IO= 100 A; VCC = 1.65 V to 5.5 V VCC 0.1 - - V
IO= 4 mA; VCC = 1.65 V 0.95 - - V
IO= 8 mA; VCC = 2.3 V 1.7 - - V
IO= 12 mA; V CC = 2.7 V 1.9 - - V
IO= 24 mA; V CC = 3.0 V 2.0 - - V
IO= 32 mA; V CC = 4.5 V 3.4 - - V
VOL LOW-level output voltage VI= VT+ or VT
IO= 100 A; VCC = 1.65 V to 5.5 V - - 0.1 V
IO= 4 mA; VCC =1.65 V - - 0.7 V
IO= 8 mA; VCC = 2.3 V - - 0.45 V
IO= 12 m A; V CC = 2.7 V - - 0.6 V
IO= 24 m A; V CC = 3.0 V - - 0.80 V
IO= 32 m A; V CC = 4.5 V - - 0.80 V
IIinput leakage current VI= 5.5 V or GND; VCC =0Vto5.5V - - 100 A
IOFF power-off leakage current VIor VO = 5.5 V; VCC =0 V - - 200 A
ICC supply current VI= 5.5 V or GND;
VCC =1.65Vto5.5V; I
O=0A - - 200 A
ICC additional supply current per pin; VI=V
CC 0.6 V; IO=0A;
VCC = 2.3 V to 5.5 V --5000A
Table 7. Static characteristics …continued
At recommended operating conditions. V oltages are referenced to GND (ground = 0 V).
Symbol Parameter Conditions Min Typ[1] Max Unit
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Product data sheet Rev. 1 — 9 July 2012 6 of 15
NXP Semiconductors 74LVC1G17-Q100
Single Schmitt trigger buffer
[1] All typical values are measured at Tamb = 25 C.
10.1 Transfer characteristic waveforms
Table 8. Transfer characteristics
At recommended operating conditions. V oltages are referenced to GND (ground = 0 V).
Symbol Parameter Conditions 40 C to +85 C40 C to +125 CUnit
Min Typ[1] Max Min Max
VT+ positive-going
threshold voltage see Figure 5 and Figure 6
VCC = 1.8 V 0.82 1.0 1.14 0.79 1.14 V
VCC = 2.3 V 1.03 1.2 1.40 1.00 1.40 V
VCC = 3.0 V 1.29 1.5 1.71 1.26 1.71 V
VCC = 4.5 V 1.84 2.1 2.36 1.81 2.36 V
VCC = 5.5 V 2.19 2.5 2.79 2.16 2.79 V
VTnegative-going
threshold voltage see Figure 5 and Figure 6
VCC = 1.8 V 0.46 0.6 0.75 0.46 0.78 V
VCC = 2.3 V 0.65 0.8 0.96 0.65 0.99 V
VCC = 3.0 V 0.88 1.0 1.24 0.88 1.27 V
VCC = 4.5 V 1.32 1.5 1.84 1.32 1.87 V
VCC = 5.5 V 1.58 1.8 2.24 1.58 2.27 V
VHhysteresis
voltage see Figure 5, Figure 6 and
Figure 7
VCC = 1.8 V 0.26 0.4 0.51 0.19 0.51 V
VCC = 2.3 V 0.28 0.4 0.57 0.22 0.57 V
VCC = 3.0 V 0.31 0.5 0.64 0.25 0.64 V
VCC = 4.5 V 0.40 0.6 0.77 0.34 0.77 V
VCC = 5.5 V 0.47 0.6 0.88 0.41 0.88 V
Fig 5. Transfer characteristic Fig 6. Definitions of VT+, VT and VH
mnb154
VO
VHVI
VT+
VT−
mnb155
V
O
V
I
V
H
V
T+
V
T−
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Product data sheet Rev. 1 — 9 July 2012 7 of 15
NXP Semiconductors 74LVC1G17-Q100
Single Schmitt trigger buffer
11. Dynamic characteristics
[1] Typical values are measured at Tamb =25C and VCC = 1.8 V, 2.5 V, 2.7 V, 3.3 V and 5.0 V respectively.
[2] tpd is the same as tPLH and tPHL.
[3] CPD is used to determine the dynamic power dissipation (PDin W).
PD=C
PD VCC2fiN+(CLVCC2fo) where:
fi= input frequency in MHz;
fo= output frequency in MHz;
CL= output load capacitance in pF;
VCC = supply voltage in V;
N = number of inputs switching;
(CLVCC2fo) = sum of outputs.
VCC = 3.0 V
Fig 7. Typical transfer characteristics
03
V
I
(V)
I
CC
(mA)
10
0
2
mna641
4
6
8
12
Table 9. Dy namic characteristics
Voltages are referenced to GND (ground = 0 V). For test circuit see Figure 9.
Symbol Parameter Conditions 40 C to +85 C40 C to +125 CUnit
Min Typ[1] Max Min Max
tpd propagation delay A to Y; see Figure 8 [2]
VCC = 1.65 V to 1.95 V 1.0 4.1 11.0 1.0 14.0 ns
VCC = 2.3 V to 2.7 V 0.7 2.8 6.5 0.7 8.5 ns
VCC = 2.7 V 0.7 3.2 6.5 0.7 8.5 ns
VCC = 3.0 V to 3.6 V 0.7 3.0 5.5 0.7 7.0 ns
VCC = 4.5 V to 5.5 V 0.7 2.2 5.0 0.7 6.5 ns
CPD power dissipation
capacitance VI = GND to VCC;
VCC = 3.3 V [3] -16.6---pF
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Product data sheet Rev. 1 — 9 July 2012 8 of 15
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Single Schmitt trigger buffer
12. Waveforms
Measurement points are given in Table 10.
VOL and VOH are typical output voltage levels that occur with the output load.
Fig 8. The input A to output Y propagation delay times
mnb153
tPHL tPLH
VM
VM
A input
Y output
GND
VI
VOH
VOL
Table 10. Mea surement points
Supply voltage Input Output
VCC VMVM
1.65 V to 1.95 V 0.5 VCC 0.5 VCC
2.3 V to 2.7 V 0.5 VCC 0.5 VCC
2.7V 1.5V 1.5V
3.0V to 3.6V 1.5V 1.5V
4.5 V to 5.5 V 0.5 VCC 0.5 VCC
Test data is given in Table 11.
Definitions for test circuit:
RL = Load resistance.
CL = Load capacitance including jig and probe capacitance.
RT = Termination resistance should be equal to the output impedance Zo of the pulse generator.
VEXT = External voltage for measuring switching times.
Fig 9. Test circuit for measuring switching times
VEXT
VCC
VIVO
mna616
DUT
CL
RT
RL
RL
G
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Product data sheet Rev. 1 — 9 July 2012 9 of 15
NXP Semiconductors 74LVC1G17-Q100
Single Schmitt trigger buffer
13. Application information
Table 11. Test data
Supply voltage Input Load VEXT
VCC VItr=t
fCLRLtPLH, tPHL
1.65 V to 1.95 V VCC 2.0ns 30pF 1kopen
2.3 V to 2.7 V VCC 2.0ns 30pF 500open
2.7V 2.7V 2.5ns 50pF 500open
3.0V to 3.6V 2.7V 2.5ns 50pF 500open
4.5 V to 5.5 V VCC 2.5ns 50pF 500open
Linear change of VI between 0.8 V to 2.0 V.
(1) Positive-going edge.
(2) Negative-going edge.
Fig 10. Average supply current as a function of supply voltage
234 6
50
0
40
5
30
20
10
mnb156
ICC
(mA)
VCC (V)
(1)
(2)
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Product data sheet Rev. 1 — 9 July 2012 10 of 15
NXP Semiconductors 74LVC1G17-Q100
Single Schmitt trigger buffer
14. Package outline
Fig 11. Package outline SOT353-1 (TSSOP5)
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Product data sheet Rev. 1 — 9 July 2012 11 of 15
NXP Semiconductors 74LVC1G17-Q100
Single Schmitt trigger buffer
Fig 12. Package outline SOT753 (SC-74A)
REFERENCES
OUTLINE
VERSION EUROPEAN
PROJECTION ISSUE DATE
IEC JEDEC JEITA
SOT753 SC-74A
wBM
bp
D
e
A
A1
Lp
Q
detail X
HE
E
vMA
AB
y
0 1 2 mm
scale
c
X
132
45
Plastic surface-mounted package; 5 leads SOT753
UNIT A1bpcDEHELpQywv
mm 0.100
0.013 0.40
0.25 3.1
2.7
0.26
0.10 1.7
1.3
e
0.95 3.0
2.5 0.2 0.10.2
DIMENSIONS (mm are the original dimensions)
0.6
0.2 0.33
0.23
A
1.1
0.9
02-04-16
06-03-16
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NXP Semiconductors 74LVC1G17-Q100
Single Schmitt trigger buffer
15. Abbreviations
16. Revision history
Table 12. Abbreviation s
Acronym Description
CMOS Complementary Metal Oxide Semiconductor
TTL Transistor-Transistor Logic
HBM Human Body Model
ESD ElectroStatic Discharge
MM Machine Model
DUT Device Under Test
MIL Military
Table 13. Revision history
Document ID Release date Data sheet status Change notice Supersedes
74LV C1G17_Q100 v.1 20120709 Product data sheet - -
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Product data sheet Rev. 1 — 9 July 2012 13 of 15
NXP Semiconductors 74LVC1G17-Q100
Single Schmitt trigger buffer
17. Legal information
17.1 Data sheet status
[1] Please consult the most recently issued document before initiating or completing a design.
[2] The term ‘short data sheet’ is explained in section “Definitions”.
[3] The product status of de vice(s) descr ibed in th is docume nt may have cha nged since this docume nt was publis hed and ma y dif fer in case of multiple devices. The latest product status
information is available on the Internet at URL http://www.nxp.com.
17.2 Definitions
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. NXP Semiconductors does not give any
representations or warranties as to the accuracy or completeness of
information included herein and shall have no liab ility for the consequences of
use of such information.
Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and tit le. A short data sh eet is intended
for quick reference only and shou ld not be rel ied u pon to cont ain det ailed and
full information. For detailed and full information see the relevant full data
sheet, which is available on request via the local NXP Semiconductors sales
office. In case of any inconsistency or conf lict with the short data sheet, the
full data sheet shall pre vail.
Product specificat ion — The information and data provided in a Product
data sheet shall define the specification of the product as agreed between
NXP Semiconductors and its customer, unless NXP Semiconductors and
customer have explicitly agreed otherwise in writing. In no event however,
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deemed to off er functions and qualities beyon d those described in the
Product data sheet.
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Limited warr a nty and liability — Information in this document is believed to
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Notwithstanding any damages that customer might incur for any reason
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limitation specifications and product descripti ons, at any time and without
notice. This document supersedes and replaces all informa tion supplied prior
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Suitability for use in automotive applications — T his NXP
Semiconductors product has been qualified for use in automotive
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Applications — Applications that are described herein for any of these
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representation or warranty tha t such application s will be suitable for the
specified use without further testing or modification.
Customers are responsible for the design and ope ration of their applications
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accepts no liability for any assistance with applications or customer product
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NXP Semiconductors does not accept any liabil ity related to any default,
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customer(s). NXP does not accept any liability in this respect.
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) will cause permanent
damage to the device. Limiting values are stress rating s only and (proper)
operation of the device at these or any other conditions above those given in
the Recommended operating conditions section (if present) or the
Characteristics sections of this document is not warranted. Constant or
repeated exposure to limiting values will permanent ly and irreversibly affect
the quality and reliability of the device.
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products are sold subject to the general terms and conditions of commercial
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purchase of NXP Semiconductors products by customer.
Document status[1][2] Product status[3] Definition
Objective [short] data sheet Development This document contains data from the objective specification for product development.
Preliminary [short] dat a sheet Qualification This document contains data from the preliminary specificat ion.
Product [short] dat a sheet Production This document contains the product specification.
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Product data sheet Rev. 1 — 9 July 2012 14 of 15
NXP Semiconductors 74LVC1G17-Q100
Single Schmitt trigger buffer
No offer to sell or license — Nothing in this document may be interpret ed or
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Translations — A non-English (translated) version of a document is for
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Notice: All referenced b rands, produc t names, service names and trademarks
are the property of their respect i ve ow ners.
18. Contact information
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
NXP Semiconductors 74LVC1G17-Q100
Single Schmitt trigger buffer
© NXP B.V. 2012. All rights reserved.
For more information, please visit: http://www.nxp.co m
For sales office addresses, please send an email to: salesaddresses@nxp.com
Date of release: 9 July 2012
Document identifier : 74LVC1G17_ Q100
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section ‘Legal information’.
19. Contents
1 General description. . . . . . . . . . . . . . . . . . . . . . 1
2 Features and benefits . . . . . . . . . . . . . . . . . . . . 1
3 Ordering information. . . . . . . . . . . . . . . . . . . . . 2
4 Marking. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
5 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2
6 Pinning information. . . . . . . . . . . . . . . . . . . . . . 3
6.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
6.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3
7 Functional description . . . . . . . . . . . . . . . . . . . 3
8 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 4
9 Recommended operating conditions. . . . . . . . 4
10 Static characteristics. . . . . . . . . . . . . . . . . . . . . 4
10.1 Transfer characteristic waveforms . . . . . . . . . . 6
11 Dynamic characteristics . . . . . . . . . . . . . . . . . . 7
12 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
13 Application information. . . . . . . . . . . . . . . . . . . 9
14 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 10
15 Abbreviations. . . . . . . . . . . . . . . . . . . . . . . . . . 12
16 Revision history. . . . . . . . . . . . . . . . . . . . . . . . 12
17 Legal information. . . . . . . . . . . . . . . . . . . . . . . 13
17.1 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 13
17.2 Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
17.3 Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . 13
17.4 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 14
18 Contact information. . . . . . . . . . . . . . . . . . . . . 14
19 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15