Data Sheet No. PD94250 IRU3038 SYNCHRONOUS PWM CONTROLLER FOR TERMINATION POWER SUPPLY APPLICATIONS PRELIMINARY DATA SHEET FEATURES DESCRIPTION Synchronous Controller in 14-Pin Package Operating with single 5V or 12V supply voltage 200KHz to 400KHz operation set by an external resistor Soft-Start Function Fixed Frequency Voltage Mode 500mA Peak Output Drive Capability Uncommitted Error Amplifier available for DDR voltage tracking application 1.25V Reference Voltage Protects the output when control FET is shorted APPLICATIONS DDR memory source sink Vtt application Low cost on-board DC to DC such as 5V to 3.3V, 2.5V or 1.8V Graphic Card Hard Disk Drive The IRU3038 controller IC is designed to provide a low cost synchronous Buck regulator for voltage tracking applications such DDR memory and general purpose on-board DC to DC converter. Modern micro processors combined with DDR memory, need high-speed bandwidth data bus which requires a particular bus termination voltage. This voltage will be tightly regulated to track the half of chipset voltage for best performance. The IRU3038 together with dual N-channel MOSFETs such as IRF7313, provide a low cost solution for such applications. This device features a programmable frequency set from 200KHz to 400KHz, under-voltage lockout for both Vcc and Vc supplies, an external programmable soft-start function as well as output under-voltage detection that latches off the device when an output short is detected. TYPICAL APPLICATION 5V 12V VDDQ (2.5V) DDR Memory C1 0.1uF C2 1uF Vcc VREF R1 1K SS C3 10TPB100M, 100uF, 55mV 1uH HDrv U1 IRU3038 D1 BAT54 or 1N4148 LDrv Q1 1/2 of IRF7313 L2 D03316P-103, 10uH, 3.9A Q2 1/2 of IRF7313 PGnd Rt C4 47uF Vc VP R2 1K C5 0.1uF L1 Vtt 1.25V @ 3A C6 2x 6TPB150M, 150uF, 55mV Comp C7 2200pF Fb Gnd R3 33K Figure 1 - Typical application of IRU3038 when Vtt tracks the VDDQ. PACKAGE ORDER INFORMATION TA (C) 0 To 70 0 To 70 Rev. 2.0 09/12/02 DEVICE IRU3038CF IRU3038CS PACKAGE 14-Pin Plastic TSSOP (F) 14-Pin Plastic SOIC NB (S) www.irf.com 1 IRU3038 ABSOLUTE MAXIMUM RATINGS Vcc Supply Voltage .................................................. Vc Supply Voltage ..................................................... Storage Temperature Range ...................................... Operating Junction Temperature Range ..................... 25V 30V (not rated for inductive load) -65C To 150C 0C To 125C PACKAGE INFORMATION 14-PIN PLASTIC TSSOP (F) Fb 1 14 NC VP 2 13 SS VREF 3 12 Comp Vcc 4 11 Rt NC 5 10 Vc 14-PIN PLASTIC SOIC (S) Fb 1 14 NC VP 2 13 SS VREF 3 12 Comp Vcc 4 11 Rt NC 5 10 Vc LDrv 6 9 HDrv LDrv 6 Gnd 7 8 PGnd Gnd 7 9 HDrv 8 PGnd uJA=888C/W uJA=1008C/W ELECTRICAL SPECIFICATIONS Unless otherwise specified, these specifications apply over Vcc=5V, Vc=12V and TA=0 to 70C. Typical values refer to TA=25C. Low duty cycle pulse testing is used which keeps junction and case temperatures equal to the ambient temperature. PARAMETER Reference Voltage VREF Voltage Fb Voltage Line Regulation UVLO UVLO Threshold - Vcc UVLO Hysteresis - Vcc UVLO Threshold - Vc UVLO Hysteresis - Vc UVLO Threshold - Fb UVLO Hysteresis - Fb Supply Current Vcc Dynamic Supply Current Vc Dynamic Supply Current Vcc Static Supply Current Vc Static Supply Current Soft-Start Section Charge Current 2 SYM TEST CONDITION V FB LREG MIN TYP MAX UNITS 1.225 1.250 0.2 1.275 0.35 V % 4 4.2 0.25 3.3 0.2 0.6 0.1 4.4 V V V V V V 5<Vcc<12 UVLO Vcc Supply Ramping Up UVLO Vc Supply Ramping Up 3.1 UVLO Fb Fb Ramping Down 0.4 Freq=200KHz, CL=1500pF Freq=200KHz, CL=1500pF SS=0V SS=0V 2 2 1 0.5 5 7 3.5 1 8 10 6 4.5 mA mA mA mA SS=0V -10 -20 -30 mA Dyn Icc Dyn Ic ICCQ ICQ SSIB www.irf.com 3.5 0.8 Rev. 2.0 09/12/02 IRU3038 PARAMETER Error Amp Fb Voltage Input Bias Current Fb Voltage Input Bias Current VP Voltage Range Transconductance Oscillator Frequency SYM Ramp Amplitude Output Drivers Rise Time Fall Time Dead Band Time Max Duty Cycle Min Duty Cycle V RAMP IFB1 IFB2 TEST CONDITION SS=3V, Fb=1V SS=0V, Fb=1V gm Freq Tr Tf Rt=Open Rt=Gnd TOFF Fb=1V, Freq=200KHz Fb=1.5V TYP MAX UNITS mA mA V mmho -0.1 -64 0.8 450 600 1.5 750 180 360 1.225 200 400 1.25 220 440 1.275 KHz 50 85 0 50 50 150 90 0 100 100 250 95 ns ns ns % % CLOAD =1500pF CLOAD =1500pF TDB TON MIN V PIN DESCRIPTIONS PIN# 1 2 3 4 5 14 6 7 PIN SYMBOL PIN DESCRIPTION Fb This pin is connected directly to the output of the switching regulator via resistor divider to provide feedback to the Error amplifier. VP Non-inverting input of error amplifier. VREF Reference Voltage. Vcc This pin provides biasing for the internal blocks of the IC as well as power for the low side driver. A minimum of 1mF, high frequency capacitor must be connected from this pin to ground to provide peak drive current capability. NC No Connection. LDrv Gnd 8 PGnd 9 HDrv 10 Vc 11 Rt 12 Comp 13 SS Rev. 2.0 09/12/02 Output driver for the synchronous power MOSFET. Analog ground for internal reference and control circuitry. Connect to PGnd with a short trace. This pin serves as the separate ground for MOSFET's drivers and should be connected to system's ground plane. A high frequency capacitor (0.1 to 1mF) must be connected from Vcc and Vc pins to this pin for noise free operation. Output driver for the high side power MOSFET. Connect a diode, such as BAT54 or 1N4148, from this pin to ground for the application when the inductor current goes negative (Source/ Sink), soft-start at no load and for the fast load transient from full load to no load. This pin is connected to a voltage that must be at least 4V higher than the bus voltage of the switcher (assuming 5V threshold MOSFET) and powers the high side output driver. A minimum of 1mF, high frequency capacitor must be connected from this pin to ground to provide peak drive current capability. The switching frequency can be Programmed between 200KHz and 400KHz by connecting a resistor between Rt and Gnd. Floating the pin set the switching frequency to 200KHz and grounding the pin set the switching frequency to 400KHz. Compensation pin of the error amplifier. An external resistor and capacitor network is typically connected from this pin to ground to provide loop compensation. This pin provides soft-start for the switching regulator. An internal current source charges an external capacitor that is connected from this pin to ground which ramps up the output of the switching regulator, preventing it from overshooting as well as limiting the input current. The converter can be shutdown by pulling this pin below 0.5V. www.irf.com 3 IRU3038 BLOCK DIAGRAM Vcc Bias Generator 0.25V V REF 3 3V 1.25V 1.25V POR 4V 3V 0.2V Vc 11 R t 20uA 3.5V SS 13 64uA Max 10 V c Rt Oscillator 9 HDrv Ct S POR Q Error Comp 25K Error Amp VP 2 R 4 Vcc 6 LDrv 8 PGnd 7 Gnd Reset Dom 25K Fb 1 FbLo Comp 0.6V C o m p 12 POR Figure 2 - Simplified block diagram of the IRU3038. THEORY OF OPERATION Introduction The IRU3038 is a fixed frequency, voltage mode synchronous controller and consists of a precision reference voltage, an uncommitted error amplifier, an internal oscillator, a PWM comparator, 0.5A peak gate driver, soft-start and shutdown circuits (see Block Diagram). The output voltage of the synchronous converter is set and controlled by the output of the error amplifier; this is the amplified error signal from the sensed output voltage and the voltage on non-inverting input of error amplifier(V P). This voltage is compared to a fixed frequency linear sawtooth ramp and generates fixed frequency pulses of variable duty-cycle, which drives the two N-channel external MOSFETs. The timing of the IC is provided through an internal oscillator circuit which uses on-chip capacitor. The oscillation frequency is programmable between 200 to 400KHz by using an external resistor. Figure 12 shows switching frequency vs. external resistor (Rt). Soft-Start The IRU3038 has a programmable soft-start to control the output voltage rise and limit the current surge at the start-up. To ensure correct start-up, the soft-start sequence initiates when the Vc and Vcc rise above their 4 threshold (3.3V and 4.2V respectively) and generates the Power On Reset (POR) signal. Soft-start function operates by sourcing an internal current to charge an external capacitor to about 3V. Initially, the soft-start function clamps the E/A's output of the PWM converter. As the charging voltage of the external capacitor ramps up, the PWM signals increase from zero to the point the feedback loop takes control. Short-Circuit Protection The outputs are protected against the short-circuit. The IRU3038 protects the circuit for shorted output by sensing the output voltage (through the external resistor divider). The IRU3038 shuts down the PWM signals, when the output voltage drops below 0.6V. The IRU3038 also protects the output from over-voltaging when the control FET is shorted. This is done by turning on the sync FET with the maximum duty cycle. Under-Voltage Lockout The under-voltage lockout circuit assures that the MOSFET driver outputs remain in the off state whenever the supply voltage drops below set parameters. Lockout occurs if Vc and Vcc fall below 3.3V and 4.2V respectively. Normal operation resumes once Vc and Vcc rise above the set values. www.irf.com Rev. 2.0 09/12/02 IRU3038 APPLICATION INFORMATION Design Example: The following example is a typical application for IRU3038, the schematic is Figure 11 on page 12. VIN = 5V VOUT = 2.5V IOUT = 8A DVOUT = 100mV fS = 200KHz tSTART = 753Css (ms) ) VP = VREF = 1.25V When an external resistor divider is connected to the output as shown in Figure 3. VOUT IRU3038 VREF R6 Fb R5 VP Figure 3 - Typical application of the IRU3038 for programming the output voltage. Equation (1) can be rewritten as: R6 = R5 3 ( VV OUT P For a start-up time of 7.5ms, the soft-start capacitor will be 0.1mF. Choose a ceramic capacitor at 0.1mF. Shutdown The converter can be shutdown by pulling the soft-start pin below 0.5V. The control MOSFET turns off and the synchronous MOSFET turns on during shutdown. Boost Supply Vc To drive the high-side switch it is necessary to supply a gate voltage at least 4V greater than the bus voltage. This is achieved by using a charge pump configuration as shown in Figure 11. The capacitor is charged up to approximately twice the bus voltage. A capacitor in the range of 0.1mF to 1mF is generally adequate for most applications. In application, when a separate voltage source is available the boost circuit can be avoided as shown in Figure 1. Input Capacitor Selection The input filter capacitor should be based on how much ripple the supply can tolerate on the DC input line. The ripple current generated during the on time of control MOSFET should be provided by input capacitor. The RMS value of this ripple is expressed by: IRMS = IOUT D3(1-D) ---(3) Where: D is the Duty Cycle, D=VOUT/VIN. IRMS is the RMS value of the input capacitor current. IOUT is the output current for each channel. ) -1 Choose R5 = 1KV This will result to R6 = 1KV For VIN=5V, IOUT=8A and D=0.5, the IRMS=4A If the high value feedback resistors are used, the input bias current of the Fb pin could cause a slight increase in output voltage. The output voltage set point can be more accurate by using precision resistor. Rev. 2.0 09/12/02 ---(2) Where CSS is the soft-start capacitor (mF) Output Voltage Programming Output voltage is programmed by reference voltage and external voltage divider. The Fb pin is the inverting input of the error amplifier, which is referenced to the voltage on non-inverting pin of error amplifier. For this application, this pin (V P) is connected to reference voltage (V REF). The output voltage is defined by using the following equation: R6 VOUT = VP 3 1 + ---(1) R5 ( Soft-Start Programming The soft-start timing can be programmed by selecting the soft-start capacitance value. The start-up time of the converter can be calculated by using: For higher efficiency, a low ESR capacitor is recommended. Choose two Poscap from Sanyo 10TPB100ML (10V, 100mF, 55mV) with a maximum allowable ripple current of 1.9A. www.irf.com 5 IRU3038 Output Capacitor Selection The criteria to select the output capacitor is normally based on the value of the Effective Series Resistance (ESR). In general, the output capacitor must have low enough ESR to meet output ripple and load transient requirements, yet have high enough ESR to satisfy stability requirements. The ESR of the output capacitor is calculated by the following relationship: ESR [ DVO DIO ---(4) If Di = 30%(IO), then the output inductor will be: L = 2.6mH The Coilcraft DO5022HC series provides a range of inductors in different values, low profile suitable for large currents, 3.3mH, 10A is a good choice for this application. This will result to a ripple approximately 26.5% of output current. Power MOSFET Selection The IRU3038 uses two N-Channel MOSFETs. The selections criteria to meet power transfer requirements is based on maximum drain-source voltage (V DSS), gatesource drive voltage (V GS), maximum output current, Onresistance RDS(ON) and thermal management. Where: DVO = Output Voltage Ripple DIO = Output Current DVO=100mV and DIO=4A This results to: ESR=25mV The Sanyo TPC series, Poscap capacitor is a good choice. The 6TPC150M 150mF, 6.3V has an ESR 40mV. Selecting two of these capacitors in parallel, results to an ESR of 20mV which achieves our low ESR goal. The capacitor value must be high enough to absorb the inductor's ripple current. The larger the value of capacitor, the lower will be the output ripple voltage. Inductor Selection The inductor is selected based on output power, operating frequency and efficiency requirements. Low inductor value causes large ripple current, resulting in the smaller size, but poor efficiency and high output noise. Generally, the selection of inductor value can be reduced to desired maximum ripple current in the inductor (i). The optimum point is usually found between 20% and 50% ripple of the output current. The MOSFET must have a maximum operating voltage (V DSS) exceeding the maximum input voltage (V IN). The gate drive requirement is almost the same for both MOSFETs. Logic-level transistor can be used and caution should be taken with devices at very low VGS to prevent undesired turn-on of the complementary MOSFET, which results a shoot-through current. The total power dissipation for MOSFETs includes conduction and switching losses. For the Buck converter, the average inductor current is equal to the DC load current. The conduction loss is defined as: 2 PCOND (Upper Switch) = ILOAD 3 RDS(ON) 3 D 3 q 2 PCOND (Lower Switch) = ILOAD 3 RDS(ON) 3 (1 - D) 3 q q = RDS(ON) Temperature Dependency For the buck converter, the inductor value for desired operating ripple current can be determined using the following relation: Di 1 VOUT ; Dt = D3 ;D= Dt fS VIN VOUT L = (V IN - VOUT)3 ---(5) VIN3Di3fS VIN - VOUT = L3 Where: VIN = Maximum Input Voltage VOUT = Output Voltage i = Inductor Ripple Current fS = Switching Frequency t = Turn On Time D = Duty Cycle 6 The RDS(ON) temperature dependency should be considered for the worst case operation. This is typically given in the MOSFET data sheet. Ensure that the conduction losses and switching losses do not exceed the package ratings or violate the overall thermal budget. Choose IRF7460 for both control MOSFET and synchronous MOSFET. This device provides low on-resistance in a compact SOIC 8-Pin package. www.irf.com Rev. 2.0 09/12/02 IRU3038 The MOSFET has the following data: Feedback Compensation The IRU3038 is a voltage mode controller; the control loop is a single voltage feedback path including error amplifier and error comparator. To achieve fast transient response and accurate output regulation, a compensation circuit is necessary. The goal of the compensation network is to provide a closed loop transfer function with the highest 0dB crossing frequency and adequate phase margin (greater than 458). IRF7460 VDSS = 20V ID = 10A @ 758C RDS(ON) = 10mV @ VGS=10V q = 1.8 for 1508C (Junction Temperature) The total conduction losses will be: PCON(TOTAL) = 1.152W The switching loss is more difficult to calculate, even though the switching transition is well understood. The reason is the effect of the parasitic components and switching times during the switching procedures such as turn-on / turnoff delays and rise and fall times. With a linear approximation, the total switching loss can be expressed as: VDS(OFF) tr + tf PSW = 3 3 ILOAD ---(6) T 2 Where: VDS(OFF) = Drain to Source Voltage at off time tr = Rise Time tf = Fall Time T = Switching Period ILOAD = Load Current The output LC filter introduces a double pole, -40dB/ decade gain slope above its corner resonant frequency, and a total phase lag of 1808 (see Figure 5). The Resonant frequency of the LC filter is expressed as follows: FLC = 1 2p3 ---(7) LO3CO Figure 5 shows gain and phase of the LC filter. Since we already have 1808 phase shift just from the output filter, the system risks being unstable. Gain Phase 08 0dB -40dB/decade The switching time waveform is shown in Figure 4. VDS 90% FLC Frequency -1808 FLC Frequency Figure 5 - Gain and phase of LC filter. The IRU3038's error amplifier is a differential-input transconductance amplifier. The output is available for DC gain control or AC phase compensation. 10% VGS td(ON) tr td(OFF) tf The E/A can be compensated with or without the use of local feedback. When operated without local feedback, the transconductance properties of the E/A become evident and can be used to cancel one of the output filter poles. This will be accomplished with a series RC circuit from Comp pin to ground as shown in Figure 6. Figure 4 - Switching time waveforms. From IRF7460 data sheet we obtain: tr = 6.9ns tf = 4.3ns These values are taken under a certain condition test. For more detail please refer to the IRF7460 data sheet. By using equation (6), we can calculate the total switching losses. PSW(TOTAL) = 44.8mW Rev. 2.0 09/12/02 www.irf.com 7 IRU3038 Note that this method requires that the output capacitor should have enough ESR to satisfy stability requirements. In general, the output capacitor's ESR generates a zero typically at 5KHz to 50KHz which is essential for an acceptable phase margin. The ESR zero of the output capacitor expressed as follows: FESR = 1 2p3ESR3Co ---(8) For: VIN = 5V VOSC = 1.25V Fo = 30KHz FESR = 26.5KHz FLC = 5KHz R5 = 1K R6 = 1K gm = 600mmho VOUT R6 Fb E/A R5 Comp Ve C9 Vp=VREF Where: VIN = Maximum Input Voltage VOSC = Oscillator Ramp Voltage Fo = Crossover Frequency FESR = Zero Frequency of the Output Capacitor FLC = Resonant Frequency of the Output Filter R5 and R6 = Resistor Dividers for Output Voltage Programming gm = Error Amplifier Transconductance R4 This results to R4=26.52KV. Choose R4=26.1KV Gain(dB) To cancel one of the LC filter poles, place the zero before the LC filter resonant frequency pole: H(s) dB FZ 75%FLC FZ Frequency Figure 6 - Compensation network without local feedback and its asymptotic gain plot. The transfer function (Ve / VOUT) is given by: ( H(s) = gm3 R5 1 + sR4C9 3 R6 + R5 sC9 ) ---(9) FZ 0.75 3 1 ---(13) LO 3 CO 2p For: Lo = 10mH Co = 300mF FZ = 3.8KHz R4 = 26.1KV Using equations (11) and (13) to calculate C9, we get: The (s) indicates that the transfer function varies as a function of frequency. This configuration introduces a gain and zero, expressed by: R5 |H(s)| = gm 3 3 R4 ---(10) R6 3 R5 FZ = 1 2p 3 R4 3 C9 C9 1800pF One more capacitor is sometimes added in parallel with C9 and R4. This introduces one more pole which is mainly used to suppress the switching noise. The additional pole is given by: ---(11) FP = The gain is determined by the voltage divider and E/A's transconductance gain. First select the desired zero-crossover frequency (Fo): Fo > FESR and FO [ (1/5 ~ 1/10)3 fS 8 1 VOSC Fo3FESR R5 + R6 3 3 3 VIN FLC2 R5 gm The pole sets to one half of switching frequency which results in the capacitor CPOLE: CPOLE = Use the following equation to calculate R4: R4 = 1 C9 3 CPOLE 2p 3 R4 3 C9 + CPOLE ---(12) www.irf.com 1 p 3 R4 3 fS - 1 C9 fS for FP << 2 1 p 3 R4 3 fS Rev. 2.0 09/12/02 IRU3038 For a general solution for unconditionally stability for ceramic capacitor with very low ESR and any type of output capacitors, in a wide range of ESR values we should implement local feedback with a compensation network. The typically used compensation network for voltage-mode controller is shown in Figure 7. VOUT ZIN C12 C10 R7 R8 C11 Zf E/A R5 FP2 = FP3 = FZ1 = R6 Fb FP1 = 0 Comp Ve Vp=VREF 1 2p3R83C10 1 ( ) C123C11 2p3R73 C12+C11 1 2p3R73C12 1 2p3R73C11 1 1 FZ2 = 2p3C103(R6 + R8) 2p3C103R6 Cross Over Frequency: VIN 1 FO = R73C103 3 VOSC 2p3Lo3Co ---(15) Where: VIN = Maximum Input Voltage VOSC = Oscillator Ramp Voltage Lo = Output Inductor Co = Total Output Capacitors Gain(dB) H(s) dB FZ1 FZ2 FP2 FP3 Frequency Figure 7 - Compensation network with local feedback and its asymptotic gain plot. The stability requirement will be satisfied by placing the poles and zeros of the compensation network according to following design rules. The consideration has been taken to satisfy condition (14) regarding transconductance error amplifier. In such configuration, the transfer function is given by: 1Ve = VOUT 1 + 1) Select the crossover frequency: Fo < FESR and Fo [ (1/10 ~ 1/6)3 fS gmZf gmZIN The error amplifier gain is independent of the transconductance under the following condition: gmZf >> 1 and gmZIN >>1 ---(14) By replacing ZIN and Zf according to Figure 7, the transformer function can be expressed as: H(s) = (1+sR7C11)3[1+sC10(R6+R8)] 1 3 sR6(C12+C11) C12C11 1+sR7 C12+C11 3(1+sR8C10) [ ( )] As known, transconductance amplifier has high impedance (current source) output, therefore, consider should be taken when loading the E/A output. It may exceed its source/sink output current capability, so that the amplifier will not be able to swing its output voltage over the necessary range. The compensation network has three poles and two zeros and they are expressed as follows: Rev. 2.0 09/12/02 2) Select R7, so that R7 >> 2 gm 3) Place first zero before LC's resonant frequency pole. FZ1 75% FLC 1 C11 = 2p 3 FZ1 3 R7 4) Place third pole at the half of the switching frequency. fS FP3 = 2 1 C12 = 2p 3 R7 3 FP3 C12 > 50pF If not, change R7 selection. 5) Place R7 in equation (15) and calculate C10: C10 [ www.irf.com 2p 3 Lo 3 FO 3 Co VOSC 3 R7 VIN 9 IRU3038 6) Place second pole at the ESR zero. FP2 = FESR 1 R8 = 2p 3 C10 3 FP2 1 Check if R8 > gm Layout Consideration The layout is very important when designing high frequency switching converters. Layout will affect noise pickup and can cause a good design to perform with less than expected results. If R8 is too small, increase R7 and start from step 2. 7) Place second zero around the resonant frequency. FZ2 = FLC R6 = 1 - R8 2p 3 C10 3 FZ2 8) Use equation (1) to calculate R5: R5 = VREF 3 R6 VOUT - VREF These design rules will give a crossover frequency approximately one-tenth of the switching frequency. The higher the band width, the potentially faster the load transient speed. The gain margin will be large enough to provide high DC-regulation accuracy (typically -5dB to 12dB). The phase margin should be greater than 458 for overall stability. Start to place the power components. Make all the connections in the top layer with wide, copper filled areas. The inductor, output capacitor and the MOSFET should be close to each other as possible. This helps to reduce the EMI radiated by the power traces due to the high switching currents through them. Place input capacitor directly to the drain of the high-side MOSFET. To reduce the ESR, replace the single input capacitor with two parallel units. The feedback part of the system should be kept away from the inductor and other noise sources and be placed close to the IC. In multilayer PCB, use one layer as power ground plane and have a separate control circuit ground (analog ground), to which all signals are referenced. The goal is to localize the high current path to a separate loop that does not interfere with the more sensitive analog control function. These two grounds must be connected together on the PC board layout at a single point. IC Quiescent Power Dissipation Power dissipation for IC controller is a function of applied voltage, gate driver loads and switching frequency. The IC's maximum power dissipation occurs when the IC operating with single 12V supply voltage (Vcc=12V and Vc24V) at 400KHz switching frequency and maximum gate loads. This IC's power dissipation results to an excessive temperature rise and should be considered when using IRU3038 for such an application. 10 www.irf.com Rev. 2.0 09/12/02 IRU3038 TYPICAL PERFORMANCE CHARACTERISTICS IRU3038 Output Voltage IRU3038 Transconductance (GM) 1.3 900 800 1.28 700 Max 600 Volts micro Mhos 1.26 1.24 500 400 300 Min 1.22 200 100 1.2 -40C -25C 0C +25C +50C 0 +75C +100C +125C +150C -40C Output Voltage Spec Max. Spec Min. -25C 0C +25C +50C +75C +100C Transconductance (GM) Figure 8 - Output voltage of IRU3038. Figure 9 - Transconductance of IRU3038. IRU3038 Rise Time / Fall Time C L = 1500pF 50 45 40 nano Seconds (ns) 35 30 25 20 15 10 5 0 -40C -25C 0C +25C Rise Time +50C +75C +100C Fall time Figure 10 - Rise and fall time of IRU3038. Rev. 2.0 09/12/02 www.irf.com 11 IRU3038 TYPICAL APPLICATION Single Supply 5V Input 5V D1 BAT54S L1 1uH C4 1uF C3 0.1uF Vcc VREF C5 0.1uF C1 33uF Tantalum Vc Q1 IRF7460 HDrv VP U1 SS IRU3038 C8 0.1uF C2 2x 10TPB100ML, 100uF, 55mV L2 D05022P-103, 3.3uH, 10A Q2 IRF7460 LDrv C7 2x 6TPC150M, 150uF, 40mV PGnd Rt C9 1800pF R4 26.1K 2.5V @ 8A R6 Fb Comp 1K, 1% Gnd R5 1K, 1% Figure 11 - Typical application of IRU3038 in an on-board DC-DC converter using a single 5V supply. 450 Fs (KHz) 400 350 300 250 200 150 0 50 100 150 200 250 Rt (K V ) Figure 12 - Switching frequency vs. Rt. 12 www.irf.com Rev. 2.0 09/12/02 IRU3038 TYPICAL APPLICATION 5V 12V C1 0.1uF C2 1uF Vcc C3 10TPB100M, 100uF, 55mV Q1 1/2 of IRF7313 HDrv U1 IRU3037 V DDQ 2.5V @ 3A C7 2x 6TPC150M, 150uF, 40mV R1 Fb 1K Gnd R2 33K R3 1K 5V 12V C9 0.1uF C10 1uF Vcc VR E F R4 1K SS C12 0.15uF HDrv U2 IRU3038 LDrv Rt Comp C11 10TPB100M, 100uF, 55mV Vc VP C14 2200pF L2 Q1 1/2 of IRF7313 Comp R5 1K 5V C4 47uF D03316P-103, 10uH, 3.9A LDrv C8 2200pF 1uH Vc SS C6 0.1uF L1 D1 BAT54 or 1N4148 Q2 1/2 of IRF7313 L3 D03316P-103, 10uH, 3.9A Q2 1/2 of IRF7313 PGnd Vtt (1.25V @ 3A) C13 2x 6TPC150M 150uF, 40mV Fb Gnd R6 33K Figure 13 - Typical application of IRU3038 for DDR memory when the termination voltage tracks the core voltage generated by IRU3037. Rev. 2.0 09/12/02 www.irf.com 13 IRU3038 DEMO-BOARD APPLICATION 5V to 2.5V @ 8A 5V D1 L1 C18 47uF 70m V C2 47uF 70m V 1uH C1 33uF V REF C4 1uF C3 1uF R12 Short V DDQ R13 Open R1 Open Vcc V REF R2 Short Vc HDrv U1 SS IRU3038 C8 0.1uF LDrv Q2 PGnd 3.3uH C9 470pF R6 4.7 V R8 2.5V @ 8A C10 150uF 40m V C11 150uF 40m V C12 1uF Gnd Fb Gnd R9 26.1K Q1 L2 VP Rt Comp C15 1800pF C6 1uF C5 0.1uF 1K, 1% R11 1K, 1% Figure 14 - Demo-board application of IRU3038. Application Parts List Ref Desig Description Q1, Q2 MOSFET U1 Controller D1 Diode L1 L2 C1 C2,C18 C10,C11 C5,C8 C4 C15 C9 C3,C6,C12 R9 R6 R8,R11 14 Inductor Inductor Cap, Tantalum Cap, Poscap Cap, Poscap Cap, Ceramic Cap, Ceramic Cap, Ceramic Cap, Ceramic Cap, Ceramic Resistor Resistor Resistor Value Qty Part# 20V, 10mV, 12A 2 IRF7460 Synchronous PWM 1 IRU3038 Fast Switching, 1 BAT54S Schottky 1mH, 10A 1 D03316P-102HC 3.3mH, 12A 1 D05022P-332HC 33mF, 16V 1 ECS-T1CD336R 47mF, 16V, 70mV 2 16TPB47M 150mF, 6.3V, 40mV 2 6TPC150M 0.1mF, Y5V, 25V 2 ECJ-2VF1E104Z 1mF, X7R, 25V 1 ECJ-3YB1E105K 1800pF, X7R, 50V 1 ECJ-2VB1H182K 470pF, X7R 1 ECJ-2VB2D471K 1mF, Y5V, 16V 3 ECJ-2VF1C105Z 26.1K, 5% 1 4.7V, 5% 1 1K, 1% 2 www.irf.com Manuf IR IR IR Coilcraft Coilcraft Panasonic Sanyo Sanyo Panasonic Panasonic Panasonic Panasonic Panasonic Web site (www.) irf.com coilcraft.com maco.panasonic.co.jp sanyo.com/industrial maco.panasonic.co.jp Rev. 2.0 09/12/02 IRU3038 TYPICAL PERFORMANCE CHARACTERISTICS VIN 94 Efficiency (%) 92 Vss 90 88 86 84 VOUT 82 80 0 1 2 3 4 5 6 7 8 9 Output Current (A) Figure 15 - Efficiency for IRU3038 Evaluation Board. VIN=5V, VOUT=2.5V Figure 16 - Start-up time @ IOUT=5A. Vss VOUT IOUT Figure 17 - Shutdoown the output by pulling down the soft-start. Figure 18 - 3.3V output voltage ripple @ IOUT=5A. 2A 4A 0A 0A Figure 19 - Transient response @ IOUT=0 to 2A. Rev. 2.0 09/12/02 Figure 20 - Transient response @ IOUT=0 to 4A. www.irf.com 15 IRU3038 (F) TSSOP Package 14-Pin A L Q R1 B 1.0 DIA C R E N M P O PIN NUMBER 1 F D DETAIL A DETAIL A G J H K SYMBOL DESIG A B C D E F G H J K L M N O P Q R R1 MIN 4.30 0.19 4.90 --0.85 0.05 08 0.50 0.09 0.09 14-PIN NOM 0.65 BSC 4.40 6.40 BSC --1.00 1.00 5.00 --0.90 --128 REF 128 REF --1.00 REF 0.60 0.20 ----- MAX 4.50 0.30 5.10 1.10 0.95 0.15 88 0.75 ----- NOTE: ALL MEASUREMENTS ARE IN MILLIMETERS. 16 www.irf.com Rev. 2.0 09/12/02 IRU3038 (S) SOIC Package 14-Pin Surface Mount, Narrow Body H A B C E DETAIL-A PIN NO. 1 L D DETAIL-A 0.386 0.015 x 458 K T F I J G 14-PIN SYMBOL A B C D E F G H I J K L T MIN MAX 8.56 8.74 1.27 BSC 0.51 REF 0.36 0.46 3.81 3.99 1.52 1.72 0.10 0.25 78 BSC 0.19 0.25 5.80 6.20 08 88 0.41 1.27 1.37 1.57 NOTE: ALL MEASUREMENTS ARE IN MILLIMETERS. Rev. 2.0 09/12/02 www.irf.com 17 IRU3038 PACKAGE SHIPMENT METHOD PKG DESIG PACKAGE DESCRIPTION PIN COUNT PARTS PER TUBE PARTS PER REEL T&R Orientation F TSSOP Plastic 14 100 2500 Fig A S SOIC, Narrow Body 14 55 2500 Fig B 1 1 1 1 Feed Direction Figure A 1 1 Feed Direction Figure B IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105 TAC Fax: (310) 252-7903 Visit us at www.irf.com for sales contact information Data and specifications subject to change without notice. 02/01 18 www.irf.com Rev. 2.0 09/12/02