TRS232 www.ti.com............................................................................................................................................ SLLS861A - AUGUST 2007 - REVISED SEPTEMBER 2008 DUAL RS-232 DRIVER/RECEIVER WITH IEC61000-4-2 PROTECTION FEATURES 1 * Meets or Exceeds TIA/RS-232-F and ITU Recommendation V.28 * Operates From a Single 5-V Power Supply With 1.0-F Charge-Pump Capacitors * Operates up to 120 kbit/s * Two Drivers and Two Receivers * 30-V Input Levels * Low Supply Current . . . 8 mA Typical * ESD Protection Exceeds JESD22 - 2000-V Human-Body Model (HBM) (A114-A) * Upgrade With Improved ESD (15-kV HBM) and 0.1-F Charge-Pump Capacitors Is Available With the TRS202 2 D, DW, N, NS, OR PW PACKAGE (TOP VIEW) C1+ VS+ C1- C2+ C2- VS- T2OUT R2IN 1 16 2 15 3 14 4 13 5 12 6 7 11 10 8 9 VCC GND T1OUT R1IN R1OUT T1IN T2IN R2OUT APPLICATIONS * * * * * TIA/RS-232-F Battery-Powered Systems Terminals Modems Computers DESCRIPTION/ORDERING INFORMATION The TRS232 is a dual driver/receiver that includes a capacitive voltage generator to supply TIA/RS-232-F voltage levels from a single 5-V supply. Each receiver converts TIA/RS-232-F inputs to 5-V TTL/CMOS levels. This receiver has a typical threshold of 1.3 V, a typical hysteresis of 0.5 V, and can accept 30-V inputs. Each driver converts TTL/CMOS input levels into TIA/RS-232-F levels. The driver, receiver, and voltage-generator functions are available as cells in the Texas Instruments LinASICTM library. 1 2 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. LinASIC is a trademark of Texas Instruments. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright (c) 2007-2008, Texas Instruments Incorporated TRS232 SLLS861A - AUGUST 2007 - REVISED SEPTEMBER 2008............................................................................................................................................ www.ti.com ORDERING INFORMATION TA PACKAGE PDIP - N SOIC - D 0C to 70C SOIC - DW SOP - NS TSSOP - PW PDIP - N SOIC - D -40C to 85C SOIC - DW SOP - NS TSSOP - PW (1) (2) 2 (1) (2) ORDERABLE PART NUMBER Tube of 25 TRS232CN Tube of 40 TRS232CD Reel of 2500 TRS232CDR Tube of 40 TRS232CDW Reel of 2000 TRS232CDWR Reel of 2000 TRS232CNSR Tube of 25 TRS232CPW Reel of 2000 TRS232CPWR Tube of 25 TRS232IN Tube of 40 TRS232ID Reel of 2500 TRS232IDR Tube of 40 TRS232IDW Reel of 2000 TRS232IDWR Reel of 2000 TRS232INSR Tube of 25 TRS232IPW Reel of 2000 TRS232IPWR TOP-SIDE MARKING TRS232CN TRS232C TRS232C TRS232C TRS232C TRS232IN TRS232I TRS232I TRS232I TRS232I Package drawings, thermal data, and symbolization are available at www.ti.com/packaging. For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI website at www.ti.com. Submit Documentation Feedback Copyright (c) 2007-2008, Texas Instruments Incorporated Product Folder Link(s): TRS232 TRS232 www.ti.com............................................................................................................................................ SLLS861A - AUGUST 2007 - REVISED SEPTEMBER 2008 FUNCTION TABLES ABC Each Driver (1) (1) INPUT TnIN OUTPUT TnOUT L H H L H = high level, L = low level Each Receiver (1) (1) INPUT RnIN OUTPUT RnOUT L H H L H = high level, L = low level LOGIC DIAGRAM (POSITIVE LOGIC) 11 14 T1IN T1OUT 10 7 T2IN T2OUT 12 13 R1OUT R1IN 9 8 R2OUT R2IN Submit Documentation Feedback Copyright (c) 2007-2008, Texas Instruments Incorporated Product Folder Link(s): TRS232 3 TRS232 SLLS861A - AUGUST 2007 - REVISED SEPTEMBER 2008............................................................................................................................................ www.ti.com Absolute Maximum Ratings (1) over operating free-air temperature range (unless otherwise noted) VCC Input supply voltage range (2) VS+ Positive-output supply voltage range VS- Negative-output supply voltage range VI Input voltage range VO Output voltage range Driver Operating virtual junction temperature Tstg Storage temperature range (1) (2) (3) (4) 6 V VCC - 0.3 15 V -0.3 -15 V -0.3 VCC + 0.3 UNIT V 30 T1OUT, T2OUT VS- - 0.3 VS+ + 0.3 R1OUT, R2OUT -0.3 VCC + 0.3 T1OUT, T2OUT Package thermal impedance (3) (4) TJ MAX Receiver Short-circuit duration JA MIN -0.3 V Unlimited D package 73 DW package 57 N package 67 NS package 64 PW package 108 -65 C/W 150 C 150 C Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. All voltages are with respect to network GND. Maximum power dissipation is a function of TJ(max), JA, and TA. The maximum allowable power dissipation at any allowable ambient temperature is PD = (TJ(max) - TA)/JA. Operating at the absolute maximum TJ of 150C can affect reliability. The package thermal impedance is calculated in accordance with JESD 51-7. Recommended Operating Conditions MIN NOM MAX 4.5 5 5.5 UNIT VCC Supply voltage VIH High-level input voltage T1IN, T2IN VIL Low-level input voltage T1IN, T2IN 0.8 V Receiver input voltage R1IN, R2IN 30 V TA TRS232C Operating free-air temperature TRS232I V 2 V 0 70 -40 85 C Electrical Characteristics (1) over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) (see Figure 4) PARAMETER ICC (1) (2) 4 TEST CONDITIONS Supply current VCC = 5.5 V, All outputs open, TA = 25C MIN TYP (2) MAX 8 10 UNIT mA Test conditions are C1-C4 = 1 F at VCC = 5 V 0.5 V. All typical values are at VCC = 5 V and TA = 25C. Submit Documentation Feedback Copyright (c) 2007-2008, Texas Instruments Incorporated Product Folder Link(s): TRS232 TRS232 www.ti.com............................................................................................................................................ SLLS861A - AUGUST 2007 - REVISED SEPTEMBER 2008 DRIVER SECTION abc Electrical Characteristics (1) over recommended ranges of supply voltage and operating free-air temperature range PARAMETER TEST CONDITIONS MIN VOH High-level output voltage T1OUT, T2OUT RL = 3 k to GND VOL Low-level output voltage (3) T1OUT, T2OUT RL = 3 k to GND ro Output resistance T1OUT, T2OUT VS+ = VS- = 0, VO = 2 V IOS (4) Short-circuit output current T1OUT, T2OUT VCC = 5.5 V, VO = 0 IIS T1IN, T2IN VI = 0 (1) (2) (3) (4) Short-circuit input current 5 TYP (2) MAX 7 -7 UNIT V -5 V 300 10 mA 200 A Test conditions are C1-C4 = 1 F at VCC = 5 V 0.5 V. All typical values are at VCC = 5 V and TA = 25C. The algebraic convention, in which the least-positive (most negative) value is designated minimum, is used in this data sheet for logic voltage levels only. Not more than one output should be shorted at a time. Switching Characteristics (1) VCC = 5 V, TA = 25C PARAMETER TEST CONDITIONS SR Driver slew rate RL = 3 k to 7 k, See Figure 2 SR(t) Driver transition region slew rate See Figure 3 Data rate One TnOUT switching (1) MIN TYP MAX UNIT 30 V/s 3 V/s 120 kbit/s Test conditions are C1-C4 = 1 F at VCC = 5 V 0.5 V. Submit Documentation Feedback Copyright (c) 2007-2008, Texas Instruments Incorporated Product Folder Link(s): TRS232 5 TRS232 SLLS861A - AUGUST 2007 - REVISED SEPTEMBER 2008............................................................................................................................................ www.ti.com RECEIVER SECTION abc Electrical Characteristics (1) over recommended ranges of supply voltage and operating free-air temperature range PARAMETER TEST CONDITIONS VOH High-level output voltage R1OUT, R2OUT IOH = -1 mA VOL Low-level output voltage (3) R1OUT, R2OUT IOL = 3.2 mA VIT+ Receiver positive-going input threshold voltage R1IN, R2IN VCC = 5 V, TA = 25C VIT- Receiver negative-going input threshold voltage R1IN, R2IN VCC = 5 V, TA = 25C Vhys Input hysteresis voltage R1IN, R2IN VCC = 5 V ri Receiver input resistance R1IN, R2IN VCC = 5 V, (1) (2) (3) MIN TYP (2) MAX 3.5 TA = 25C UNIT V 1.7 0.4 V 2.4 V 0.8 1.2 0.2 0.5 1 V V 3 5 7 k Test conditions are C1-C4 = 1 F at VCC = 5 V 0.5 V. All typical values are at VCC = 5 V and TA = 25C. The algebraic convention, in which the least-positive (most negative) value is designated minimum, is used in this data sheet for logic voltage levels only. Switching Characteristics (1) VCC = 5 V, TA = 25C (see Figure 1) TYP UNIT tPLH(R) Receiver propagation delay time, low- to high-level output PARAMETER 500 ns tPHL(R) Receiver propagation delay time, high- to low-level output 500 ns (1) 6 Test conditions are C1-C4 = 1 F at VCC = 5 V 0.5 V. Submit Documentation Feedback Copyright (c) 2007-2008, Texas Instruments Incorporated Product Folder Link(s): TRS232 TRS232 www.ti.com............................................................................................................................................ SLLS861A - AUGUST 2007 - REVISED SEPTEMBER 2008 PARAMETER MEASUREMENT INFORMATION VCC RL = 1.3 k R1OUT or R2OUT R1IN or R2IN Pulse Generator (see Note A) See Note C CL = 50 pF (see Note B) TEST CIRCUIT 10 ns Input 10% 10 ns 90% 50% 90% 50% 3V 10% 0V 500 ns tPLH tPHL VOH Output 1.5 V 1.5 V VOL WAVEFORMS A. The pulse generator has the following characteristics: ZO = 50 , duty cycle 50%. B. CL includes probe and jig capacitance. C. All diodes are 1N3064 or equivalent. Figure 1. Receiver Test Circuit and Waveforms for tPHL and tPLH Measurements Submit Documentation Feedback Copyright (c) 2007-2008, Texas Instruments Incorporated Product Folder Link(s): TRS232 7 TRS232 SLLS861A - AUGUST 2007 - REVISED SEPTEMBER 2008............................................................................................................................................ www.ti.com PARAMETER MEASUREMENT INFORMATION (continued) Pulse Generator (see Note A) T1OUT or T2OUT T1IN or T2IN RS-232 Output CL = 10 pF (see Note B) RL TEST CIRCUIT 10 ns 10 ns 90% 50% Input 10% 3V 90% 50% 10% 0V 5 s tPLH tPHL 90% Output VOH 90% 10% 10% VOL tTLH tTHL 0.8 (V SR + -V ) 0.8 (V -V ) OH OL OL OH or t t TLH THL WAVEFORMS A. The pulse generator has the following characteristics: ZO = 50 , duty cycle 50%. B. CL includes probe and jig capacitance. Figure 2. Driver Test Circuit and Waveforms for tPHL and tPLH Measurements (5-s Input) Pulse Generator (see Note A) T1OUT or T2OUT T1IN or T2IN RS-232 Output 3 k CL = 2.5 nF TEST CIRCUIT 10 ns 10 ns Input 90% 1.5 V 10% 90% 1.5 V 10% 20 s tTLH tTHL Output 3V 3V -3 V -3 V SR + VOH VOL 6V tTHL or t TLH WAVEFORMS A. The pulse generator has the following characteristics: ZO = 50 , duty cycle 50%. Figure 3. Test Circuit and Waveforms for tTHL and tTLH Measurements (20-s Input) 8 Submit Documentation Feedback Copyright (c) 2007-2008, Texas Instruments Incorporated Product Folder Link(s): TRS232 TRS232 www.ti.com............................................................................................................................................ SLLS861A - AUGUST 2007 - REVISED SEPTEMBER 2008 APPLICATION INFORMATION 5V CBYPASS = 1 F + - 16 1 C1 C1+ 1 F 3 1 F 5 From CMOS or TTL To CMOS or TTL 8.5 V VS+ VS- C2+ 1 F 2 C1- 4 C2 C3 VCC 6 -8.5 V C4 + C2- 11 14 10 7 12 13 9 8 0V 1 F RS-232 Output RS-232 Output RS-232 Input RS-232 Input 15 GND C3 can be connected to VCC or GND. A. Resistor values shown are nominal. B. Nonpolarized ceramic capacitors are acceptable. If polarized tantalum or electrolytic capacitors are used, they should be connected as shown. In addition to the 1-F capacitors shown, the TRS202 can operate with 0.1-F capacitors. Figure 4. Typical Operating Circuit Submit Documentation Feedback Copyright (c) 2007-2008, Texas Instruments Incorporated Product Folder Link(s): TRS232 9 PACKAGE OPTION ADDENDUM www.ti.com 22-Sep-2008 PACKAGING INFORMATION (1) Orderable Device Status (1) Package Type Package Drawing Pins Package Eco Plan (2) Qty TRS232D ACTIVE SOIC D 16 40 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TRS232DG4 ACTIVE SOIC D 16 40 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TRS232DR ACTIVE SOIC D 16 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TRS232DRG4 ACTIVE SOIC D 16 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TRS232DW ACTIVE SOIC DW 16 40 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TRS232DWG4 ACTIVE SOIC DW 16 40 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TRS232DWR ACTIVE SOIC DW 16 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TRS232DWRG4 ACTIVE SOIC DW 16 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TRS232ID ACTIVE SOIC D 16 40 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TRS232IDG4 ACTIVE SOIC D 16 40 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TRS232IDR ACTIVE SOIC D 16 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TRS232IDRG4 ACTIVE SOIC D 16 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TRS232IDW ACTIVE SOIC DW 16 40 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TRS232IDWG4 ACTIVE SOIC DW 16 40 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TRS232IDWR ACTIVE SOIC DW 16 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TRS232IDWRG4 ACTIVE SOIC DW 16 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TRS232IN ACTIVE PDIP N 16 25 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type TRS232INE4 ACTIVE PDIP N 16 25 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type TRS232N ACTIVE PDIP N 16 25 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type TRS232NE4 ACTIVE PDIP N 16 25 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type TRS232NS ACTIVE SO NS 16 50 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TRS232NSG4 ACTIVE SO NS 16 50 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TRS232NSR ACTIVE SO NS 16 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TRS232NSRG4 ACTIVE SO NS 16 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM The marketing status values are defined as follows: Addendum-Page 1 Lead/Ball Finish MSL Peak Temp (3) PACKAGE OPTION ADDENDUM www.ti.com 22-Sep-2008 ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. 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Addendum-Page 2 PACKAGE MATERIALS INFORMATION www.ti.com 14-Jul-2012 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant TRS232DR SOIC D 16 2500 330.0 16.4 6.5 10.3 2.1 8.0 16.0 Q1 TRS232DWR SOIC DW 16 2000 330.0 16.4 10.75 10.7 2.7 12.0 16.0 Q1 TRS232IDR SOIC D 16 2500 330.0 16.4 6.5 10.3 2.1 8.0 16.0 Q1 TRS232IDWR SOIC DW 16 2000 330.0 16.4 10.75 10.7 2.7 12.0 16.0 Q1 TRS232NSR SO NS 16 2000 330.0 16.4 8.2 10.5 2.5 12.0 16.0 Q1 Pack Materials-Page 1 PACKAGE MATERIALS INFORMATION www.ti.com 14-Jul-2012 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) TRS232DR SOIC D 16 2500 367.0 367.0 38.0 TRS232DWR SOIC DW 16 2000 367.0 367.0 38.0 TRS232IDR SOIC D 16 2500 333.2 345.9 28.6 TRS232IDWR SOIC DW 16 2000 367.0 367.0 38.0 TRS232NSR SO NS 16 2000 367.0 367.0 38.0 Pack Materials-Page 2 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. 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