Data Sheet
March 1997
L7554 Low-Power SLIC
Features
■
Low active power (typical 165 mW during on-hook
transmission)
■
Sleep state for low idle power (76 mW)
■
Quiet Tip/Ring polarity reversal
■
Supports meter pulse injection
■
Spare op amp for meter pulse filtering
■
–24 V to –72 V power supply operation
■
Distortion-free on-hook transmission
■
Convenient operating states:
— Forward powerup
— Polarity reversal powerup
— Forward low-power scan
— Polarity reversal low-power scan
— Ground start
— Disconnect (high impedance)
■
Adjustable supervision functions:
— Off-hook detector with longitudinal rejection
— Ground key detector
— Ring trip detector
■
Independent, adjustable, dc and ac parameters:
— dc feed resistance
— Loop current limit
— Termination impedance
■
Thermal protection
Description
This electronic subscriber loop interface circuit
(SLIC) is optimized for low-power consumption while
providing an extensive set of features.
Quiet polarity reversal is possible because the ac
path is uninterrupted during transition.
The L7554 includes the ground start state and a
summing node for meter pulse injection to 2.2 Vrms.
A spare, uncommitted op amp is included for meter
pulse filtering.
The device is being offered in two versions, based
upon maximum battery. The L7554AP is guaranteed
to –60 V, and the L7554BP is guaranteed to –72 V.
The device is available in a 44-pin PLCC package. It
is built by using a 90 V complementary bipolar
(CBIC) process.
2 Lucent Technologies Inc.
Data Sheet
March 1997
L7554 Low-Power SLIC
Table of Contents
Content Page
Features .................................................................................................................................................................. 1
Description ............................................................................................................................................................... 1
Pin Information ......................................................................................................................................................... 4
Functional Description.............................................................................................................................................. 6
Absolute Maximum Ratings ..................................................................................................................................... 6
Recommended Operating Conditions ..................................................................................................................... 7
Electrical Characteristics......................................................................................................................................... 7
Ring Trip Requirements..................................................................................................................................... 11
Test Configurations ............................................................................................................................................... 12
Applications ........................................................................................................................................................... 14
Design Considerations ....................................................................................................................................... 16
Characteristic Curves......................................................................................................................................... 17
dc Applications ................................................................................................................................................... 20
Battery Feed.................................................................................................................................................... 20
Overhead Voltage .......................................................................................................................................... 20
Adjusting Overhead Voltage ........................................................................................................................... 21
Adjusting dc Feed Resistance......................................................................................................................... 22
Adjusting Overhead Voltage and dc Feed Resistance Simultaneously .......................................................... 22
Loop Range..................................................................................................................................................... 22
Off-Hook Detection ......................................................................................................................................... 22
Ring Trip Detection......................................................................................................................................... 23
Ring Ground Detection................................................................................................................................... 23
ac Design ........................................................................................................................................................... 24
First-Generation Codecs.................................................................................................................................. 24
Second-Generation Codecs ............................................................................................................................ 24
Third-Generation Codecs ................................................................................................................................ 24
Selection Criteria ............................................................................................................................................. 24
PCB Layout Information ......................................................................................................................................... 26
Outline Diagram...................................................................................................................................................... 27
44-Pin PLCC....................................................................................................................................................... 27
Ordering Information........................................................................................................................................... 28
Lucent Technologies Inc. 3
Data Sheet
March 1997 L7554 Low-Power SLIC
Description
(continued)
12-2569 (C)
Figure 1. Functional Diagram
B0
B1
+
–
+
–
–1 V/24 mA
–
+
–
+
+
–
A = 4
A = –4
POWER CONDITIONING & REFERENCE
PT
PR
dc RESISTANCE
ADJUST
DCR
VBAT
IPROG
CF1
BGND
AGND
CF2
ICM
RTSN
RTSP
LCTH
RING GROUND
DETECTOR
RING TRIP DETECTOR
LOOP CLOSURE DETECTOR
BATTERY FEED
STATE CONTROL
SPARE
OP AMP
DCOUT
VITR
RCVP
RCVN
XMT
SN
NLC
RGDET
NRDET
1
B2
FB1
FB2
9.6
VTX TXI
0.1 µF
CEXTERNAL
3
RECTIFIER
VREG
VCC
4 Lucent Technologies Inc.
Data Sheet
March 1997
L7554 Low-Power SLIC
Pin Information
12-2571 (C)
Figure 2. Pin Diagram (PLCC Chip)
Table 1. Pin Descriptions
Pin Symbol Type Description
3I
PROG
I
Current-Limit Program Input.
A resistor to DCOUT sets the dc current limit of the
device.
8 V
CC
—
+5 V Power Supply.
9 RCVP I
Receive ac Signal Input (Noninverting).
This high-impedance input controls the ac
differential voltage on Tip and Ring.
10 RCVN I
Receive ac Signal Input (Inverting).
This high-impedance input controls the ac diff eren-
tial voltage on Tip and Ring.
11 TXI —
ac/dc Separation.
Connect a 0.1
µ
F capacitor from this pin to VTX
.
12 LCTH I
Loop Closure Threshold Input.
Connect a resistor to DCOUT to set off-hook threshold.
13 V
REG
I
Regulated Negative dc Battery Voltage.
Can be connected to an external regulator.
Otherwise, connect to V
BAT
.
14 DCOUT O
dc Output Voltage.
This output is a voltage that is directly proportional to the absolute
value of the differential Tip/Ring current.
15 V
BAT
—
Battery Supply.
Negative high-voltage power supply.
16 PR I/O
Protected Ring.
The output of the ring driv er amplifier and input to loop sensing circuitry.
Connect to loop through overvoltage protection.
18 CF2 —
Filter Capacitor 2.
Connect a 0.1
µ
F capacitor from this pin to AGND.
19 CF1 —
Filter Capacitor 1.
Connect a 0.47
µ
F capacitor from this pin to pin CF2.
I
PROG
NLC
NRDET
RTSP
RTSN
PT
RCVN
RCVP
V
CC
LCTH
V
REG
DCOUT
V
BAT
PR
BGND
DCR
AGND
AGND
B0
I
CM
VITR
CF2
CF1
7
9
10
11
12
13
14
15
16
17
8
6 4 3 2 1 44434241405
18 20 21 22 23 24 25 26 27 2819
39
37
36
35
34
33
32
31
30
29
38
FB2
B2
VTX
TXI
B1
XMT
SN
FB1
L7554
R
GDET
Lucent Technologies Inc. 5
Data Sheet
March 1997 L7554 Low-Power SLIC
Pin Information
(continued)
Table 1. Pin Descriptions
(continued)
Pin Symbol Type Description
20 VITR O
Transmit ac Output Voltage.
This output is a voltage that is directly proportional to the
differential ac Tip/Ring current.
21 I
CM
I
Common-Mode Current Sense.
To program ring ground sense threshold, connect a
resistor to V
CC
and connect a capacitor to AGND to filter 50/60 Hz. If unused, the pin can
be left unconnected.
22 R
GDET
O
Ring Ground Detect.
When high, this open-collector output indicates the presence of a
ring ground. To use, connect a 100 k
Ω
resistor to V
CC
.
23 B0 I
State Control Input.
B0, B1, and B2 determine the state of the SLIC. See Table 2.
24 AGND —
Analog Signal Ground
.
25 AGND —
Analog Signal Ground.
26 DCR I
dc Resistance for Low Loop Currents.
Leave open for dc feed resistance of 118
Ω
, or
short to DCOUT for 618
Ω
. Intermediate values can be set by a simple resistor divider
from DCOUT to ground with the tap at DCR.
27 BGND —
Battery Ground.
Ground return for the battery supply.
29 VTX O This output is a voltage that is directly proportional to the differential Tip/Ring current.
30 PT I/O
Protected Tip
. The output of the tip driver amplifier and input to loop sensing. Connect to
loop through overvoltage protection.
31 RTSN I
Ring Trip Sense Negative
. Connect this pin to the ringing generator signal through a
high-value resistor.
32 RTSP I
Ring Trip Sense Positive
. Connect this pin to the ring rela y and the ringer series resistor
through a high-value resistor.
33 NRDET O
Ring Trip Detector Output
. When low, this logic output indicates that ringing is tripped.
34 NLC O
Loop Detector Output
. When low, this logic output indicates an off-hook condition.
35 B2 I
State Control Input
. B0, B1, and B2 determine the state of the SLIC. See Table 2.
36 B1 I/O
State Control Input
. B0, B1, and B2 determine the state of the SLIC. See Table 2.
37 XMT O
Transmit ac Output Voltage
. The output of the uncommitted operational amplifier.
38 SN I
Summing Node
. The inverting input of the uncommitted operational amplifier. A resistor
or network to XMT sets the gain.
39 FB1 I
Forward Battery Slowdown.
A 0.1
µ
F capacitor from FB1 to AGND and from FB2 to
AGND will ramp the polarity reversal transition for added flexibility in applications requiring
quiet polarity reversal. If not needed, the pin can be left open.
40 FB2 I
Forward Battery Slowdown.
A 0.1
µ
F capacitor from FB2 to AGND and from FB1 to
AGND will ramp the polarity reversal transition for added flexibility in applications requiring
quiet polarity reversal. If not needed, the pin can be left open.
6 Lucent Technologies Inc.
Data Sheet
March 1997
L7554 Low-Power SLIC
Functional Description
Table 2. Input State Coding
Table 3. Supervision Coding
Absolute Maximum Ratings
(T
A
= 25
°
C)
Stresses in excess of the absolute maximum ratings can cause permanent damage to the device. These are abso-
lute stress ratings only. Functional operation of the device is not implied at these or any other conditions in excess
of those given in the operational sections of the data sheet. Exposure to absolute maximum ratings for extended
periods can adversely affect device reliability.
Note: The IC can be damaged unless all ground connections are applied bef ore, and removed after, all other connections. Furthermore, when
powering the device, the user must guarantee that no external potential creates a voltage on any pin of the device that exceeds the
device ratings. Some of the known examples of conditions that cause such potentials during powerup are the following: 1) an inductor
connected to Tip and Ring can force an overvoltage on V
BAT
through the protection devices if the V
BAT
connection chatters, and 2)
inductance in the V
BAT
lead could resonate with the V
BAT
filter capacitor to cause a destructive overvoltage.
B0 B1 B2 State/Definition
1 1 1
Powerup, Forward Battery.
Normal talk and battery feed state. Pin PT is positive with respect to
PR. On-hook transmission is enabled.
1 1 0
Powerup, Reverse Battery.
Normal talk and battery feed state. Pin PR is positive with respect to
PT. On-hook transmission is enabled.
0 1 1
Ground Start.
Tip drive amplifier is turned off. The device presents a high-impedance (>100 k
Ω
)
to the PT pin and a current-limited battery to the PR pin. Output pin RGDET indicates current flow-
ing in the ring lead.
0 1 0
Low-Power Scan, Reverse Battery.
Except for off-hook supervision, all circuits are shut down to
conserve power. Pin PR is positive with respect to PT. On-hook transmission is disabled.
0 0 1
Low-Power Scan, Forward Battery.
Except for off-hook supervision, all circuits are shut down to
conserve power. Pin PT is positive with respect to PR. On-hook transmission is disabled.
0 0 0
Disconnect.
The Tip and Ring amplifiers are turned off and the SLIC goes to a high-impedance
state (>100 k
Ω
).
Pin NLC Pin NRDET Pin RGDET
0 = off-hook
1 = on-hook 0 = ring trip
1 = no ring trip 1 = ring ground
0 = no ring ground
Parameter Symbol Value Unit
5 V Power Supply V
CC
7.0 V
Battery (Talking) Supply V
BAT
–75 V
Logic Input Voltage — –0.5 to +7.0 V
Analog Input Voltage — –7.0 to +7.0 V
Maximum Junction Temperature T
J
165
°
C
Storage Temperature Range T
stg
–40 to +125
°
C
Relative Humidity Range R
H
5 to 95 %
Ground Potential Difference (BGND to AGND) —
±
3 V
PT or PR Fault Voltage (dc) V
PT
, V
PR
(V
BAT
– 5) to +3 V
PT or PR Fault Voltage (10 x 1000
µ
s) V
PT
, V
PR
(V
BAT
– 15) to +15 V
Current into Ring Trip Inputs I
RTSP
, I
RTSN
±
240
µA
Lucent Technologies Inc. 7
Data Sheet
March 1997 L7554 Low-Power SLIC
Recommended Operating Conditions
Electrical Characteristics
Minimum and maximum v alues are testing requirements . Typical values are characteristic of the de vice and are the
result of engineering evaluations. Typical values are for information purposes only and are not part of the testing
requirements. Minimum and maximum values apply across the entire temperature range (–40 °C to +85 °C) and
the entire battery range unless otherwise specified. Typical is defined as 25 °C, VCC = 5.0 V, VBAT = –48 V, and
ILIM = 40 mA. Positive currents flow into the device. Test circuit is Figure 4 unless noted.
Table 4. Power Supply
1. This parameter is not tested in production. It is guaranteed by design and device characterization.
Parameter Min Typ Max Unit
Ambient Temperature –40 — 85 °C
VCC Supply Voltage 4.75 5.0 5.25 V
VBAT Supply Voltage:
L7554AP
L7554BP –24
–24 –40
–48 –60
–72
V
V
Loop Closure Threshold-detection Programming Range — 10 ILIM mA
dc Loop Current-limit Programming Range 5 40 45 mA
On- and Off-hook 2-wire Signal Level — 1 2.2 Vrms
ac Termination Impedance Programming Range 150 600 1300 Ω
Parameter Min Typ Max Unit
Power Supply—Powerup, No Loop Current
ICC
IBAT (VBAT = –48 V)
Power Dissipation (VBAT = –48 V)
—
—
—
4.1
–3.0
165
4.8
–3.5
191
mA
mA
mW
Power Supply—Low-Power Scan, Forward Bat, No Loop
Current
ICC
IBAT (VBAT = –48 V)
Power Dissipation (VBAT = –48 V)
—
—
—
2.7
–1.4
82
3.7
–1.7
100
mA
mA
mW
Power Supply Rejection 500 Hz to 3 kHz
(See Figures 5, 6, 15, and 16.)1
VCC
VBAT 35
45 —
——
—dB
dB
Thermal Protection Shutdown (Tjc) — 175 — °C
Thermal Resistance, Junction to Ambient (θJA) — 47 — °C/W
8 Lucent Technologies Inc.
Data Sheet
March 1997
L7554 Low-Power SLIC
Electrical Characteristics (continued)
Table 5. 2-Wire Port
1. The longitudinal current is independent of dc loop current.
2. Current-limit ILIM is programmed b y a resistor, R PROG, from pin IPROG to DCOUT. ILIM is specified at the loop resistance where current limiting
begins (see Figure 25). Select RPROG (kΩ) = 1.67 x ILIM (mA).
3.
IEEE
is a registered trademark of The Institute of Electrical and Electronics Engineers, Inc.
4. Longitudinal balance of circuit card will depend on loop series resistance matching (see Figures 23 and 24).
5. This parameter is not tested in production. It is guaranteed by design and device characterization.
Parameter Min Typ Max Unit
Tip or Ring Drive Current
= dc + Longitudinal + Signal Currents 65 — — mA
Signal Current 15 — — mArms
Longitudinal Current Capability per Wire18.5 15 — mArms
dc Loop Current Limit2
RLOOP = 100 Ω
Programmability Range
Accuracy (20 mA < ILIM < 40 mA)
—
5
—
ILIM
—
—
—
45
±12
mA
mA
%
Powerup Open Loop Voltage Levels
Common-mode Voltage
Differential Voltage:
VBAT = –48 V, Temperature = 25 °C
VBAT = –72 V, Temperature = 85 °C (L7554BP)
—
|VBAT + 7.0|
|VBAT + 10.0|
VBAT/2
|VBAT + 6.5|
|VBAT + 6.8|
—
|VBAT + 6.0|
—
V
V
V
Disconnect State
PT Resistance (VBAT < VPT < 0 V)
PR Resistance (VBAT < VPR < 0 V) 100
100 143
133 —
—kΩ
kΩ
Ground Start State
PT Resistance 100 143 — kΩ
dc Feed Resistance (for ILOOP below regulation level) 90 113 133 Ω
Loop Resistance Range (–3.17 dBm overload into
600 Ω; not including protection)
ILOOP = 20 mA at VBAT = –48 V
ILOOP = 20 mA at VBAT = –24 V 1900
700 —
——
—Ω
Ω
Longitudinal to Metallic Balance—
IEEE
3 Std. 455
(See Figure 7.)4
50 Hz to 1 kHz
1 kHz to 3 kHz 64
60 75
70 —
—dB
dB
Metallic to Longitudinal Balance
200 Hz to 4 kHz 46 — — dB
RFI Rejection (See Figure 8.)5
0.5 Vrms, 50 Ω Source, 30% AM Mod. 1 kHz
500 kHz to 100 MHz —–55 –45 dBV
Lucent Technologies Inc. 9
Data Sheet
March 1997 L7554 Low-Power SLIC
Electrical Characteristics (continued)
Table 6. Analog Pin Characteristics
1. Loop closure threshold is programmed by resistor RLCTH from pin LCTH to pin DCOUT.
2. Ring ground threshold is programmed by resistor RICM2 from pin ICM to VCC.
Table 7. Uncommitted Op Amp Characteristics
Parameter Min Typ Max Unit
Differential PT/PR Current Sense (DCOUT)
Gain (PT/PR to DCOUT)
Offset Voltage @ ILOOP = 0, VBAT = –48 V –119
–200 –125
—–127
200 V/A
mV
Loop Closure Detector Threshold1
Programming Accuracy — — ±20 %
Ring Ground Detector Threshold2
RICM = 83 kΩ
Programming Accuracy 3
—6
—10
±25 kΩ
%
Ring Trip Comparator
Input Offset Voltage — — ±10 mV
RCVN, RCVP
Input Bias Current — –0.2 –1 µA
Parameter Min Typ Max Unit
Input Offset Voltage
Input Offset Current
Input Bias Current
Differential Input Resistance
—
—
—
—
±5
±10
200
1.5
—
—
—
—
mV
nA
nA
MΩ
Output Voltage Swing (RL = 10 kΩ)
Output Resistance (AVCL = 1) —
—±3.5
2.0 —
—Vpk
Ω
Small Signal GBW — 700 — kHz
10 Lucent Technologies Inc.
Data Sheet
March 1997
L7554 Low-Power SLIC
Electrical Characteristics (continued)
Table 8. ac Feed Characteristics
1. Set by external components. Any complex impedance R1 + R2 || C between 150 Ω and 1300 Ω can be synthesized.
2. This parameter is not tested in production. It is guaranteed by design and device characterization.
3. Return loss and transhybrid loss are functions of device gain accuracies and the external hybrid circuit. Guaranteed performance assumes
1% tolerance of external components.
Parameter Min Typ Max Unit
ac Termination Impedance1 150 — 1300 Ω
Longitudinal Impedance2— 40 46 Ω
Total Harmonic Distortion—200 Hz to 4 kHz2
Off-hook
On-hook —
——
—0.3
1.0 %
%
Transmit Gain, f = 1 kHz (PT/PR to VITR)
Transmit Accuracy in dB, 25 °C
Transmit Accuracy in dB, Full Temperature Range
—
–0.15
–0.22
–400
0
0
—
0.15
0.22
V/A
dB
dB
Receive + Gain, f = 1 kHz (RCVP to PT/PR)
Receive – Gain, f = 1 kHz (RCVN to PT/PR)
Receive Accuracy in dB, 25 °C
Receive Accuracy in dB, Full Temperature Range
—
—
–0.18
–0.25
8.00
–8.00
0
0
—
—
0.18
0.25
–
–
dB
dB
Gain vs. Frequency (transmit and receive)
(600 Ω termination; reference 1 kHz2)
200 Hz to 300 Hz
300 Hz to 3.4 kHz
3.4 kHz to 16 kHz
16 kHz to 266 kHz
–1.00
–0.3
–0.5
—
0.0
0.0
–0.1
—
0.05
0.05
0.3
2.0
dB
dB
dB
dB
Gain vs. Level (transmit and receive)(reference 0 dBV2)
–50 dB to +3 dB –0.05 0 0.05 dB
Return Loss3
200 Hz to 500 Hz
500 Hz to 3400 Hz 20
26 24
29 —
—dB
dB
2-wire Idle-channel Noise (600 Ω termination)
Psophometric
C-message
3 kHz Flat
—
—
—
–87
2
10
–77
12
20
dBmp
dBrnC
dBrn
Transmit Idle-channel Noise
Psophometric
C-message
3 kHz flat
—
—
—
–82
7
15
–77
12
20
dBmp
dBrnC
dBrn
Transhybrid Loss3
200 Hz to 500 Hz
500 Hz to 3400 Hz 21
26 24
29 —
—dB
dB
Data Sheet
March 1997
Lucent Technologies Inc. 11
L7554 Low-Power SLIC
Electrical Characteristics (continued)
Table 9. Logic Inputs and Outputs
All outputs except RGDET are open-collector with internal pull-up resistor. RGDET is open-collector without inter-
nal pull-up.
Parameter Symbol Min Typ Max Unit
Input Voltages
Low Level (permissible range)
High Level (permissible range) VIL
VIH –0.5
2.0 0.4
2.4 0.7
VCC V
V
Input Currents
Low Level (VCC = 5.25 V, VI = 0.4 V)
High Level (VCC = 5.25 V, VI = 2.4 V) IIL
IIH —
—–115
–60 –200
–100 µA
µA
Output Voltages (open-collector with internal pull-up
resistor)
Low Level (VCC = 4.75 V, IOL = 360 µA)
High Level (VCC = 4.75 V, IOH = –20 µA) VOL
VOH 0
2.4 0.2
—0.4
VCC V
V
Ring T rip Requirements
■ Ringing signal:
— Voltage, minimum 35 Vrms, maximum 100 Vrms.
— Frequency, 17 Hz to 23 Hz.
— Crest factor, 1.4 to 2.
■ Ringing trip:
— ≤100 ms (typical), ≤250 ms (VBAT = –33 V, loop
length = 530 Ω).
■ Pretrip:
— The circuits in Figure 3 will not cause ringing trip.
12-2572 (C)
Figure 3. Ring Trip Circuits
RING
RING
RING
100 Ω
10 kΩ
6 µF
TIP
TIP
TIP
2 µF
200 Ω
SWITCH CLOSES < 12 ms
12 Lucent Technologies Inc.
Data Sheet
March 1997
L7554 Low-Power SLIC
Test Configurations
12-2570 (C)
Figure 4. L7554 Basic Test Circuit
B1
NLC
V
BAT
VBAT BGND VCC AGND
V
CC
0.1 µF 0.1 µF
PT
PR
IPROG
DCOUT
LCTH
RTSP
RTSN
ICM
VTR
SN
RCVP
B0
CF1
20 kΩ
20 kΩ
VREG
XMT
RCVN
NRDET
RGDET
0.1 µF
CF2
RLOOP
XMT
65 kΩ
10 kΩRCV
68.1 kΩ
24.9 kΩ
L7554
SLIC
26 kΩ
VTX TXI FB2 FB1
0.1 µF
B2
0.1 µF
100 Ω
100 Ω
PSRR = 20 log
12-2335.a (C)
Figure 5. Metallic PSRR
PSRR = 20 log
12-2336.a (C)
Figure 6. Longitudinal PSRR
4.7 µF
100 Ω
V
BAT
OR
V
CC
DISCONNECT
BYPASS CAP
V
T/R
900 Ω
V
BAT
OR V
CC
TP
PR
BASIC
TEST CIRCUIT
+
–
V
S
VS
VT/R
----------
V
S
4.7 µF
100 Ω
V
BAT
OR
V
CC
DISCONNECT
BYPASS CAP
56.3 Ω
V
BAT
OR V
CC
PT
PR
BASIC
TEST CIRCUIT
67.5 Ω
10 µF
10 µF
67.5 Ω
V
M
+
–
VS
VM
-------
Data Sheet
March 1997
Lucent Technologies Inc. 13
L7554 Low-Power SLIC
Test Configurations (continued)
LONGITUDINAL BALANCE = 20 log
12-2584 (C)
Figure 7. Longitudinal Balance
12-2586 (C)
Figure 8. RFI Rejection
12-2585 (C)
Figure 9. Longitudinal Impedance
12-2587 (C)
Figure 10. ac Gains
PT
PR
BASIC
TEST CIRCUIT
368 Ω
100 µF
100 µF
368 Ω
VM
+
–
VS
VS
VM
-------
BASIC
TEST CIRCUIT
V
S
= 0.5 Vrms 30% AM 1 kHz MODULATION,
f = 500 kHz––1 MHz
DEVICE IN POWERUP MODE, 600 Ω TERMINATION
PT
PR
V
BAT
0.01 µF
0.01 µF
600 Ω
2.15
µF
82.5 Ω
82.5 Ω
HP4935A
TIMS
50 Ω
12
4
6,7
V
S
LB1201
PT
PR
BASIC
TEST CIRCUIT
+
–
+
–
ILONG
ILONG
VPT
VPR
ZLONG = OR
∆ VPT
∆ ILONG
∆ VPR
∆ ILONG
PT
PR
BASIC
TEST CIRCUIT
600 ΩV
T/R
+
–
G
XMT
=V
XMT
V
T/R
G
RCV
=V
T/R
V
RCV
XMT
RCV
V
S
14 Lucent Technologies Inc.
Data Sheet
March 1997
L7554 Low-Power SLIC
Applications
12-2573 (C)
Figure 11. Basic Loop Start Application Circuit Using T7513 Type Codec
12-2821 (C)
Figure 12. Ground Start Application Circuit
R
PROG
66.8 kΩ
R
LCTH
24.9 kΩ
TIP R
PT
20 Ω
RING
250 V PROT
R
PR
L7581
RELAY
PT
30
0.1 µF
C
CC
14 DCOUT
3
12 LCTH
V
CC
8V
CC
20 ΩPR
16
RTSP
32
R
TS1
402 ΩC
RTS2
0.27 µF
RTSN
31
R
TS2
274 kΩR
TSN
2.0 MΩ
V
RING
V
BAT
CF2
18 CF1
19
C
F1
0.47 µF
AGND
24 AGND
25 BGND
27
I
PROG
V
BAT
15
C
BAT
0.1 µF
VITR
RCVP
RCVN
20
9
10 R
GP
20.0 kΩ
R
T1
86.6 kΩ
R
T2
18.7 kΩ
R
RCV
48.7 kΩ
R
HB1
28.0 kΩ
VFXIN
VFXIP
R
X
28.0 kΩ
GSX
PWROP
PWRON
GSR
DX
DR
FSX
FSR
MC
PD
CLKSEL
A/µ
T7513
CODEC
CONTROL
INPUTS
PCM
HIGHWAY
SYNCH
AND
CLOCK
–
+
L7554
SLIC
B1
B0 36
23
CONTROL
INPUTS
NLC
NRDET 34
33 SUPERVISION
OUTPUTS
C
RTS1
0.022 µF
TXI
V
TX
CB2
0.1 µF
29
11
B2 35
R
TSP
2.0 MΩ
C
GP
330 pF
C
F2
0.1 µF
V
BAT
V
REG
VCC
RGDET
100 kΩ
RGDET
ICM
0.47 µF
CICM
LOOP START
APPLICATION CIRCUIT 22
21 82.5 kΩ
RICM2
Lucent Technologies Inc. 15
Data Sheet
March 1997 L7554 Low-Power SLIC
Applications (continued)
Table 10. Parts List for Loop Start and Ground Start Applications
Name Value Function
Integrated Circuits
SLIC L7554 Subscriber loop interface circuit (SLIC).
Protector 250 V Th yristor type Secondary protection.
Ringing Relay L7581 Switches ringing signals.
Codec T7513 First-generation codec.
Overvoltage Protection
RPT 20 Ω, Fusible Protection resistor.
RPR 20 Ω, Fusible Protection resistor.
Power Supply
CBAT1 0.1 µF, 20%, 100 V VBAT filter capacitor.
CCC 0.1 µF, 20%, 10 V VCC filter.
CF1 0.47 µF, 20%, 100 V With CF2, improves idle channel noise.
CF2 0.1 µF, 20%, 100 V With CF1, improves idle channel noise.
dc Profile
RPROG 66.8 kΩ, 1%, 1/4 W Sets dc loop current limit.
ac Characteristics
CB2 0.1 µF, 20%, 100 V ac/dc separation capacitor.
CGB 330 µF, 20%, 10 V Loop stability.
RT1 86.6 kΩ, 1%, 1/4 W With RGP and RRCV, sets ac termination impedance.
RRCV 48.7 kΩ, 1%, 1/4 W With RGP and RT1, sets receive gain.
RGP 20.0 kΩ, 1%, 1/4 W With RT1 and RRCV, sets ac termination impedance
and receive gain.
CGP 330 pF, 10 V, 20% Loop stability.
RT2 18.7 kΩ, 1%, 1/4 W With RX, sets transmit gain in codec.
RX28.0 kΩ, 1%, 1/4 W With RT2, sets transmit gain in codec.
RHB1 28.0 kΩ, 1%, 1/4 W Sets hybrid balance.
Supervision
RLCTH 24.9 kΩ, 1%, 1/4 W Sets loop closure (off-hook) threshold.
RTS1 402 Ω, 5%, 2 W Ringing source series resistor.
RTS2 274 kΩ, 5%, 1/4 W With CRTS2, forms first pole of a double pole,
2 Hz ring trip sense filter.
CRTS1 0.022 µF, 20%, 5 V With RTSN, RTSP, forms second 2 Hz filter pole.
CRTS2 0.27 µF, 20%, 100 V With RTS2, forms first 2 Hz filter pole.
RTSN 2 MΩ, 5%, 1/4 W With CRTS1, RTSP, forms second 2 Hz filter pole.
RTSP 2 MΩ, 5%, 1/4 W With CRTS1, RTSN, forms second 2 Hz filter pole.
Ground Start
CICM 0.47 µF, 20%, 10 V Provides 60 Hz filtering for ring ground detection.
RGDET 100 kΩ, 20%, 1/4 W Digital output pull-up resistor.
RICM2 82.5 kΩ, 1%, 1/4 W Sets ring ground detection threshold.
16 Lucent Technologies Inc.
Data Sheet
March 1997
L7554 Low-Power SLIC
Applications (continued)
Design Considerations
Table 11 shows the design parameters of the application circuit shown in Figure 11. Components that are adjusted
to program these values are also shown.
Table 11. 600 Ω Design Parameters
Design Parameter Parameter Value Components Adjusted
Loop Closure Threshold 10 mA RLCTH
dc Loop Current Limit 40 mA RPROG
dc Feed Resistance 183 Ω RPT, RPR
2-wire Signal Overload Level 3.14 dBm —
ac Termination Impedance 600 Ω RT1, RGP, RRCV
Hybrid Balance Line Impedance 600 ΩRHB1
Transmit Gain 0 dB RT2, RX
Receive Gain 0 dB RRCV, RGP, RT1
Data Sheet
March 1997
Lucent Technologies Inc. 17
L7554 Low-Power SLIC
Applications (continued)
Characteristic Curves
12-2828 (C)
Figure 13. 7551 Receive Gain and Hybrid Balance
vs. Frequency
12-2829 (C)
Figure 14. 7551 Transmit Gain and Return Loss vs.
Frequency
12-2830 (C)
Figure 15. 7551 Typical VCC Power Supply Rejection
12-2871 (C)
Figure 16. 7551 Typical VBAT Power Supply
Rejection
FREQUENCY (Hz)
100 10
5
–20
–10
0
10
4
–50
–40
–30
RECEIVE GAIN
1000
HYBRID BALANCE
(dB)
100 1000 10
4
10
5
–50
–30
–20
–10
0
FREQUENCY (Hz)
–40
TRANSMIT GAIN
RETURN LOSS
(dB)
10 100 10
5
10
6
–80
–70
–20
–10
0
FREQUENCY (Hz)
1000 10
4
–50
–40
–60
–30
PSRR (dB)
CURRENT
LIMIT
BELOW
CURRENT
LIMIT
SPEC.
10 100 10
5
10
6
–80
–70
–20
–10
0
FREQUENCY (Hz)
1000 10
4
–50
–40
–60
–30
PSRR (dB)
BELOW
CURRENT
LIMIT
SPECIFICATION RANGE
CURRENT
LIMIT
18 Lucent Technologies Inc.
Data Sheet
March 1997
L7554 Low-Power SLIC
Applications (continued)
Characteristic Curves (continued)
Note: VBAT = –48 V.
12-3015 (C)
Figure 17. Loop Closure Program Resistor
Selection
Note: Tip lead is open; VBAT = –48 V.
12-3016 (C)
Figure 18. Ring Ground Detection Programming
Note: VBAT = –48 V; ILIM = 22 mA; RDC1 = 113 Ω.
12-3050 (C)
Figure 19. Loop Current vs. Loop Voltage
Note: VBAT = –48 V; ILIM = 22 mA; RDC1 = 113 Ω.
12-3051 (C)
Figure 20. Loop Current vs. Loop Resistance
0
5
20
25
0 102030 60
LOOP CLOSURE THRESHOLD RESISTOR, R
LCTH
(kΩ)
50
15
10
40
OFF-HOOK THRESHOLD LOOP CURRENT
(mA)
AMBIENT TEMPERATURE, T
A
(°C)
20 40 60 140 180
0
500
1000
1500
2000
80 100 120 160
STILL AIR
47 °C/W
300 cu. ft./ min.
36 °C/W
POWER (mW)
LOOP CURRENT (mA)
01020 50
0
20
30
40
50
LOOP VOLTAGE (V)
30 40
10
1
10 kΩI
LIM
–1
R
DC1
LOOP RESISTANCE, R
LOOP
(Ω)
0 500 1000 2000
0
20
30
40
50
1500
10
LOOP CURRENT (mA)
Data Sheet
March 1997
Lucent Technologies Inc. 19
L7554 Low-Power SLIC
Applications (continued)
Characteristic Curves (continued)
Note: VBAT = –48 V; ILIM = 22 mA; RDC1 = 113 Ω.
12-3052 (C)
Figure 21. 7551 Typical SLIC Power Dissipation vs.
Loop Resistance
12-2825 (C)
Figure 22. Power Derating
12-3019 (C)
Figure 23. Longitudinal Balance Resistor Mismatch
Requirements
12-3021 (C)
Figure 24. Longitudinal Balance vs. Protection
Resistor Mismatch
LOOP RESISTANCE, R
LOOP
(Ω)
0 500 1000 2000
0
1000
1500
1500
500
SLIC POWER DISSIPATION (mW)
AMBIENT TEMPERATURE, TA (°C)
20 40 60 140 180
0
500
1000
1500
2000
80 100 120 160
STILL AIR
47 °C/W
300 cu. ft./ min.
36 °C/W
POWER (mW)
0
8
0 20 60 100 120
PROTECTION RESISTOR VALUE (Ω)
7
6
5
4
3
2
1
40 80
49 dB, RP MATCHED TO 1.5 Ω
58 dB, RP MATCHED
TO 0.5 Ω
PROTECTION RESISTOR MISMATCH (%)
40
60
0.0 0.5 1.5 2.5
PROTECTION RESISTOR MISMATCH (Ω)
55
50
45
1.0 2.0
LONGITUDINAL BALANCE (dB)
2020 Lucent Technologies Inc.
Data Sheet
March 1997
L7554 Low-Power SLIC
Applications (continued)
dc Applications
Battery Feed
The dc feed characteristic can be described by:
where:
IL = dc loop current.
VT/R = dc loop voltage.
|VBAT| = battery voltage magnitude.
VOH = overhead voltage. This is the difference between
the battery voltage and the open loop Tip/Ring
voltage.
RL = loop resistance, not including protection resistors.
RP = protection resistor value.
Rdc = SLIC internal dc feed resistance.
The design begins by drawing the desired dc template.
An example is shown in Figure 25.
Note: VBAT = –48 V; ILIM = 22 mA; RDC1 = 113 Ω.
12-3050 (C)
Figure 25. Loop Current vs. Loop Voltage
Starting from the on-hook condition and going through
to a short circuit, the curve passes through two regions:
Region 1; On-hook and low loop currents. The slope
corresponds to the dc resistance of the SLIC, RDC1 (de-
fault is 113 Ω typical). The open-circuit voltage is the
battery voltage less the overhead voltage of the device,
VOH (default is 6.5 V typical). These values are suitable
for most applications, but can be adjusted if needed. For
more information, see the sections entitled Adjusting dc
Feed Resistance and Adjusting Overhead Voltage.
Region 2; Current limit. The dc current is limited to a val-
ue determined by external resistor RPROG. This region of
the dc template has a high resistance (10 kΩ).
Calculate the external resistor as follows:
RPROG (kΩ) = 1.67 ILIM (mA)
Overhead V oltage
In order to drive an on-hook ac signal, the SLIC must
set up the Tip and Ring v oltage to a value less than the
battery voltage. The amount that the open loop v oltage
is decreased relative to the battery is referred to as the
overhead voltage. Expressed as an equation,
VOH = |VBAT| – (VPT – VPR)
Without this buffer voltage, amplifier saturation will
occur and the signal will be clipped. The 7551 is auto-
matically set at the f actory to allow undistorted on-hook
transmission of a 3.17 dBm signal into a 900 Ω loop
impedance. For applications where higher signal lev els
are needed, e.g., periodic pulse metering, the 2-wire
port of the SLIC can be programmed with pin DCR.
The drive amplifiers are capable of 4 Vrms minimum
(VAMP). Referring to Figure 26, the internal resistance
has a worst-case value of 46 Ω. So, the maximum sig-
nal the device can guarantee is:
Thus, RP ≤ 35 Ω allo ws 2.2 Vrms metering signals. The
next step is to determine the amount of overhead volt-
age needed. The peak voltage at output of Tip and
Ring amplifiers is related to the peak signal voltage by:
VTR⁄VBAT VOH–()RL×
R
L2RPRdc++
--------------------------------------------
=
ILVBAT VOH–
RL2RPRdc++
-----------------------------------
=
LOOP CURRENT (mA)
01020 50
0
20
30
40
50
LOOP VOLTAGE (V)
30 40
10
1
10 kΩI
LIM
–1
R
DC1
VT/R 4 V ZT/R
ZT/R 2RP46+()+
-----------------------------------------
=
vamp = vT/R 12R
P40 Ω+()
ZTR⁄
------------------------------
+
Λ
Λ
Lucent Technologies Inc. 21
Data Sheet
March 1997 L7554 Low-Power SLIC
Applications (continued)
dc Applications (continued)
12-2563 (C)
Figure 26. SLIC 2-Wire Output Stage
In addition to the required peak signal level, the SLIC
needs about 2 V from each power supply to bias the
amplifier circuitry. It can be thought of as an internal
saturation voltage. Combining the saturation voltage
and the peak signal le vel, the required ov erhead can be
expressed as:
where VSAT is the combined internal saturation v oltage
between the Tip/Ring amplifiers and VSAT (4.0 V typ.).
RP (Ω) is the protection resistor value, and 40 Ω is the
output series resistance of each internal amplifier.
ZT/R (Ω) is the ac loop impedance.
Example 1, On-hook Transmission of a Meter Pulse:
Signal level: 2.2 Vrms into 200 Ω
35 Ω protection resistors
ILOOP = 0 (on-hook transmission of the metering
signal)
Accounting for VSAT tolerance of 0.5 V, a nominal
overhead of 9.9 V would ensure transmission of an
undistorted 2.2 V metering signal.
Adjusting Overhead Voltage
To adjust the open loop 2-wire voltage, pin DCR is
programmed at the midpoint of a resistive divider from
ground to either –5 V or VBAT. In the case of –5 V, the
overhead voltage will be independent of the battery
voltage. Figure 27 shows the equivalent input circuit to
adjust the overhead.
12-2562 (C)
Figure 27. Equivalent Circuit for Adjusting the
Overhead V oltage
The overhead voltage is programmed by using the fol-
lowing equation:
VOH = 6.5 – 4 VDCR
–
VT/R [ZT/R]VAMP
+
–
ROC/2
RP
RP
+
ROC/2
VOH VSAT 12R
P40Ω+()
ZTR⁄
------------------------------
+
v
TR⁄+= Λ
VSAT 12R
P40 Ω+()
ZTR⁄
------------------------------
+
2ZTR⁄
1000
---------------- 10dBm 20⁄
×+
=
VOH 4.0 1 235 40+()
200
----------------------------+
2 2.2
()+=
9.4 V=
DCR
25 kΩ ± 30%
R1
R2
–5 V
6.5 4 5 R1 25 kΩ
||
R2R1 25kΩ
||
+
--------------------------------------
×–
–=
6.5 20 R1 25 kΩ
||
R2R1 25kΩ
||
+
--------------------------------------
+=
2222 Lucent Technologies Inc.
Data Sheet
March 1997
L7554 Low-Power SLIC
Applications (continued)
dc Applications (continued)
Adjusting dc Feed Resistance
The dc feed resistance may be adjusted with the help of
Figure 28.
12-2560 (C)
Figure 28. Equivalent Circuit for Adjusting the dc
Feed Resistance
Adjusting Overhead Voltage and dc Feed
Resistance Simultaneously
The following paragraphs describe the independent set-
ting of the overhead voltage and the dc feed resistance.
If both need to be set to customized values, combine
the two circuits as shown in Figure 29.
12-2561 (C)
Figure 29. Adjusting Both Overhead Voltage and dc
Feed Resistance
This is an equivalent circuit for adjusting both the dc
feed resistance and overhead voltage together.
The adjustments can be made by the simple superposi-
tion of the overhead and dc feed equations:
When selecting external components, select R1 on the
order of 5 kΩ to minimize the programming inaccuracy
caused by the internal 25 kΩ resistor. Lower values can
be used; the only disadvantage is the power consump-
tion of the external resistors.
Loop Range
The equation below can be rearranged to provide the
loop range for a required loop current:
Off-Hook Detection
The loop closure comparator has built-in longitudinal
rejection, eliminating the need for an external 60 Hz fil-
ter. This applies in both powerup and low-power scan
states. The loop-closure detection threshold is set by
resistor RLCTH. Ref erring to Figure 30, NLC is high in an
on-hook condition (ITR = 0, VDCOUT = 0), and
VLCTH = 0.05 mA x RLCTH. The off-hook comparator
goes low when VLCTH crosses zero and then goes neg-
ative: VLCTH = 0.05 mA x RLCTH + VDCOUT
= 0.05 x RLCTH – 0.125 V/mA x ITR
RLCTH(kΩ) = 2.5 x ITR(mA)
12-2553.a (C)
Figure 30. Off-Hook Detection Circuit
DCR
25 kΩ ± 30%
R1
R3
DCOUT
Rdc 113 Ω500Ω∆VDCR
∆VDCOUT
--------------------
+=
113 Ω500 ΩR125kΩ
||
R3R125kΩ
||
+
----------------------------------
+=
DCR
25 kΩ ± 30%
R1
R3
DCOUT
R2
–5 V
VOH 6.5 20 R125 kΩR3
||||
R2R125 kΩR3
||||
+
----------------------------------------------
+=
Rdc 113 Ω500ΩR125 kΩ
||
R3R125 kΩ
||
+
-----------------------------------
+=
RL
VBAT VOH–
IL
---------------------------- 2RP–Rdc–=
RL
ITR
RP
RP
PR
–
+
–
+
DCOUT
RLCTH
LCTH
NLC
PT
–0.125 V/mA
0.05 mA
Lucent Technologies Inc. 23
Data Sheet
March 1997 L7554 Low-Power SLIC
Applications (continued)
dc Applications (continued)
Ring T rip Detection
The ring trip circuit is a comparator that has a special in-
put section optimized for this application. The equiva-
lent circuit is shown in Figure 31, along with its use in an
application using unbalanced, battery-backed ringing.
12-3014 (C)
Figure 31. Ring Trip Equivalent Circuit and
Equivalent Application
The comparator input voltage compliance is VCC to
VBAT, and the maximum current is 240 µA in either
direction. Its application is straightforward. A resistance
(RTSN + R TS2) in series with the RTSN input estab lishes a
current that is repeated in the RTSP input. A slightly
lower resistance (R TSP) is placed in series with the R TSP
input. When ringing is being injected, no dc current
flows through RTS1, so the RTSP input is at a lower
potential than RTSN. When enough dc loop current
flows, the RTSP input voltage increases to trip the com-
parator. In Figure 31, a low-pass filter with a double
pole at 2 Hz was implemented to prevent false ring trip.
The following example illustrates how the detection cir-
cuit of Figure 31 will trip at 12.5 mA dc loop current us-
ing a –48 V battery.
The current IN is repeated as IP in the positive compar-
ator input. The voltage at comparator input RTSP is:
Using this equation and the values in the example, the
voltage at input RTSP is –12 V during ringing injection
(ILOOP(dc) = 0). Input RTSP is, therefore, at a level of 5 V
below RTSN. When enough dc loop current flows
through RTS1 to raise its dc drop to 5 V, the comparator
will trip. In this example,
Ring Ground Detection
Pin ICM sinks a current proportional to the longitudinal
loop current. It is also connected to an internal compar-
ator whose output is pin RGDET. In a ground start
application where Tip is open, the ring ground current
is half differential and half common mode. In this case,
to set the ring ground current threshold, connect a
resistor RICM from pin ICM to VCC. Select the resistor
according to the following relation:
The above equation is shown graphically in Figure 18.
It applies for the case of Tip open. The more general
equation can be used in ground key application to
detect a common-mode current ICM:
+
–
RTSP
RLOOP
–
+
15 kΩ
7 V
IP = IN
RTSN
RTS2
2 MΩ
2 MΩ
CRTS1
0.022 µF
CRTS2
0.27 µF
274 kΩ
PHONE
HOOK SWITCH
RC PHONE
VRING
VBAT
NRDET
RTS1
402 Ω
RTSP
IN
RTSN
IN–7 – (–48)
2.289 kΩ
---------------------------=
17.9 µA=
VRTSP VBAT ILOOP dc()+RTS1 IPRTSP×+×=
ILOOP dc() 5 V
402 Ω
-----------------=
12.5 mA=
RICM kΩ()VCC 120×
IRG mA()
----------------------
=
RICM kΩ()VCC 60×
ICM mA()
-------------------
=
2424 Lucent Technologies Inc.
Data Sheet
March 1997
L7554 Low-Power SLIC
Applications (continued)
ac Design
There are four key ac design parameters. Termination
impedance is the impedance looking into the 2-wire
port of the line card. It is set to match the impedance of
the telephone loop in order to minimize echo return to
the telephone set. Transmit gain is measured from the
2-wire port to the PCM highway, while receive gain is
done from the PCM highway to the transmit port.
Finally, the hybrid balance network cancels the
unwanted amount of the receive signal that appears at
the transmit port.
At this point in the design, the codec needs to be select-
ed. The discrete network between the SLIC and the
codec can then be designed. The following is a brief
codec feature and selection summary.
First-Generation Codecs
These perform the basic filtering, A/D (transmit), D/A
(receive), and µ-law/A-law companding. They all have
an op amp in front of the A/D converter for transmit gain
setting and hybrid balance (cancellation at the summing
node). Depending on the type, some have differential
analog input stages, differential analog output stages,
and µ-law/A-law selectability. This generation of codecs
have the lowest cost. They are most suitable for appli-
cations with fixed gains, termination impedance, and
hybrid balance.
Second-Generation Codecs
This class of devices includes a microprocessor inter-
face for software control of the gains and hybrid bal-
ance. The hybrid balance is included in the device. ac
programmability adds application flexibility and saves
several passive components and also adds several I/O
latches that are needed in the application. However,
there is no transmit op amp, since the transmit gain and
hybrid balance are set internally.
Third-Generation Codecs
This class of devices includes the gains, termination
impedance, and hybrid balance—all under micropro-
cessor control. Depending on the device, it may or ma y
not include latches.
Selection Criteria
In the codec selection, increasing software control and
flexibility are traded for device cost. To help decide, it
may be useful to consider the following. Will the appli-
cation require only one value for each gain and imped-
ance? Will the board be used in different countries with
different requirements? Will several versions of the
board be built? If so, will one version of the board be
most of the production volume? Does the application
need only real termination impedance? Does the hybrid
balance need to be adjusted in the field?
In the following examples, use of a first-generation co-
dec is shown. The equations for second- and third-gen-
eration codecs are simply subsets of these. There are
two examples: The first shows the simplest circuit,
which uses a minimum number of discrete components
to synthesize a real termination impedance. The second
example shows the use of the uncommitted op amp to
synthesize a complex termination. The design has been
automated in a DOS-based program, available on re-
quest.
Lucent Technologies Inc. 25
Data Sheet
March 1997 L7554 Low-Power SLIC
Applications (continued)
ac Design (continued)
ac equivalent circuits using a T7513 Codec are shown in Figures 32 and 33.
12-2554.a (C)
Figure 32. ac Equivalent Circuit Not Including Spare Op Amp
12-3013 (C)
Figure 33. ac Equivalent Circuit Including Spare Op Amp
+
–
+
–
+
–
RPPR 40 Ω
ZT+
–
RPPT 40 Ω
VT/R
IT/R
AV = –1
AV = 1
–0.4 V/mA
RT1
RRCV
RHB1
RT2
VITR
RCVN
RCVP
RXVGSX
VFXIN
VFXIP
VFR
(PWROP)
T7513 CODECATT7564 SLIC
VS
ZT/R AV = 4
RG
L7554 SLIC
+
–
RGN
+
–
RT3
RRCV
RHB1
RXVGSX
VFXIN
VFXIP
VFR
(PWROP)
T7513 CODEC
+
–
RPPR 40 Ω
ZT+
–
RPPT 40 Ω
VT/R
IT/R
AV = –1
AV = 1
–0.4 V/mA
VITR
RCVN
RCVP
VS
ZT/R AV = 4
+
–
ZT5
RT6
XMT
SN
RT4
AGND
L7554 SLIC
2626 Lucent Technologies Inc.
Data Sheet
March 1997
L7554 Low-Power SLIC
RHB RX
gtx grcv×
--------------------
=
Applications (continued)
ac Design (continued)
Example 1, Real Termination
The following design equations refer to the circuit in
Figure 32. Use these to synthesize real termination
impedance.
Termination Impedance:
Receive Gain:
Transmit Gain:
Hybrid Balance:
hbal = 20log
To optimize the h ybrid balance, the sum of the currents
at the VFX input of the codec op amp should be set to
0. The following expressions assume that the test net-
work is the same as the termination impedance.
Example 2, Complex Termination:
For complex termination, the spare op amp is used
(see Figure 33).
The hybrid balance equation is the same as in
Example 1.
PCB Layout Information
Make the leads to BGND and VBAT as wide as possible
for thermal and electrical reasons. Also, maximize the
amount of PCB copper in the area of—and specifically
on—the leads connected to this device for the lowest
operating temperature.
When powering the device, ensure that no external
potential creates a voltage on an y pin of the de vice that
e xceeds the device r atings. In this application, some of
the conditions that cause such potentials during pow-
erup are the following: 1) an inductor connected to PT
and PR (this can force an overvoltage on VBAT through
the protection devices if the VBAT connection chatters)
and 2) inductance in the VBAT lead (this could resonate
with the VBAT filter capacitor to cause a destructive
overvoltage).
This device is normally used on a circuit card that is
subjected to hot plug-in, meaning the card is plugged
into a biased backplane connector. In order to prevent
damage to the IC, all ground connections must be
applied before, and removed after, all other connec-
tions.
ztvTR⁄
itr–
----------
=
zt2RP80Ω3200
1RT1
RGP
--------- RT1
RRCV
------------
++
-----------------------------------
++=
g
rcv vTR⁄
vfr
----------
=
grcv 8
1RRCV
RT1
----------- RRCV
RGP
------------
++
1
z
t
ZTR⁄
----------
+
--------------------------------------------------------------------
=
gtx vgsx
vTR⁄
----------
=
gtx RX
RT2
-------- 400
ZTR⁄
----------
×=
Vgsx
Vfr
------------
hbal 20 RX
RHB
--------- gtx grcv×–
log=
zt2RP80Ω3200
1RT3
RGN
--------- RT3
RRCV
------------
++
----------------------------------- ZT5
RT4
---------
()++=
2RP80ΩkZT5()++=
grcv 8
1RRCV
RT3
-------------- RRCV
RGN
--------------++
1
z
t
ZT/R
----------+
-----------------------------------------------------------------------------=
gtx R
–X
RT6
----------- 400
ZT/R
----------
×ZT5
RT4
---------
×=
Lucent Technologies Inc. 27
Data Sheet
March 1997 L7554 Low-Power SLIC
Outline Diagram
44-Pin PLCC
Controlling dimensions are in millimeters.
5-2506r7 (C)
4.57
MAX
1.27 TYP 0.53
MAX
0.10
SEATING PLANE
0.51 MIN
TYP
1640
7
17 29
39
18 28
PIN #1 IDENTIFIER
ZONE
16.66 MAX
17.65 MAX
16.66
MAX
17.65
MAX
Data Sheet
March 1997
L7554 Low-Power SLIC
For additional information, contact your Microelectronics Group Account Manager or the following:
INTERNET: http://www.lucent.com/micro
U.S.A.: Microelectronics Group, Lucent Technologies Inc., 555 Union Boulevard, Room 30L-15P-BA, Allentown, PA 18103
1-800-372-2447, FAX 610-712-4106 (In CANADA: 1-800-553-2448, FAX 610-712-4106), e-mail docmaster@micro.lucent.com
ASIA PACIFIC: Microelectronics Group, Lucent Technologies Singapore Pte. Ltd., 77 Science Park Drive, #03-18 Cintech III, Singapore 118256
Tel. (65) 778 8833, FAX (65) 777 7495
JAPAN: Microelectronics Group, Lucent Technologies Japan Ltd., 7-18, Higashi-Gotanda 2-chome, Shinagawa-ku, Tokyo 141, Japan
Tel. (81) 3 5421 1600, FAX (81) 3 5421 1700
For data requests in Europe:
MICROELECTRONICS GROUP DATALINE: Tel. (44) 1734 324 299, FAX (44) 1734 328 148
For technical inquiries in Europe:
CENTRAL EUROPE: (49) 89 95086 0 (Munich), NORTHERN EUROPE: (44) 1344 865 900 (Bracknell UK),
FRANCE: (33) 1 41 45 77 00 (Paris), SOUTHERN EUROPE: (39) 2 6601 1800 (Milan) or (34) 1 807 1700 (Madrid)
Lucent Technologies Inc. reserves the right to make changes to the product(s) or information contained herein without notice. No liability is assumed as a result of their use or application. No
rights under any patent accompany the sale of any such product(s) or information.
Copyright © 1997 Lucent Technologies Inc.
All Rights Reserved
Printed in U.S.A.
March 1997
DS97-202ALC (Replaces DS96-229LCAS) Printed On
Recycled Paper
Ordering Information
*Devices on tape and reel must be ordered in 1000-piece increments.
Device Part No. Description Package Comcode
ATTL7554AP Low-Power SLIC, –60 V 44-Pin PLCC 107080921
ATTL7554AP–TR* Low-Power SLIC, –60 V 44-Pin PLCC (Tape and Reel) 107177172
ATTL7554BP Low-Power SLIC, –72 V 44-Pin PLCC 107548927
ATTL7554BP–TR* Low-Power SLIC, –72 V 44-Pin PLCC (Tape and Reel) 107548943
