APL5325BI-TRG - Anpec Electronics Corp.

Rev. A.1 - Nov., 2008

APL5325

www.anpec.com.tw1

ANPEC reserves the right to make changes to improve reliability or manufacturability without notice, and

advise customers to obtain the latest version of relevant information to verify before placing orders.

Adjustable Low Dropout 300mA Linear Regulator

Features

•Wide Operating Voltage: 3~6V

•Low Dropout Voltage:

300mV(Typical) @ 300mA

•Guaranteed 300mA Output Current

•Adjustable Output Voltage: 0.8~5.5V

•Current-Limit Protection with Foldback Current

•Over-Temperature Protection

•Stable with Low ESR Ceramic Capacitor

•SOT-23-5 Package

•Lead Free and Green Devices Available

(RoHS Compliant)

Applications

General Description

The APL5325 is a P-channel low dropout linear regulator

which needs only one input voltage from 3 to 6V, and

delivers current up to 300mA to set output voltage. It also

can work with low ESR ceramic capacitors and is ideal for

using in the battery-powered applications such as note-

book computers and cellular phones. Typical dropout volt-

age is only 300mV at 300mA loading.

Current limit with current foldback and thermal shutdown

functions protect the device against current over-loads

and over temperature. The APL5325 is available in a SOT-

23-5 package.

•Cellular Phones

•Portable and Battery-Powered Equipment

•Notebook and Personal Computers

Simplified Application Circuit

VIN

SHDNGND

VOUT

SET

CIN

APL5325

VIN VOUT

COUT

Pin Configuration

VIN 3 4 VOUT

SHDN 1

GND 2 5 SET

SOT-23-5

Rev. A.1 - Nov., 2008

APL5325

www.anpec.com.tw2

Symbol Parameter Rating Unit

VIN VIN Supply Voltage (VIN to GND) -0.3 ~ 6.5 V

VSHDN SHDN Input Voltage (SHDN to GND) -0.3 ~ 6.5 V

PD Power Dissipation Internally Limited W

TJ Junction Temperature -40 ~ 150 oC

TSTG Storage Temperature -65 ~ 150 oC

TSDR Maximum Lead Soldering Temperature, 10 Seconds 260 oC

Absolute Maximum Ratings (Note 1)

Thermal Characteristics

Symbol Parameter Typical Value Unit

θJA Thermal Resistance-Junction to Ambient (Note 2)

SOT-23-5

240 oC/W

θJC Thermal Resistance-Junction to Case SOT-23-5

130 oC/W

Note 2 : θJA is measured with the component mounted on a high effective thermal conductivity test board in free air.

Recommended Operating Conditions

Symbol Parameter Range Unit

VIN VIN Supply Voltage 3 ~ 6 V

VOUT Output Voltage 0.8 ~ 5.5 V

IOUT VOUT Output Current 0 ~ 300 mA

CIN Input Capacitor 0.22 ~ 100 µF

COUT Output Capacitor 1.5 ~ 100 µF

TJ Junction Temperature -40 ~ 125 oC

Ordering and Marking Information

APL5325 Package Code

B: SOT-23-5

Operating Ambient Temperature Range

I : -40 to 85 oC

Handling Code

TR : Tape & Reel

Assembly Material

L : Lead Free Device

G : Halogen and Lead Free Device

Assembly Material

Handling Code

Temperature Range

Package Code

APL5325 B : 25RX XXXXXX - Date Code

Note: ANPEC lead-free products contain molding compounds/die attach materials and 100% matte tin plate termination finish; which

are fully compliant with RoHS. ANPEC lead-free products meet or exceed the lead-free requirements of IPC/JEDEC J-STD-020C for

MSL classification at lead-free peak reflow temperature. ANPEC defines “Green” to mean lead-free (RoHS compliant) and halogen

free (Br or Cl does not exceed 900ppm by weight in homogeneous material and total of Br and Cl does not exceed 1500ppm by

weight).

Note 1: Absolute Maximum Ratings are those values beyond which the life of a device may be impaired. Exposure to absolute

maximum rating conditions for extended periods may affect device reliability.

Rev. A.1 - Nov., 2008

APL5325

www.anpec.com.tw3

Electrical Characteristics

Unless otherwise specified, these specifications apply over VIN = VOUT+1V, IOUT=0~300mA, CIN = 1µF, COUT = 2.2µF, TA = -40 to 85oC.

Typical values are at TA = 25oC.

APL5325

Symbol

Parameter Test Conditions Min. Typ. Max.

Unit

VIN Input Voltage 3 - 6 V

VOUT Output Voltage Range 0.8 - 5.5 V

IQ Quiescent Current IOUT =10mA ~300mA - 135 160 µA

VREF Reference Voltage Measured on SET, VIN=3V, IOUT=10mA

- 0.8 - V

Output Voltage Accuracy IOUT=10mA -2 - +2 %

REGLINE

Line Regulation ∆VOUT%/∆VIN, IOUT=10mA -0.06

- +0.06

%/V

REGLOAD

Load Regulation ∆VOUT%/∆IOUT -0.2 - +0.2 %/A

VOUT = 2.5V, IOUT = 300mA - 500 650

VDROP

Dropout Voltage VOUT = 3.3V, IOUT = 300mA - 300 400 mV

PSRR

Power Supply Ripple Rejection Ratio

f = 10kHz, IOUT = 300mA - 45 - dB

Noise f = 80Hz to 100kHz, IOUT = 300mA - 160 - µVRMS

ILIMIT Current Limit 450 550 - mA

ISHORT

Foldback Current VOUT = 0V - 80 - mA

SHDN Input Voltage High 1.6 - -

SHDN Input Voltage Low - - 0.4 V

VOUT Discharge MOSFET RDS(ON) SHDN = Low - 60 - Ω

Shutdown VIN Supply Current SHDN = Low, VIN = 6V - 0.1 1 µA

SHDN Pull Low Resistance - 3 - MΩ

Over Temperature Threshold - 160 - oC

Over Temperature Hysteresis - 40 - oC

SET Input Bias Current VSET=0.8V -100 - 100 nA

Rev. A.1 - Nov., 2008

APL5325

www.anpec.com.tw4

Typical Operating Characteristics

Quiescent Current vs. Supply VoltageQuiescent Current vs. Junction Temperature

PSRR vs. Frequency

Dropout Voltage vs. Output Current

100

150

200

250

300

350

400

0100 200 300

Output Current, IOUT(mA)

Dropout Voltage, VDROP(mV)

VOUT=3.3V

TJ=125oCTJ=75oC

TJ=25oC

TJ=-50oC

100

200

300

400

500

600

700

0 100 200 300

VOUT=2.5V

TJ=125oCTJ=75oC

TJ=-50oC

TJ=25oC

Dropout Voltage, VDROP(mV)

Output Current, IOUT(mA)

Supply Voltage, VIN (V)

Quiescent Current, IQ (µA)

100

120

140

160

0 1 2 3 4 5 6 7

IOUT= 0mV

Junction Temperature, TJ (oC)

Quiescent Current, IQ (µA)

126

128

130

132

134

136

138

-50 -25 0 25 50 75 100 125

Current Limit vs. Junction Temperature

400

450

500

550

600

-50 -25 0 25 50 75 100 125

Junction Temperature, TJ(oC)

Current Limit, ILIMIT(mA)

VIN=5V

VIN=3.3V

1000 10000 100000

Frequency(Hz)

PSRR(dB)

-80

-70

-60

-50

-40

-30

-20

-10

0VIN=3.3V, VOUT=1.2V,

COUT=2.2µF,IOUT=300mA

Rev. A.1 - Nov., 2008

APL5325

www.anpec.com.tw5

Typical Operating Characteristics (Cont.)

Phase vs. Frequency

1000 10000 100000 1000000

Frequency (Hz)

Phase (degree)

IOUT=100mA

IOUT=300mA

VIN=3.3V, VOUT=1.2V,

CIN=1µF, COUT=2.2µF

100

120

140

160

Loop Gain (dB)

Frequency (Hz)

IOUT=100mA

IOUT=300mA

VIN=3.3V, VOUT=1.2V,

CIN=1µF, COUT=2.2µF

-40

-30

-20

-10

1000 10000 100000 1000000

Loop Gain vs. Frequency

Rev. A.1 - Nov., 2008

APL5325

www.anpec.com.tw6

Operating Waveforms

EnableShutdown

CH1

CH2

CH3

CH4

VIN

VOUT

IOUT

SHDN

Load TransientLine Transient

CH1

CH2

CH3

CH4

SHDN

VIN

VOUT

IOUT

CH1 : SHDN , 5V/div

CH2 : VIN , 5V/div

CH3 : VOUT , 2V/div

CH4 : IOUT , 100mA/div

Time : 200µs/div

CH1 : SHDN , 5V/div

CH2 : VIN , 5V/div

CH3 : VOUT , 2V/div

CH4 : IOUT , 100mA/div

Time : 10µs/div

CH1

CH2

VIN

VOUT

CIN=1µF ; COUT=2.2µF ;

TR=5µs ; IOUT=10mA

CH1 : VOUT , 50mV/div AC

CH2 : IOUT , 100mA/div

Time : 20µs/div

CH1 : VIN , 1V/div DC

CH2 : VOUT , 50mV/div AC

Time : 20µs/div

CH1

CH2

VOUT

IOUT

VIN=5V ; CIN=1µF ;

COUT=2.2µF ; TR=1µs

Rev. A.1 - Nov., 2008

APL5325

www.anpec.com.tw7

Operating Waveforms (Cont.)

Pin Description

NO. NAME FUNCTION

1 SHDN Shutdown control pin, logic high: enable; logic low: shutdown.

2 GND Ground pin.

3 VIN Voltage supply input pin.

4 VOUT Regulator output pin.

5 SET Connect this pin to an external resistor divider to adjust output voltage.

Power On

CH1 : VIN , 2V/div

CH2 : VOUT , 2V/div

CH3 : IOUT , 100mA/div

Time : 2ms/div

Power Off

CH1

CH2

CH3

VIN

VOUT

IOUT

CH1

CH2

CH3 IOUT

VIN

VOUT

CH1 : VIN , 2V/div

CH2 : VOUT , 2V/div

CH3 : IOUT , 100mA/div

Time : 10ms/div

Rev. A.1 - Nov., 2008

APL5325

www.anpec.com.tw8

Block Diagram

Typical Application Circuit

Thermal

Shutdown

GND

SHDN

VOUT

SET

VIN

UVLO &

Shutdown

Logic

Foldback

Current

Limit

3MΩ0.8V

VIN

SHDN

GND

VOUT

SET

CIN 1

3 4

VOUT

COUT

VIN

2.2µF

1µF

Enable

Shutdown











+⋅=R2

10.8 VOUT

Designation

Supplier

Part Number Specification

CIN Murata GRM185R61A105KE36 0603, X5R, 10V, 1µF

CIN Murata GRM188R71A105KA61 0603, X7R, 10V, 1µF

COUT Murata GRM188R61A225KE34 0603, X5R, 10V, 2.2µF

COUT Murata GRM188R71A225KE15 0603, X7R, 10V, 2.2µF

Reference: www.murata.com

Rev. A.1 - Nov., 2008

APL5325

www.anpec.com.tw9

Function Description











+⋅=R2

10.8 VOUT

Where R1 is connected from VOUT to SET with Kelvin

sensing and R2 is connected from SET to GND. The rec-

ommended value of R2 is in the range of 100 to100kΩ.

An error amplifier works with a temperature compensated

0.8V reference and an output PMOS regulates the output

to the presetting voltage. The error amplifier is designed

with high bandwidth and DC gain provides very fast tran-

sient response and less load regulation. It compares the

reference with the feedback voltage and amplifies the dif-

ference to drive the output PMOS which provides load

current from VIN to VOUT.

Output Voltage Regulation

The APL5325 is an adjustable low dropout linear

regulator. The output voltage set by the resistor-divider is

determined by:

Thermal Shutdown

A thermal shutdown circuit limits the junction tempera-

ture of APL5325. When the junction temperature exceeds

+160οC, a thermal sensor turns off the output PMOS, al-

lowing the device to cool down. The regulator regulates

the output again through initiation of a new soft-start cycle

after the junction temperature is cooled down by 40oC.

The thermal shutdown is designed with a 40oC hyster-

esis to lower the average junction temperature during

continuous thermal overload conditions, extending life-

time of the device.

For normal operation, device power dissipation should

be externally limited so that junction temperature will not

exceed 125oC.

Shutdown Control

The APL5325 has an active-low shutdown function. Force

SHDN high (>1.6V) enables the VOUT; force SHDN low

(<0.4V) disables the VOUT. SHDN is internally pulled low

by a resistor (3mΩ typical). If it is not used, connect to VIN

for normal operation.

Rev. A.1 - Nov., 2008

APL5325

www.anpec.com.tw10

Application Information

Where the unit of COUT is µF and VOUT is V. Figure 1 shows

the curve of maximum output capacitor over the output

voltage. The output voltage range is from 0.8 to 5.5V and

the output capacitor value should under the line. Output

capacitors must be placed at the load and the ground pin

as close as possible and the impedance of the layout

must be minimized.

PD = (TJ - TA) / θJA

where (TJ-TA) is the temperature difference between the

junction and ambient air. θJA is the thermal resistance

between Junction and ambient air. Assuming the

TA=25oC and maximum TJ=160oC (typical thermal limit

threshold), the maximum power dissipation is calcu-

lated as:

PD(max)=(160-25)/240

= 0.56(W)

For normal operation, do not exceed the maximum junc-

tion temperature rating of TJ = 125 oC. The calculated power

dissipation should less than:

PD =(125-25)/240

= 0.41(W)

The GND provides an electrical connection to the ground

and channels heat away. Connect the GND to the ground

by using a large pad or a ground plane.

Output Capacitor (µF)

Output Voltage (V)

Figure 1

Input Capacitor

The APL5325 requires proper input capacitors to supply

surge current during stepping load transients to prevent

the input rail from dropping . Because the parasitic induc-

tor from the voltage sources or other bulk capacitors to

the VIN limit the slew rate of the surge current, place the

Input capacitors near VIN as close as possible. Input ca-

pacitors should be larger than 1µF and a minimum ce-

ramic capacitor of 1µF is necessary.

Output Capacitor

The APL5325 needs a proper output capacitor to main-

tain circuit stability and to improve transient response over

temperature and current. In order to insure the circuit

stability, the proper output capacitor value should be larger

than 2.2µF. With X5R and X7R dielectrics, 2.2µF is suffi-

cient at all operating temperatures. Large output capaci-

tor value can reduce noise and improve load-transient

response and PSRR, however, it also affects power on

issue. Equation (1) shows the relationship between the

maximum COUT value and the VOUT.

OUT

OUT(max) V

19.5

101C−=

0 1 2 3 4 5 6

100

110

120

Operation Region and Power Dissipation

The APL5325 maximum power dissipation depends on

the thermal resistance and temperature difference be-

tween the die junction and ambient air. The power dissi-

pation PD across the device is:

Layout Consideration

Figure 2 illustrates the layout. Below is a checklist for

your layout:

1. Please place the input capacitors close to the VIN.

2. Ceramic capacitors for load must be placed near the

load as close as possible.

3. To place APL5325 and output capacitors near the load

is good for performance.

4. Large current paths, the bold lines in figure 2, must

have wide tracks.

5. Divider resistor R1 and R2 must be placed near the

SET as close as possible.

Rev. A.1 - Nov., 2008

APL5325

www.anpec.com.tw11

Application Information (Cont.)

Layout Consideration (Cont.)

Figure 2

Recommended Minimum Footprint

SOT-23-5

0.05

0.02

0.1

0.038

0.076

Unit : Inch

VIN

GND

VOUT

APL5325

VOUT

COUT

SET

LOAD

CIN

VIN

Rev. A.1 - Nov., 2008

APL5325

www.anpec.com.tw12

Package Information

SOT-23-5

MAX.

0.057

0.051

0.024

0.006

0.009

0.0200.012

L0.30

0.08

0.30

0.60 0.012

0.95 BSC

1.90 BSC

0.22

0.50

0.037 BSC

0.075 BSC

0.003

MIN.

MILLIMETERS

0.00

0.90

SOT-23-5

MAX.

1.45

0.15

1.30

MIN.

0.000

0.035

INCHES

VIEW A

0.25

GAUGE PLANE

SEATING PLANE

A2A1

SEE

VIEW A

1.40

2.60

1.80

3.00

2.70 3.10 0.122

0.071

0.1180.102

0.055

0.106

Note : 1. Follow JEDEC TO-178 AA.

2. Dimension D and E1 do not include mold flash, protrusions or gate

burrs. Mold flash, protrusion or gate burrs shall not exceed 10 mil

per side.

Rev. A.1 - Nov., 2008

APL5325

www.anpec.com.tw13

Carrier Tape & Reel Dimensions

OD0

BA0

SECTION B-B

SECTION A-A

OD1

Application

A H T1 C d D W E1 F

178.0±2.00

50 MIN.

8.4+2.00

-0.00

13.0+0.50

-0.20

1.5 MIN.

20.2 MIN.

8.0±0.30

1.75±0.10

3.5±0.05

P0 P1 P2 D0 D1 T A0 B0 K0

SOT-23-5

4.0±0.10

2.0±0.05

1.5+0.10

-0.00

1.0 MIN.

0.6+0.00

-0.40

3.20±0.20

3.10±0.20

1.50±0.20

(mm)

Devices Per Unit

Package Type Unit Quantity

SOT-23-5 Tape & Reel 3000

Rev. A.1 - Nov., 2008

APL5325

www.anpec.com.tw14

Test item Method Description

SOLDERABILITY MIL-STD-883D-2003 245°C, 5 sec

HOLT MIL-STD-883D-1005.7 1000 Hrs Bias @125°C

PCT JESD-22-B, A102 168 Hrs, 100%RH, 121°C

TST MIL-STD-883D-1011.9 -65°C~150°C, 200 Cycles

ESD MIL-STD-883D-3015.7 VHBM > 2KV, VMM > 200V

Latch-Up JESD 78 10ms, 1tr > 100mA

Reflow Condition (IR/Convection or VPR Reflow)

t 25 C to Peak

Ramp-up

Ramp-down

Preheat

Tsmax

Tsmin

Temperature

Time

Critical Zone

TL to TP

Reliability Test Program

Taping Direction Information

SOT-23-5

USER DIRECTION OF FEED

Rev. A.1 - Nov., 2008

APL5325

www.anpec.com.tw15

Profile Feature Sn-Pb Eutectic Assembly Pb-Free Assembly

Average ramp-up rate

(TL to TP) 3°C/second max. 3°C/second max.

Preheat

- Temperature Min (Tsmin)

- Temperature Max (Tsmax)

- Time (min to max) (ts)

100°C

150°C

60-120 seconds

150°C

200°C

60-180 seconds

Time maintained above:

- Temperature (TL)

- Time (tL) 183°C

60-150 seconds 217°C

60-150 seconds

Peak/Classification Temperature (Tp)

See table 1 See table 2

Time within 5°C of actual

Peak Temperature (tp) 10-30 seconds 20-40 seconds

Ramp-down Rate 6°C/second max. 6°C/second max.

Time 25°C to Peak Temperature 6 minutes max. 8 minutes max.

Note: All temperatures refer to topside of the package. Measured on the body surface.

Table 2. Pb-free Process – Package Classification Reflow Temperatures

Package Thickness Volume mm3

<350 Volume mm3

350-2000 Volume mm3

>2000

<1.6 mm 260 +0°C* 260 +0°C* 260 +0°C*

1.6 mm – 2.5 mm 260 +0°C* 250 +0°C* 245 +0°C*

≥2.5 mm 250 +0°C* 245 +0°C* 245 +0°C*

* Tolerance: The device manufacturer/supplier shall assure process compatibility up to and including the stated

classification temperature (this means Peak reflow temperature +0°C. For example 260°C+0°C) at the rated MSL

level.

Customer Service

Anpec Electronics Corp.

Head Office :

No.6, Dusing 1st Road, SBIP,

Hsin-Chu, Taiwan, R.O.C.

Tel : 886-3-5642000

Fax : 886-3-5642050

Taipei Branch :

2F, No. 11, Lane 218, Sec 2 Jhongsing Rd.,

Sindian City, Taipei County 23146, Taiwan

Tel : 886-2-2910-3838

Fax : 886-2-2917-3838

Table 1. SnPb Eutectic Process – Package Peak Reflow Temperatures

Package Thickness Volume mm3

<350 Volume mm3

≥350

<2.5 mm 240 +0/-5°C 225 +0/-5°C

≥2.5 mm 225 +0/-5°C 225 +0/-5°C

Classification Reflow Profiles