General Description
The MAX3273 is a compact, low-power laser driver for
applications up to 2.7Gbps. The device uses a single
+3.3V supply and typically consumes 30mA. The bias
and modulation current levels are programmed by
external resistors. An automatic power-control (APC)
loop is incorporated to maintain a constant average
optical power over temperature and lifetime. The laser
driver is fabricated using Maxim’s in-house, second-
generation SiGe process.
The MAX3273 accepts differential CML-compatible
clock and data input signals. Inputs are self-biased to
allow AC-coupling. An input data-retiming latch can be
enabled to reject input jitter if a clock signal is available.
The driver can provide bias current up to 100mA and
modulation current up to 60mAP-P with typical (20% to
80%) edge speeds of 59ps. A failure-monitor output is
provided to indicate when the APC loop is unable to
maintain average optical power. The MAX3273 is avail-
able in 4mm 4mm, 24-pin QFN and thin QFN pack-
ages, as well as in die form.
Applications
SONET OC-48 and SDH STM-16
Transmission Systems
Add/Drop Multiplexers
Digital Cross-Connects
2.5Gbps Optical Transmitters
Features
30mA Power-Supply Current
Single +3.3V Power Supply
Up to 2.7Gbps (NRZ) Operation
Automatic Average Power Control with Failure
Monitor
Programmable Modulation Current from 5mA to
60mA
Programmable Bias Current from 1mA to 100mA
Typical Fall Time of 59ps
Selectable Data Retiming Latch
Complies with ANSI, ITU, and Bellcore
SDH/SONET Specifications
MAX3273
+3.3V, 2.5Gbps Low-Power Laser Driver
________________________________________________________________
Maxim Integrated Products
1
Ordering Information
19-2081; Rev 3; 2/07
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
PART TEMP RANGE
PIN-
PACKAGE
PACKAGE
CODE
MAX3273EGG -40°C to +85°C
24 QFN
(4mm 4mm) G2444-1
MAX3273ETG+ -40°C to +8C 24 Thin QFN
(4mm 4mm) T2444-2
MAX3273E/D -40°C to +85°C Dice*
.
Typical Application Circuit
DATA +
DATA -
CLK+
CLK-
2.5Gbps
SERIALIZER
WITH CLOCK
GENERATION
100Ω
100Ω
DATA +
DATA -
CLK+
CLK-
VCC
VCC
EN
LATCH
FAIL
APCFILT1
APCFILT2
GND
MODSET
BIASMAX
APCSET
OUT-
OUT+
BIAS
MD
0.01μFLP1
25ΩLP1
LP2
20Ω
0.056μF
REPRESENTS A CONTROLLED-IMPEDANCE TRANSMISSION LINE.
50Ω
50Ω
50Ω
50Ω
25Ω
VCC
500pF
MAX3273
Pin Configurations appear at end of data sheet.
*
Dice are designed to operate from TA= -40°C to +85°C, but
are tested and guaranteed at TA= +25°C only.
+
Denotes lead-free package.
MAX3273
+3.3V, 2.5Gbps Low-Power Laser Driver
2 _______________________________________________________________________________________
ABSOLUTE MAXIMUM RATINGS
DC ELECTRICAL CHARACTERISTICS
(VCC = +3.14V to +3.6V, TA= -40°C to +85°C. Typical values are at VCC = +3.3V, IBIAS = 60mA, IMOD = 30mA, TA= +25°C, unless
otherwise noted.) (Note 1)
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
Supply Voltage, VCC..............................................-0.5V to +6.0V
Current into BIAS, OUT+, OUT- ......................-20mA to +150mA
Current into MD.....................................................-5mA to +5mA
Voltage at DATA+, DATA-, CLK+,
CLK-, LATCH, EN, FAIL..........................-0.5V to (VCC + 0.5V)
Voltage at MODSET, BIASMAX,
APCSET, APCFILT1, APCFILT2.........................-0.5V to +3.0V
Voltage at BIAS .........................................+1.0V to (VCC + 1.5V)
Voltage at OUT+, OUT-.............................+1.5V to (VCC + 1.5V)
Current into FAIL ...............................................-10mA to +10mA
Continuous Power Dissipation (TA= +85°C)
24-Pin QFN (derate 274mW/°C above +85°C) ..........1781mW
Storage Temperature Range .............................-55°C to +150°C
Operating Junction Temperature ......................-55°C to +150°C
Die Attach Temperature (die) ..........................................+400°C
Lead Temperature (soldering, 10s) .................................+300°C
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
Supply Current ICC Excluding IBIAS and IMOD 30 45 mA
Bias-Current Range IBIAS Voltage on BIAS pin (VBIAS) = VCC - 1.6V 1 100 mA
Bias Off-Current EN = high (Note 2), VBIAS 2.6V 0.2 mA
IBIAS = 100mA 61
Bias-Current Stability APC open loop (Note 3) IBIAS = 1mA 198 ppm/°C
Bias-Current Absolute Accuracy APC open loop (Note 4) -15 +15 %
Differential Input Voltage VID Figure 1 0.2 1.6 VP-P
Common-Mode Input Voltage VICM VCC -
1.49
VCC -
1.32
VCC -
VID/4 V
TTL Input High Voltage VIH 2.0 V
TTL Input Low Voltage VIL 0.8 V
TTL Output High VOH Sourcing 50µA 2.4 V
TTL Output Low VOL Sinking 100µA 0.4 V
MD Voltage 1.6 V
Monitor Diode DC-Current Range IMD (Note 3) 18 1000 µA
IMD = 1000µA -480 83 +480
Monitor-Diode Bias Set Point
Stability IMD = 18µA -480 159 +480 ppm/°C
Monitor-Diode Bias Absolute
Accuracy -15 +15 %
MAX3273
+3.3V, 2.5Gbps Low-Power Laser Driver
_______________________________________________________________________________________ 3
AC ELECTRICAL CHARACTERISTICS
(VCC = +3.14V to +3.6V, TA= -40°C to +85°C. Typical values are at VCC = +3.3V, IBIAS = 60mA, IMOD = 30mA, TA= +25°C, unless
otherwise noted.) (Notes 5, 6)
Note 1: Specifications at -40°C are guaranteed by design and characterization. Dice are tested at TA= +25°C only.
Note 2: Both the bias and modulation currents are switched off if any of the current set pins is grounded.
Note 3: Guaranteed by design and characterization.
Note 4: Accuracy refers to part-to-part variation.
Note 5: AC characterization was performed by using the circuit in Figure 2.
Note 6: AC characteristics are guaranteed by design and characterization, and measured using a 2.5Gbps 213 - 1 PRBS input data
pattern with 80 consecutive zeros and 80 consecutive ones added.
Note 7: Measured using a 2.5Gbps repeating 0000 1111 pattern.
Note 8: PWD = (wide pulse - narrow pulse) / 2.
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
Modulation-Current Range IMOD (Note 3) 5 60 mA
Modulation Off-Current EN = high 0.2 mA
IMOD = 60mA -480 64 +480
Modulation-Current Stability IMOD = 5mA -480 34 +480 ppm/°C
Modulation-Current Absolute
Accuracy (Note 4) -15 +15 %
Output Current Rise Time tR20% to 80% (Note 7) 52 87 ps
Output Current Fall Time tF20% to 80% (Note 7) 59 104 ps
Output Overshoot/Undershoot δ(Note 7) 15 %
Enable and Startup Delay APC open loop 364 ns
Maximum Consecutive Identical
Digits 80 bits
Pulse-Width Distortion PWD (Notes 7, 8) 3 45 ps
Random Jitter 1.0 1.5 psRMS
Input Latch Setup Time TSU LATCH = high (Figure 1) 75 150 ps
Input Latch Hold Time THD LATCH = high (Figure 1) 0 50 ps
MAX3273
+3.3V, 2.5Gbps Low-Power Laser Driver
4 _______________________________________________________________________________________
CLK+
CLK-
DATA-
DATA+
(DATA+) - (DATA-)
IMOD
TSU THD
VIS = 0.1V TO 0.8V
VIS = 0.1V TO 0.8V
VID = 0.2V TO 1.6V
5mA TO 60mA
Figure 1. Required Input Signal and Setup/Hold-Time Definition
OUT-
OUT+
LP1
LP2
LP3
LP2
LP1
VCC
OSCILLOSCOPE
BIAS
15Ω
VCC
0.056μF
0.056μF
25Ω
50Ω
50Ω
50Ω
LP1 = MURATA BLM11HA601SPT
LP2 = MURATA BLM21HA102SPT
LP3 = COILCRAFT D01607C-333
MAX3273
Figure 2. Output Termination for Characterization
MAX3273
+3.3V, 2.5Gbps Low-Power Laser Driver
_______________________________________________________________________________________
5
Typical Operating Characteristics
(VCC = 3.3V, TA = +25°C, unless otherwise noted.)
ELECTRICAL EYE DIAGRAM
(IMOD = 20mA, 213 - 1 80CID)
MAX3273 toc01
125mV/div
60ps/div
ELECTRICAL EYE DIAGRAM
(IMOD = 60mA, 213 - 1 80CID)
MAX3273 toc02
400mV/div
60ps/div
IBIASMAX vs. RBIASMAX
MAX3273 toc04
RBIASMAX (kΩ)
IBIASMAX (mA)
140
0
20
40
60
80
120
100
0.1 10 1001 1000
57ps/div
MITSUBISHI ML725C8F
LASER DIODE
OPTICAL EYE DIAGRAM
(2.488Gbps, 1300nm FP LASER,
1.87GHz FILTER)
MAX3273 toc03
0
0.1 100101
IMOD vs. RMODSET
30
10
70
50
90
40
20
80
60
MAX3273 toc05
RMODSET (kΩ)
IMOD (mA)
0.1 10 100
IMD vs. RAPCSET
MAX3273 toc06
RAPCSET (kΩ)
IMD (mA)
1
1.4
0
0.2
0.4
0.6
0.8
1.2
1.0
0
30
20
10
40
50
60
70
80
90
100
-40 10-15 35 60 85
SUPPLY CURRENT vs. TEMPERATURE
MAX3273 toc07
TEMPERATURE (°C)
SUPPLY CURRENT (mA)
EXCLUDE IBIAS, IMOD
25Ω LOAD
MAX3273
+3.3V, 2.5Gbps Low-Power Laser Driver
6 _______________________________________________________________________________________
-15
-10
-5
0
5
10
15
20
25
52515 35 45 55 65
PULSE-WIDTH DISTORTION vs. IMOD
MAX3273 toc08
IMOD (mA)
PWD (ps)
49.0
0
10
30
20
40
50
52.050.5 53.5 55.0 56.5 58.0 59.5
TYPICAL DISTRIBUTION OF IMOD RISE TIME
MAX3273 toc09
RISE TIME (ps)
PERCENT OF UNITS (%)
IMOD = 60mA
MEAN = 52.27ps
STDEV = 1.57ps
60 6261 63 64 65 66 67
MAX3273 toc10
FALL TIME (ps)
0
10
20
30
40
PERCENT OF UNITS (%)
TYPICAL DISTRIBUTION OF IMOD FALL TIME
IMOD = 5mA
MEAN = 63.23ps
STDEV = 1.21ps
0
20
10
40
30
50
60
57 60 6158 59 62 63 64
TYPICAL DISTRIBUTION OF IMOD FALL TIME
MAX3273 toc11
FALL TIME (ps)
PERCENT OF UNITS (%)
IMOD = 60mA
MEAN = 59.41ps
STDEV = 1.33ps
45 4746 48 49 50 51 52 53
MAX3273 toc12
RISE TIME (ps)
0
10
20
30
40
PERCENT OF UNITS (%)
TYPICAL DISTRIBUTION OF IMOD RISE TIME
IMOD = 5mA
MEAN = 48.57ps
STDEV = 1.48ps
Typical Operating Characteristics (continued)
(VCC = 3.3V, TA = +25°C, unless otherwise noted.)
MAX3273
+3.3V, 2.5Gbps Low-Power Laser Driver
_______________________________________________________________________________________ 7
Pin Description
PIN NAME FUNCTION
1, 4, 13, 15, 18 VCC Power-Supply Voltage
2 DATA+ Noninverting Data Input, with On-Chip Biasing
3 DATA- Inverting Data Input, with On-Chip Biasing
5 CLK+ Noninverting Clock Input for Data Retiming, with On-Chip Biasing
6 CLK- Inverting Clock Input for Data Retiming, with On-Chip Biasing
7, 9, 12 GND Ground
8 LATCH Data Retiming Enable Input, Active-High. Retiming disabled when floating or pulled low.
10 EN TTL/CMOS Enable Input. Low for normal operation. Float or pull high to disable laser bias and
modulation currents. Internal 100kΩ pullup to VCC.
11 MODSET A resistor connected from this pin to ground sets the desired modulation current.
14 BIAS Laser Bias Current Output. Connect to the laser through an inductor.
16 OUT+ Positive Modulation-Current Output. IMOD flows into this pin when input data is high.
17 OUT- Negative Modulation-Current Output. Current flows into this pin when input data is low. Connect
to load equivalent to that on OUT+ to maintain differential output balance.
19 MD Monitor Diode Input. Connect this pin to the anode of the monitor diode. Leave floating for
open-loop operation.
20 APCFILT1 A capacitor between APCFILT1 and APCFILT2 sets the dominant pole of the APC feedback
loop (CAPCFILT = 0.01µF). Ground APCFILT1 for open-loop operation.
21 APCFILT2 See above.
22 FAIL TTL/CMOS Failure Output, Active-Low. Indicates APC failure when low.
23 APCSET A resistor connected from this pin to ground sets the desired average optical power. Connect a
100kΩ resistor to GND for open-loop operation.
24 BIASMAX
A resistor connected from this pin to ground sets the maximum bias current. The APC function
can subtract current from this maximum value, but cannot add to it. For open-loop operation,
this pin sets the laser bias current.
EP EXPOSED
PAD Ground. Solder this pad to ground.
MAX3273
+3.3V, 2.5Gbps Low-Power Laser Driver
8 _______________________________________________________________________________________
Detailed Description
The MAX3273 laser driver consists of two main parts: a
high-speed modulation driver and a laser-biasing block
with automatic power control (APC). The circuit design
is optimized for both high-speed and low-voltage
(+3.3V) operation. To minimize the jitter of the input sig-
nal at speeds as high as 2.7Gbps, the device accepts
a differential CML clock signal for data retiming. When
LATCH is high, the input data is synchronized by the
clock signal. When LATCH is low, the input data is
directly applied to the output stage.
The output stage is composed of a high-speed differ-
ential pair and a programmable modulation current
source. Because the modulation output drives a maxi-
mum current of 60mA into the laser with an edge speed
of 59ps, large transient voltage spikes can be generat-
ed (due to the parasitic inductance of the laser). These
transients and the laser-forward voltage leave insuffi-
cient headroom for the proper operation of the laser dri-
ver if the modulation output is DC-coupled to the laser
diode. To solve this problem, the MAX3273’s modula-
tion output is AC-coupled to the cathode of a laser
diode. An external pullup inductor is necessary to DC-
bias the modulation output at VCC. Such a configuration
isolates laser-forward voltage from the output circuitry
and the supply voltage VCC. A simplified functional dia-
gram is shown in Figure 3.
The MAX3273 modulation output is optimized for dri-
ving a 25Ωload. Modulation current swings of 75mA
are possible, but because of minimum power-supply
and jitter requirements at 2.5Gbps, the specified maxi-
mum modulation current is limited to 60mA. To inter-
face with the laser diode, a damping resistor (RD) is
required for impedance matching. An RC-shunt net-
work might also be necessary to compensate for the
laser-diode parasitic inductance, thereby improving the
LP2
LP1
0
1
MUX
Q
D
x160
FAILURE
DETECTOR
TIA
LP1
LATCH
DATA
CLK
EN
VBG
IAPCSET
MODSET BIASMAX APCFILT1 APCFILT2 APCSET
RAPCSET
CAPCFILT
RBIASMAX
RMODSET
x190
VCC
FAIL
MD IMD
500pF
VCC
BIAS
IBIAS
OUT+
OUT-
25Ω
CDRD
IMOD
VCC VCC
MAX3273
Figure 3. Functional Diagram
MAX3273
+3.3V, 2.5Gbps Low-Power Laser Driver
_______________________________________________________________________________________ 9
optical output ringing and duty-cycle distortion. Refer to
Maxim application note HFAN 02.0,
Interfacing Maxim
Laser Drivers with Laser Diodes,
for more information.
At the data rate of 2.5Gbps, any capacitive load at the
cathode of a laser diode degrades the optical output
performance. Because the BIAS output is directly con-
nected to the laser cathode, the parasitic capacitance
associated with this pin is minimized by using an induc-
tor to isolate the BIAS pin from the laser cathode.
Automatic Power Control (APC)
To maintain constant average optical power, the
MAX3273 incorporates an APC loop to compensate for
the changes in laser threshold current over temperature
and lifetime. A back-facet photodiode mounted in the
laser package is used to convert the optical power into
a photocurrent. The APC loop adjusts the laser bias
current so that the monitor current is matched to a ref-
erence current set by RAPCSET. The time constant of
the APC loop is determined by an external capacitor
(CAPCFILT). To minimize the pattern-dependent jitter
associated with the APC loop-time constant, and to
guarantee loop stability, the recommended value for
CAPCFILT is 0.01µF.
When the APC loop is functioning, the maximum allow-
able bias current is set by an external resistor, RBIASMAX.
An APC failure flag (FAIL) is asserted low when the bias
current can no longer be adjusted to achieve the desired
average optical power.
APC closed-loop operation requires the user to set three
currents with external resistors connected between
ground and BIASMAX, MODSET, and APCSET (see
Figure 3). Detailed guidelines for these resistor settings
are described in the
Design Procedure
section.
Open-Loop Operation
If necessary, the MAX3273 is fully operational without
APC. To disable the APC loop, ground the APCFILT1
pin. In this case, the laser current is directly set by two
external resistors connected from ground to BIASMAX
and MODSET. See the
Design Procedure
section for
more details on open-loop operation.
Optional Data Input Latch
To minimize jitter in the input data, connect a synchro-
nous differential clock signal to the CLK+ and CLK-
inputs. When the LATCH control input is tied high, the
input data is retimed on the rising edge of CLK+. If
LATCH is tied low or left floating, the retiming function is
disabled and the input data is directly connected to the
output stage. When this latch function is not used, con-
nect CLK+ to VCC and leave CLK- unconnected.
Output Enable
The MAX3273 incorporates a TTL/CMOS input to
enable the output. When EN is low, the modulation and
bias outputs are enabled. When EN is high or floating,
both the bias and modulation currents are off. The typi-
cal enable time is 364ns, and the typical disable time is
27ns when the bias is operated open loop.
Slow-Start
For laser safety reasons, the MAX3273 incorporates a
slow-start circuit that provides a delay of 364ns for
enabling a laser diode.
APC Failure Monitor
The MAX3273 provides an APC failure monitor
(TTL/CMOS) to indicate an APC loop tracking failure.
FAIL is asserted low when the APC loop no longer can
regulate the bias current to maintain the desired moni-
tor diode current. FAIL asserts low when the APC loop
is disabled.
Short-Circuit Protection
The MAX3273 provides short-circuit protection for the
modulation and bias current sources. If BIASMAX,
MODSET, or APCSET is shorted to ground, the bias
and modulation output turns off.
Design Procedure
When designing a laser transmitter, the optical output
usually is expressed in terms of average power and
extinction ratio. Table 1 gives relationships helpful in
converting between the optical average power and the
modulation current. These relationships are valid if the
mark density and duty cycle of the optical waveform
are 50%.
Programming the Modulation Current
For a given laser power (PAVG), slope efficiency (η), and
extinction ration (re), the modulation current can be cal-
culated using Table 1. See the IMOD vs. RMODSET
graph in the
Typical Operating Characteristics
and
select the value of RMODSET that corresponds to the
required current at +25°C. The equation below provides
a derivation of the modulation current using Table 1.
IPr
r
MOD AVE e
e
×
+
21
1η
MAX3273
+3.3V, 2.5Gbps Low-Power Laser Driver
10 ______________________________________________________________________________________
Programming the Bias Current
with APC Disabled
When using the MAX3273 in open-loop operation, the
bias current is determined by the RBIASMAX resistor. To
select this resistor, see the IBIASMAX vs. RBIASMAX graph
in the
Typical Operating Characteristics
and select the
value of RBIASMAX that corresponds to the required
IBIASMAX at +25°C. Ground the APCFILT1 pin for open-
loop operation.
Programming the Bias Current
with APC Enabled
When the MAX3273’s APC feature is used, program the
average optical power by adjusting the APCSET resis-
tor. To select this resistor, determine the desired moni-
tor current to be maintained over temperature and life.
See the IMD vs. RAPCSET graph in the
Typical
Operating Characteristics
and select the value of RAPC-
SET that corresponds to the required current.
When using the MAX3273 in closed-loop operation, the
RBIASMAX resistor sets the maximum bias current avail-
able to the laser diode over temperature and life. The
APC loop can subtract from this maximum value but
cannot add to it. See the IBIASMAX vs. RBIASMAX graph
in the
Typical Operating Characteristics
and select the
value of RBIASMAX that corresponds to the end-of-life
bias current at +85°C.
Interfacing with Laser Diodes
To minimize optical output aberrations caused by sig-
nal reflections at the electrical interface to the laser
diode, a series-damping resistor (RD) is required (see
the
Typical Application Circuit
). Additionally, the
MAX3273 outputs are optimized for a 25Ωload.
Therefore, the series combination of RDand RL(where
RLrepresents the laser-diode resistance) should equal
25Ω. Typical values for RD are 18Ωto 23Ω. For best
performance, a bypass capacitor (0.01µF typical)
should be placed as close as possible to the anode of
the laser diode. Depending on the exact characteristics
of the laser diode and PC board layout, a resistor (RP)
of 50Ωto 100Ωin parallel with pullup inductor LP1 can
be useful in damping overshoot and ringing in the opti-
cal output.
In some applications (depending on laser-diode para-
sitic inductance), an RC-shunt network between the
laser cathode and ground helps minimize optical out-
put aberrations. Starting values for most coaxial lasers
are R = 75Ωin series with C = 3.3pF. These values
should be experimentally adjusted until the optical out-
put waveform is optimized.
Pattern-Dependent Jitter
When transmitting NRZ data with long strings of con-
secutive identical digits (CIDs), LF droop can occur
and contribute to pattern-dependent jitter (PDJ). To
minimize this PDJ, three external components must be
properly chosen: capacitor (CAPCFILT), which domi-
nates the APC loop time constant; pullup inductor (LP);
and AC-coupling capacitor (CD).
To filter out noise effects and guarantee loop stability,
the recommended value for CAPCFILT is 0.01µF. This
results in an APC loop bandwidth of 100kHz or a time
constant of 15µs. As a result, the PDJ associated with
an APC loop time constant can be ignored.
The time constant associated with the output pullup
inductor (LPLP2) and the AC-coupling capacitor (CD)
affects the PDJ. For such a second-order network, the
PDJ is dominated by LPbecause of the low frequency
cutoff. For a data rate of 2.5Gbps, the recommended
value for CDis 0.056µF. During the maximum CID peri-
od, limit the peak voltage droop to less than 12% of the
average (6% of the amplitude). The time constant can
be estimated by:
If τLP = LP / 25Ω, and t = 100UI 40ns, then LP=
7.8µH. To reduce the physical size of this element (LP),
use of SMD ferrite beads is recommended (Figure 2).
To achieve even greater immunity to droop, use an
optional third inductor (33µH, LP3 in Figure 2).
Input Termination Requirement
The MAX3273 data and clock inputs are CML compati-
ble. However, it is not necessary to drive the IC with a
standard CML signal. As long as the specified differen-
tial voltage swings are met, the MAX3273 operates
properly.
Calculating Power Consumption
The junction temperature of the MAX3273 dice must be
kept below +150°C at all times. The total power dissipa-
tion of the MAX3273 can be estimated by the following:
P = VCC ×ICC + (VCC - Vf) IBIAS + IMOD
(VCC - 25 IMOD / 2)
where IBIAS is the maximum bias current set by
RBIASMAX, IMOD is the modulation current, and Vfis the
typical laser forward voltage.
Junction temperature = P(W) 37 (°C/W)
12 1
78
%
.
=
=
e
t
t
LP
LP
τ
τ
MAX3273
+3.3V, 2.5Gbps Low-Power Laser Driver
______________________________________________________________________________________ 11
Applications Information
An example of how to set up the MAX3273 follows.
Select Laser
A communication-grade laser should be selected for
2.5Gbps/2.7Gbps applications. Assume the laser out-
put average power is PAVG = 0, the minimum extinction
ratio is re= 6.6 (8.2dB), the operating temperature is
-40°C to +85°C, and the laser diode has the following
characteristics:
Wavelength: λ = 1310nm
Threshold Current: ITH = 22mA at +25°C
Threshold Temperature Coefficient: βTH = 1.3%/°C
Laser-to-Monitor Transfer: ρMON = 0.2A/W
Laser Slope Efficiency: η= 0.05mW/mA at +25°C
Determine RAPCSET
The desired monitor diode current is estimated by IMD
= PAVG ×ρ
MON = 200µA. The IMD vs. RAPCSET graph
in the
Typical Operating Characteristics
shows that
RAPCSET should be 7.5kΩ.
Determine RMODSET
To achieve a minimum extinction ratio (re) of 6.6 over
temperature and lifetime, calculate the required extinc-
tion ratio at +25°C. Assuming re= 20, the peak-to-peak
optical power PP-P = 1.81mW, according to Table 1.
The required modulation current is 1.81mW/
(0.05mW/mA) = 36.2mA. The IMOD vs. RMODSET graph
in the
Typical Operating Characteristics
shows that
RMODSET should be 5kΩ.
Determine RBIASMAX
Calculate the maximum threshold current (ITH(MAX)) at
TA= +85°C and end of life. Assuming ITH(MAX) =
50mA, the maximum bias current should be: IBIASMAX
= ITH(MAX) + (IMOD / 2). In this example, IBIASMAX =
68.1mA. The IBIASMAX vs. RBIASMAX graph in the
Typical Operating Characteristics
shows that RBIASMAX
should be 3.5kΩ.
PARAMETER SYMBOL RELATION
Average Power PAVG PAVG = (P0 + P1) / 2
Extinction Ratio rere = P1 / P0
Optical Power of a 1 P1P1 = 2PAVGre / (re + 1)
Optical Power of a 0 P0P0 = 2PAVG / (re + 1)
Optical Amplitude PP-P PP-P = P1 - P0 = 2PAVG(re - 1) / (re + 1)
Laser Slope Efficiency ηη = PP-P / IMOD
Modulation Current IMOD IMOD = PP-P / η
Threshold Current ITH P0 at 1 ITH
Bias Current IBIAS IBIAS ITH + IMOD / 2
Laser-to-Monitor Transfer ρMON IMD / PAVG
Note: Assuming a 50% average input duty cycle and mark density.
Table 1. Optical Power Relations
VCC
IN+
IN-
PACKAGE
0.9nH
0.9nH
0.1pF
VCC
VCC
16kΩ
5kΩ
5kΩ
24kΩ
0.1pF
Figure 4. Simplified Input Circuit
PACKAGE
0.9nH
0.1pF
VCC
0.1pF
0.9nH
OUT+
OUT-
Figure 5. Simplified Output Circuit
MAX3273
+3.3V, 2.5Gbps Low-Power Laser Driver
12 ______________________________________________________________________________________
Interface Models
Figures 4 and 5 show simplified input and output cir-
cuits for the MAX3273 laser driver. If dice are used,
replace package parasitic elements with bondwire par-
asitic elements.
Wire-Bonding Die
For high-current density and reliable operation, the
MAX3273 uses gold metalization. Make connections to
the die with gold wire only, using ball-bonding tech-
niques. Wedge bonding is not recommended. Die-pad
size is 4 mils (100µm) square, and die thickness is 14
mils (350µm).
Layout Considerations
To minimize inductance, keep the connections between
the MAX3273 output pins and laser diode as close as
possible. Optimize the laser-diode performance by
placing a bypass capacitor as close as possible to the
laser anode. Use good high-frequency layout tech-
niques and multilayer boards with uninterrupted ground
planes to minimize EMI and crosstalk.
Laser Safety and IEC 825
Using the MAX3273 laser driver alone does not ensure
that a transmitter design is compliant with IEC 825. The
entire transmitter circuit and component selections
must be considered. Customers must determine the
level of fault tolerance required by their application,
recognizing that Maxim products are not designed or
authorized for use as components in systems intended
for surgical implant into the body, for applications
intended to support or sustain life, or for any other
application where the failure of a Maxim product could
create a situation where personal injury or death may
occur.
Chip Information
TRANSISTOR COUNT: 1672
PROCESS: SiGe
ISOLATED SUBSTRATE
MAX3273
VCC
N.C.
MD
APCFILT2
APCFILT1
GND
APCSET
N.C.
BIASMAX
GND
OUT+
OUT-
BIAS
VCC
VCC
GND
GND
GND
MODSET
N.C.
N.C.
GND
LATCH
GND
N.C.
CLK-
CLK+
VCC
VCC
DATA-
DATA+
VCC
79 mil
(2.01mm)
64 mil
(1.63mm)
EN
FAIL
Chip Topography
+3.3V, 2.5Gbps Low-Power Laser Driver
______________________________________________________________________________________ 13
24
23
22
21
20
19
BIASMAX
APCSET
FAIL
APCFILT2
APCFILT1
MD
7
8
9
10
11
12
GND
LATCH
GND
EN
MODSET
GND
13
14
15
16
17
18
VCC
*EXPOSED PAD IS CONNECTED TO GND.
BIAS
VCC
OUT+
OUT-
VCC
6
5
4
3
2
1
CLK-
CLK+
VCC
DATA-
DATA+
VCC
MAX3273
QFN*
TOP VIEW
5
6
4
3
14
13
15
LATCH
GND
MODSET
GND
16
GND
APCSET
APCFILT2
APCFILT1
BIASMAX
MD
78
VCC
10 11 12
2324 22 20 19
CLK+
CLK-
OUT+
VCC
BIAS
VCC
MAX3273
9
21
DATA-
217 OUT-
DATA+
118 VCC
VCC
THIN QFN (4mm x 4mm)
TOP VIEW
FAIL
EN
THE EXPOSED PAD MUST BE CONNECTED TO GROUND FOR PROPER
THERMAL AND ELECTRICAL PERFORMANCE.
Pin Configurations
MAX3273
+3.3V, 2.5Gbps Low-Power Laser Driver
14 ______________________________________________________________________________________
12,16,20, 24L QFN.EPS
E
12
21-0106
PACKAGE OUTLINE
12,16,20,24L QFN, 4x4x0.90 MM
Package Information
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information
go to www.maxim-ic.com/packages.)
MAX3273
+3.3V, 2.5Gbps Low-Power Laser Driver
______________________________________________________________________________________ 15
E
22
21-0106
PACKAGE OUTLINE
12,16,20,24L QFN, 4x4x0.90 MM
Package Information (continued)
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information
go to www.maxim-ic.com/packages.)
MAX3273
+3.3V, 2.5Gbps Low-Power Laser Driver
16 ______________________________________________________________________________________
24L QFN THIN.EPS
PACKAGE OUTLINE,
21-0139
2
1
E
12, 16, 20, 24, 28L THIN QFN, 4x4x0.8mm
Package Information (continued)
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information
go to www.maxim-ic.com/packages.)
MAX3273
+3.3V, 2.5Gbps Low-Power Laser Driver
______________________________________________________________________________________ 17
Package Information (continued)
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information
go to www.maxim-ic.com/packages.)
PACKAGE OUTLINE,
21-0139
2
2
E
12, 16, 20, 24, 28L THIN QFN, 4x4x0.8mm
MAX3273
+3.3V, 2.5Gbps Low-Power Laser Driver
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
18
____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600
© 2007 Maxim Integrated Products is a registered trademark of Maxim Integrated Products.
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
18
____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600
© 2007 Maxim Integrated Products is a registered trademark of Maxim Integrated Products.
Revision History
Rev 0; 8/01: Initial data sheet release.
Rev 1; 12/02: Removed CP pin from Pin Description (page 7).
Removed CP and GND pins from Pin Configuration (page 13).
Updated package drawing with new revision (pages 14 and 15).
Rev 2; 5/03: Updated Ordering Information and added package code (page 1).
Updated package drawing with new revision (page 14).
Rev 3; 2/07: Added thin QFN package to Ordering Information (page 1).
Updated Figure 3 (added connector dot to Failure Detector) (page 8).
Added missing connector dots to Figure 5 and added thin QFN pin configuration (page 13).
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