AS1100WE-T - AMS AG - Datasheet.Directory

AS1100

Serially Interfaced, 8-Digit LED Driver

www.austriamicrosystems.com/LED-Driver-ICs/AS1100 Revision 1.36 1 - 17

Datasheet

1 General Description

The AS1 100 is an LED driver for 7 segment numeric displays of up to

8 digits. The AS1100 can be programmed via a conventional 4 wire

serial interface.

The device includes a BCD code-B decoder, a multiplex scan

circuitry, segment and display drivers, and a 64 Bit memory. The

memory is used to store the LED settings, so that continuous

reprogramming is not necessary.

Every individual segment can be addressed and updated separately.

Only one external resistor is required to set the current through the

LED display. Brightness can be controlled either in an analog or

digital way. The user can choose the internal code-B decoder to

display numeric digits or to address each segment directly.

The AS1100 features an extremely low shutdown current of only

20µA and an operational current of less than 500µA. The number of

visible digits can be programmed as well. The AS1100 can be reset

by software and an external clock can be used. Several test modes

support easy debugging.

The AS1100 is offered in a 24-pin DIP and SOIC packages.

2 Key Features

 10MHz Serial Interface

 Individual LED Segme nt Control

 Decode/No-Decode Digit Selection

 20µA Low-Power Shutdown (Data Retained)

 Extremely low Operating Current 0.5mA in open loop

 Digital and Analog Brightness Control

 Display Blanked on Power-Up

 Drive Common-Cathode LED Display

 Software Reset

 Optional External clock

 24-pin DIP and SOIC Packages

3 Applications

The AS1100 is an ideal solution for Bar-Graph Displays, Industrial

Controllers, Panel Meters, LED Matrix Displays and White Goods

such as washing machines and dishwasher.

Figure 1. AS1100 - Typical Application Diagram

8 Digits

8 Segments

GND

CLK

LOAD

DIN

ISET

VDD

DIFG0-DIG3

SEG A-G

SEP DP

MOSI

µP I/O

SCK

+5V

8-Digit µP Display

9.53k 19

AS1100

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AS1100

Datasheet - Pin Assignments

4 Pin Assignments

Figure 2. Pin Assignments (Top Vie w)

4.1 Pin Descriptions

Table 1. Pin Descriptions

Pin Number Pin Name Description

1DIN Data input. Data is programmed into the 16Bit shift register on the rising CLK edge

2, 3, 5:8, 10, 11 DIG 0 : DIG 7 8 digit driver lines that sink the current from the common cathode of the display. In shutdown

mode the AS1100 switches the outputs to VDD.

4, 9 GND Both GND pins must be connected.

12 LOAD/CS Strobe input. With the rising edge of the LOAD signal the 16 bit of serial data is latched into

the regist er.

13 CLK Clock input. The interface is capable to support clock frequencies up to 10MHz. The serial

data is clocked into the internal shift register with the rising edge of the CLK signal. On the

DOUT pin the data is applied with the falling edge of CLK.

14:17, 20:23 SEGA:G, DP Seven segment driver lines including the decimal point. When a segment is turned off the

output is connected to GND.

18 ISET The current into ISET determines the peak current through the segments and therefore the

brightness.

19 VDD Positive Supply Voltage (+5V)

24 DOUT Serial data output for cascading drivers. The output is valid after 16.5 clock cycles. The

output is never set to high impedance.

DIP/SO

12 13

DIG4

AS1100

24 DOUT

DIN

DIG0

GND

DIG6

DIG2

GND

DIG3

LOAD

SEG D

SEG DP

SEG E

SEG C

VDD

ISET

SEG G

SEG B

SEG F

SEG A

CLK

DIG7

DIG5

DIG1

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AS1100

Datashee t - A b s o l u t e M a x i mu m R a t i n g s

5 Absolute Maximum Ratings

Stresses beyond those listed in Table 2 may cause permanent damage to the device. These are stress ratings only, and functional operation of

the device at these or any other conditions beyond those indicated in Electrical Characteristics on page 4 is not implied. Exposure to absolute

maximum rating conditions for extended periods may affect device reliability.

Table 2. Absolute Maximum Ratings

Parameter Min Max Units Notes

Electrical Parameters

VDD to GND -0.3 +6 V

DIN, CLK, LOAD to GND -0.3 +6 V

All other Pins to GND -0.3 VDD + 0.3 V

VOUT -0.3 7 V

Current

DIG0–DIG7 Sink Current 500 mA

SEGA–G, DP Source Current 100 mA

Latch up Immunity ±200 mA Norm: JEDEC 78

Electrostatic Discharge

Electro Static Discharge at Digital Outputs +500 V Norm: MIL 883 E method 3015

Electro Static Discharge at all other pins +1000 V

Continuous Power Dissipation (TA = +85°C)

Narrow Plastic DIP 1066 mW Derate 13.3mW/°C above +70ºC

Wide SO 941 mW Derate 11.8mW/°C above +70ºC

Temperature Ranges and Storage Conditions

Storage Temperature Range -55 +150 ºC

Package Body Temperature +260 ºC

The reflow peak soldering temperature (body

temperature) specified is in accordance with IPC/

JEDEC J-STD-020 “Moisture/Reflow Sensitivity

Classification for Non-Hermetic Solid State

Surface Mount Devices”.

The lead finish for Pb-free leaded packages is

matte tin (100% Sn).

Humidity non-condensing1

1. only valid for the SOIC 24-pin package

885%

Moisture Sensitive Level 11 Represents a max. floor life time of unlimited

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AS1100

Datasheet - Electrical Characteristics

6 Electrical Characteristics

VDD = 5V, RSET = 9.53kΩ±1%, TA = TMIN to TMAX, unlesss otherwise noted.

Note: All limits are guaranteed. The parameters with min and max values are guaranteed with production tests or SQC (Statistical Quality

Control) methods.

Table 3. Electrical Characteristics

Symbol Parameter Conditions Min Typ Max Units

TAMB Operating Temperature Range -40 +85 ºC

VDD Operating Supply Voltage 4.0 5.0 5.5 V

IDDSD Shutdown Supply Current All digital inputs at VDD or GND,

TA = +25ºC 20 50 µA

IDD Operating Supply Current RSET = open circuit 500 µA

All segments and decimal point on,

ISEG = -40mA 330 mA

fOSC Display Scan Rate 8 digits scanned 500 800 1300 Hz

IDIGIT Digit Drive Sink Current VOUT = 0.65V 320 mA

ISEG Segment Drive Source Current TA = +25ºC, VOUT = (VDD -1V) -30 -40 -45 mA

ΔISEG Segment Drive Current Matching 3.0 %

IDIGIT Digit Drive Source Current Digit off, VDIGIT = (VDD -0.3V) -2 mA

ISEG Segment Drive Sink Current Segment off, VSEG = 0.3V 5 mA

Logic Inputs

IIH, IIL Input Current DIN, CLK, LOAD VIN = 0V or VDD -1 1 µA

VIH Logic High Input Voltage 3.5 V

VIL Logic Low Input Voltage 0.8 V

VOH Output High Voltage DOUT, ISOURCE = -1mA VDD - 1 V

VOL Output Low Voltage DOUT, ISINK = 1.6mA 0.4 V

Hysteresis Voltage DIN, CLK, LOAD 1 V

Timing Characteristics

tCP CLK Clock Period 100 ns

tCH CLK Pulse Width High 50 ns

tCL CLK Pulse Width Low 50 ns

tCSH CLK Rise to LOAD Rise Hold Time 0 ns

tDS DIN Setup Time 25 ns

tDH DIN Hold Time 0 ns

tDO Output Data Propagation Delay CLOAD = 50pF 25 ns

tLDCK LOAD Rising Edge to Next Clock

Rising Edge 50 ns

tCSW Minimum LOAD Pulse High 50 ns

tDSPD Data-to-Segment Delay 2.25 ms

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AS1100

Datasheet - Typical Operating Characteristics

7 Typical Operating Characteristics

Figure 3. Segment Driver Capability, Figure 4. Segment Current vs. RSET

VDD = 5V, Logic Level = High

00.511.522.533.544.5

Voltage below VDD at output ( V)

Segment Current (mA).

10 100

RSET (kOhm)

ISE GMENT (mA).

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AS1100

Datasheet - Detailed Description

8 Detailed Description

8.1 Serial-Addressing Modes

Programming of the AS1 100 is done via 4 wire serial interface. A programming sequence consists of 16-bit packages. The data is shifted into the

internal 16 Bit register with the rising edge of the CLK signal. With the rising edge of the LOAD signal the data is latched into a digital or control

register depending on the address. The LOAD signal must go to high after the 16th rising clock edge. The LOAD signal can also come later but

just before the next rising edge of CLK, otherwise data would be lost. The content of the internal shift register is applied 16.5 clock cycles later to

the DOUT pin. The data is clocked out at the falling edge of CLK. The Bits of the 16Bit-programming package are described in Table 5. The first

4 Bits D15-D12 are don’t care, D11-D8 contain the address and D7-D0 contain the data. The first bit is D15, the most significant bit (MSB). The

exact timing is given in Figure 5.

Figure 5. Timing Diagram

8.2 Digit and Control Registers

The AS1100 incorporates 15 registers, which are listed in Table 5. The digit and control registers are selected via the 4Bit address word. The 8

digit registers are realized with a 64bit memory. Each digit can be controlled directly without rewriting the whole contents. The control registers

consist of decode mode, display intensity, number of scanned digits, shutdown, display test, and reset/external clock register.

8.3 Shutdown Mode

The AS1100 features a shutdown mode, where it consumes only 20µA current. The shutdown mode is entered via a write to register 0Ch. Then

all segment current sources are pulled to ground and all digit drivers are connected to VDD, so that nothing is display ed. All internal digit

registers keep the programmed values. The shutdown mode can either be used for power saving or for generating a flashing display by

repeatedly entering and leaving the shutdown mode. The AS1100 needs typically 250µs to exit the shutdown mode. During shutdown the

AS1100 is fully programmable. Only the display test function overrides the shutdown mode.

8.4 Initial Power-Up

After powering up the system all register are reset, so that the display is blank. The AS1100 starts the shutdown mode. All registers should be

programmed for normal operation. The default settings enable only scan of one digit, the internal decoder is disabled, data register and intensity

Table 4. Serial Data Format (16bits)

D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0

X X X X Address MSB Data LSB

D15 D14

DOUT

DIN

CLK

LOAD tCSW

tCL tCH tCP

tCS

tLDCK

tDO

tDS

tDH

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AS1100

Datasheet - Detailed Description

8.5 Decode-Mode Register

In the AS1100 a BCD decoder is included. Every digit can be selected via register 09h to be decoded. The BCD code consists of the numbers 0-

9, E,H, L,P and -. In register 09h a logic high enables the decoder for the appropriate digit. In case that the decoder is bypassed (logic low) the

data Bits D7-D0 correspond to the segment lines of the AS1100. In Table 7 some possible settings for register 09h are shown. Bit D7, which

corresponds to the decimal point, is not affected by the settings of the decoder . Logic high means that the decimal point is displayed. In Table 8

the font of the Code B decoder is shown. In Table 9 the correspondence of the register to the appropriate segments of a 7 segment display is

shown (see Figure 6).

8.6 Intensity Control and Interdigit Blanking

Brightness of the display can be controlled in an analog way by changing the external resistor (RSET). The current, which flows between VDD

and ISET, defines the current that flows through the LEDs. The LED current is 100 times the ISET current. The minimum value of RSET should

be 9.53kΩ, which corresponds to 40mA segment current. The brightness of the display can also be controlled digitally via register 0Ah. The

brightness can be programmed in 16 steps and is shown in Table 10. An internal pulse width modulator controls the intensity of the display.

8.7 Scan-Limit Register

The scan limit register 0Bh selects the number of digits displayed. When all 8 digits are displayed the update frequency is typically 800Hz. If the

number of digits displayed is reduced, the update frequency is reduced as well. The frequency can be calculated using 8fOSC/N, where N is the

number of digits. Since the number of displayed digits influences the brightness, the resistor RSET should be adjust ed accor dingl y. The Table 12

shows the maximum allowed current, when fewer than 4 digits are used. To avoid differences in brightness the scan limit register should not be

used to blank portions of the display (leading zeros).

Table 5. Register Address Map

Code

D15-D12 D11 D10 D9 D8

No-Op X0000 0xX0

Digit 0 X0001 0xX1

Digit 1 X0010 0xX2

Digit 2 X0011 0xX3

Digit 3 X0100 0xX4

Digit 4 X0101 0xX5

Digit 5 X0110 0xX6

Digit 6 X0111 0xX7

Digit 7 X1000 0xX8

Decode Mode X 1 0 0 1 0xX9

Intensity X 1 0 1 0 0xXA

Scan Limit X 1 0 1 1 0xXB

Shutdown X 1 1 0 0 0xXC

Not used X 1 1 0 1 0xXD

Reset and ext. Clock X 1 1 1 0 0xXE

Display Test X 1 1 1 1 0xXF

Table 6. Shutdown Register Format (address (hex) = 0xXC

Mode Address Code

(Hex) Register Data

D7 D6 D5 D4 D3 D2 D1 D0

Shutdown Mode 0xXC XXXXXXX0

Normal Operation 0xXC XXXXXXX1

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AS1100

Datasheet - Detailed Description

Note: The decimal point is set by bit D7 = 1

Table 7. Decode-mode Register Examples (address (hex) = 0xX9

Decode Mode Register Data Hex Code

D7 D6 D5 D4 D3 D2 D1 D0

No decode for digits 7–0 00000000 0x00

Code B decode for digit 0

No decode for digits 7–1 00000001 0x01

Code B decode for digits 3–0

No decode for digits 7– 4 00001111 0x0F

Code B decode for digits 7–011111111 0xFF

Table 8. Code B font

7-Segment

Character Register Data On Segments = 1

D7* D6-D4 D3 D2 D1 D0 DP* A B C D E F G

0 X 0000 1111110

1 X 0001 0110000

2 X 0010 1101101

3 X 0011 1111001

4 X 0100 0110011

5 X 0101 1011011

6 X 0110 1011111

7 X 0111 1110000

8 X 1000 1111111

9 X 1001 1111011

-- X 1010 0000001

E X 1011 1001111

H X 1100 0110111

L X 1101 0001110

P X 1110 1100111

blank X 1111 0000000

Table 9. No-decode Mode Data Bits and Corre spo nding Segment Lines

D7 D6 D5 D4 D3 D2 D1 D0

Corresponding Segment Line DP A B C D E F G

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AS1100

Datasheet - Detailed Description

Figure 6. Standard 7-segment LED

Table 10. Intensity Register Format (address (hex) = 0xXA)

Duty Cycle D7 D6 D5 D4 D3 D2 D1 D0 Hex Code

1/32 (min on) XXXX0000 0xX0

3/32 XXXX0001 0xX1

5/32 XXXX0010 0xX2

7/32 XXXX0011 0xX3

9/32 XXXX0100 0xX4

11/32 XXXX0101 0xX5

13/32 XXXX0110 0xX6

15/32 XXXX0111 0xX7

17/32 XXXX1000 0xX8

19/32 XXXX1001 0xX9

21/32 XXXX1010 0xXA

23/32 XXXX1011 0xXB

25/32 XXXX1100 0xXC

27/32 XXXX1101 0xXD

29/32 XXXX1110 0xXE

31/32 (max on) XXXX1111 0xXF

Table 11. Scan-limit Register Format (address (hex) = 0xXB)

Decode Mode Register Data Hex Code

D7 D6 D5 D4 D3 D2 D1 D0

Display digit 0 only XXXXX000 0xX0

Display digit 0 & 1 XXXXX001 0xX1

Display digit 0 1 2 XXXXX010 0xX2

Display digit 0 1 2 3 XXXXX011 0xX3

Display digit 0 1 2 3 4 XXXXX100 0xX4

Display digit 0 1 2 3 4 5 XXXXX101 0xX5

Display digit 0 1 2 3 4 5 6 XXXXX110 0xX6

Display digit 0 1 2 3 4 5 6 7 XXXXX111 0xX7

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AS1100

Datasheet - Detailed Description

8.8 Display Test Register

With the display test register 0Fh all LED can be tested. In the test mode all LEDs are switched on at maximum brightness (duty cycle 31/32). All

programming of digit and control registers are maintained. The format of the register is given in Table 13.

Note: The AS1100 remains in display-test mode until the display-test register is reconfigured for normal operation.

8.9 No-Op Register (Cascading of AS1100)

The no-operation register 00h is used when AS1100s are cascaded in order to support more than 8 digit displays. The cascading must be done

in a way that all DOUT are connected to DINof the following AS1100. The LOAD and CLK signals are connected to all devices. For a write

operation for example to the fifth device the command must be followed by four no-operation commands. When the LOAD signal finally goes to

high all shift registers are latched. The first four devices have got no-operation commands and only the fifth device sees the intended command

and updates its register.

8.10 Reset and External Clock Register

This register is addressed via the serial interface. It allows to switch the device to external clock mode (If D0=1 the CLK pin of the serial interface

operates as system clock input.) and to apply an external reset (D1). This brings all registers (except reg. E) to default state. For standard

operation the register contents should be "00h".

Table 12. Maximum Segment Current for 1-, 2-, or 3-digit Displays

Number of digits Displayed Maximum Segment Current (mA)

110

220

330

Table 13. Display-test Register Format (address (hex) = 0xXF)

Mode Register Data

D7 D6 D5 D4 D3 D2 D1 D0

Normal Operation X X X X X X X 0

Display Test Mode XXXXXXX1

Table 14. Reset and External Clock Register (address (hex) = oxXE)

Mode Address Register Data

code (Hex) D7 D6 D5 D4 D3 D2 D1 D0

Normal Operation,

internal clock 0xXE XXXXXX00

Normal Operation,

external clock 0xXE XXXXXX01

Reset state,

internal clock 0xXE XXXXXX10

Reset state,

external clock 0xXE XXXXXX11

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AS1100

Datasheet - Application Information

9 Application Information

9.1 Supply Bypassing and Wiring

In order to achieve optimal performance the AS1100 shall be placed very close to the LED display to minimize effects of electromagnetic

interference and wiring inductance. Furthermore, it is recommended to connect a 10µF electrolytic and a 0.1µF ceramic capacitor between VDD

and GND to avoid power supply ripple. Also, both GNDs must be connected to ground.

9.2 Selecting RSET Resistor and Using External Drivers

The current through the segments is controlled via the external resistor RSET. Segment current is about 100 times the current in ISET. The right

values for ISET are given in Table 15. The maximum current the AS1 100 can drive is 40mA. If higher currents are needed, external drivers must

be used. In that case it is no longer necessary that the AS1100 drives high currents. A recommended value for RSET is 47kΩ. In cases that the

AS1100 only drives few digits, Table 12 specifies the maximum currents and RSET must be set accordingly. Refer to absolute maximum ratings

to calculate acceptable limits for ambient temperature, segment current, and the LED forward-voltage drop.

9.3 8x8 LED Dot Matrix Driver

The example in Figure 7 uses the AS1100 to drive an 8x8 LED dot matrix. The LED columns have common cathode and are connected to the

DIG0-7 outputs. The rows are connected to the segment drivers. Each of the 64 LEDs can be addressed separately. The columns are selected

via the digits as shown in Table 5. The decode mode register (0xX9) has to be programmed to ‘00000000’ as stated in Table 4. The single LEDs

in a column can be addressed as stated in Table 9, where D0 corresponds to segment G and D7 corresponds to segment DP.

Note: For a multiple-digit dot matrix, multiple AS1100 devices must be cascaded.

Figure 7. Application Example as LED Dot Matrix Driver

Table 15. RSET vs. Segment Current and LED Forward Voltage

ISEG (mA) VLED(V)

1.5 2.0 2.5 3.0 3.5

40 12.2kΩ11.8kΩ11.0kΩ10.6kΩ9.69kΩ

30 17.8kΩ17.1kΩ15.8kΩ15.0kΩ14.0kΩ

20 29.8kΩ28.0kΩ25.9kΩ24.5kΩ22.6kΩ

10 66.7kΩ63.7kΩ59.3kΩ55.4kΩ51.2kΩ

SEG G

SEG F

SEG E

SEG D

SEG C

SEG B

SEG A

SEG DP

DIG 0 DIG 7

9.53kΩ

SEG A:G

SEG DP DIG0:7

DIN

LOAD

CLK

GND GND

VDD

ISET

SEG G

SEG F

SEG E

SEG D

SEG C

SEG B

SEG A

SEG DP

DIG 0 DIG 7

9.53kΩ

DIN

LOAD

CLK

GND GND

VDD

ISET

µP AS1100

AS1100

DOUT SEG A:G

SEG DP DIG0:7

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AS1100

Datasheet - Application Information

9.4 Calculating the Power Dissipation

The upper limit for power dissipation (PD) for the AS1100 is determined from the following equation:

PD = (VDD x 0.5mA) + (VDD - VLED)(DUTY x ISEG x N) (EQ 1)

Where:

VDD = supply voltage

DUTY = duty cycle set by intensity register

N = number of segments driven (worst case is 8)

VLED = LED forward voltage

ISEG = segment current set by RSET

Dissipation Example:

ISEG = 40mA, N = 8, DUTY = 31/32, VLED = 1.8V at 40mA, VDD = 5.25V

PD = 5.25V(0.5mA) + (5.25V - 1.8V)(31/32 x 40mA x 8) = 1.07W

Thus, for a PDIP package θJA = +75°C/W (from Table 13), the maximum allowed ambient temperature TA is given by:

TJ,MAX = TA + PD x θJA = 150°C = TA +1.07W x 75°C/W.

Where:

TA = +69.7°C.

The TA limit for SO Packages in the dissipation example above is +59.0°C.

Table 16. Package Thermal Resistance Data

Package Thermal Resistance (θJA)

24 Narrow DIP +75ºC/W

24 Wide SO +85ºC/w

Maximum Junction Temperature (TJ) = +150ºC

Maximum Ambient Temperature (TA) = +85ºC

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AS1100

Datasheet - Package Drawings and Markings

10 Package Drawings and Markings

Figure 8. AS1100 Marking

Table 17. Packaging Code YYWWQZZ

YY WW Q or L ZZ

last two digits of the current year manufacturing week plant identifier free choice / traceability code

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AS1100

Datasheet - Package Drawings and Markings

Figure 9. SOIC 24-pin Package Diagram

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AS1100

Datasheet - Package Drawings and Markings

Figure 10. PDIP 24-pin Package Diagram 1

1. For more Information on the PDIP 24-pin package see Ordering Information on page 16.

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AS1100

Datasheet - Ordering Information

11 Ordering Information

The device is available as the standard products shown in Table 18.

Note: All products are RoHS compliant.

Buy our products or get free samples online at ICdirect: http://www.austriamicrosystems.com/ICdirect

Technical Support is found at http://www.austriamicrosystems.com/Technical-Support

For further information and requests, please contact us mailto:sales@austriamicrosystems.com

or find your local distributor at http://www.austriamicrosystems.com/distributor

Table 18. Ordering Information

Ordering Code Marking Description Temp Range Delivery Form Package

AS1100PL1

1. The PDIP 24-pin Package reached end of life. There is the possibility for a last time buy order until end of July 2011.

AS1100PL Seri ally Interfaced, 8-Digit LED Driver 0ºC to +70ºC Tubes PDIP 24-pin

AS1100WL AS1100WL Serially Interfac ed, 8-Di git LED Driver 0ºC to +70ºC Tubes SOIC 24-pin

AS1100PE1AS1100PE Serially Interfaced, 8-Di git LED Driver -40ºC to +85ºC Tubes PDIP 24-pin

AS1100WE AS1100WE Serially Interfaced, 8-Digit LED Driver -40ºC to +85ºC Tubes SOIC 24-pin

AS1100WL-T AS1100WL Serially Interfac ed, 8-Di git LED Driver 0ºC to +70ºC Tape & Reel SOIC 24-pin

AS1100WE-T AS1100WE Serially Interfaced, 8-Digit LED Driver -40ºC to +85ºC Tape & Reel SOIC 24-pin

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AS1100

Datasheet

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