Rev. 0.0, Jan. 2010 KLMxGxxEHx Draft Samsung eMMC moviNAND Product family eMMC Specification compatibility datasheet SAMSUNG ELECTRONICS RESERVES THE RIGHT TO CHANGE PRODUCTS, INFORMATION AND SPECIFICATIONS WITHOUT NOTICE. Products and specifications discussed herein are for reference purposes only. All information discussed herein is provided on an "AS IS" basis, without warranties of any kind. This document and all information discussed herein remain the sole and exclusive property of Samsung Electronics. No license of any patent, copyright, mask work, trademark or any other intellectual property right is granted by one party to the other party under this document, by implication, estoppel or otherwise. Samsung products are not intended for use in life support, critical care, medical, safety equipment, or similar applications where product failure could result in loss of life or personal or physical harm, or any military or defense application, or any governmental procurement to which special terms or provisions may apply. For updates or additional information about Samsung products, contact your nearest Samsung office. All brand names, trademarks and registered trademarks belong to their respective owners. 2010 Samsung Electronics Co., Ltd. All rights reserved. -1- Draft Rev. 0.0 datasheet KLMxGxxEHx moviNAND Revision History Revision No. 0.0 History 1. Initial issue -2- Draft Date Remark Editor Jan, 11. 2010 Draft S.M.Lee KLMxGxxEHx datasheet Draft Rev. 0.0 moviNAND Table Of Contents 1.0 PRODUCT LIST.......................................................................................................................................................... 4 2.0 KEY FEATURES......................................................................................................................................................... 4 3.0 PACKAGE CONFIGURATIONS ................................................................................................................................. 5 3.1 Pin Configuration ..................................................................................................................................................... 5 3.2 Package Dimensions ............................................................................................................................................... 7 3.3 Product Architecture ................................................................................................................................................ 9 4.0 FEATURES OF moviNAND ........................................................................................................................................ 10 4.1 Vendor specific command ....................................................................................................................................... 10 4.1.1 Boot operation mode......................................................................................................................................... 10 4.1.2 Boot partition ..................................................................................................................................................... 10 4.1.3 Change boot partition size ................................................................................................................................ 11 4.1.4 Timing in Boot Mode ......................................................................................................................................... 11 4.2 Smart Report ........................................................................................................................................................... 12 4.2.1 Smart Report Sequence.................................................................................................................................... 12 4.2.2 Smart Report Output Data (For Customer) ....................................................................................................... 13 4.3 Reliable Write .......................................................................................................................................................... 14 4.4 Performance ............................................................................................................................................................ 14 5.0 REGISTER VALUE ..................................................................................................................................................... 15 5.1 OCR Register .......................................................................................................................................................... 15 5.2 CID Register ............................................................................................................................................................ 15 5.2.1 Product Name table (In CID Register) .............................................................................................................. 15 5.3 CSD Register........................................................................................................................................................... 16 5.3.1 Write Protect Group Size .................................................................................................................................. 17 5.4 Extended CSD Register .......................................................................................................................................... 18 5.4.1 Density Specification......................................................................................................................................... 19 6.0 POWER UP ................................................................................................................................................................ 20 7.0 AC PARAMETER........................................................................................................................................................ 21 7.1 Time out Parameter ..........................................................................................................................................21 7.2 Bus Timing Parameter ............................................................................................................................................. 21 8.0 DC PARAMETER ....................................................................................................................................................... 23 8.1 Active Power Consumption during operation .....................................................................................................23 8.2 Standby Power Consumption in auto power saving mode and standby state........................................................ 23 8.3 Sleep Power Consumption in Sleep State.............................................................................................................. 23 8.4 Bus Operating Conditions..................................................................................................................................23 8.5 Bus Signal Line Load............................................................................................................................................... 24 8.5.1 moviNAND Connection Guide........................................................................................................................... 24 8.5.1.1 x8 support Host connection Guide.............................................................................................................. 24 8.5.1.2 x4 support Host connection Guide.............................................................................................................. 25 -3- Draft Rev. 0.0 datasheet KLMxGxxEHx moviNAND INTRODUCTION The SAMSUNG moviNAND is an embedded MMC solution designed in a BGA package form. moviNAND operation is identical to a MMC card and therefore is a simple read and write to memory using MMC protocol v4.3 which is a industry standard. moviNAND consists of NAND flash and a MMC controller. 3V supply voltage is required for the NAND area (VDDF) whereas 1.8V or 3V dual supply voltage (VDD) is supported for the MMC controller. Maximum MMC interface frequency of 52MHz and maximum bus widths of 8 bit are supported. There are several advantages of using moviNAND. It is easy to use as the MMC interface allows easy integration with any microprocessor with MMC host. Any revision or amendment of NAND is invisible to the host as the embedded MMC controller insulates NAND technology from the host. This leads to faster product development as well as faster times to market. The embedded flash mangement software or FTL(Flash Transition Layer) of moviNAND manages Wear Leveling, Bad Block Management and ECC. The FTL supports all features of the Samsung NAND flash platform and achieves optimal performance. The current moviNAND performance is neither limited by the maximum interface frequency nor the maximum bus width but by the performance of NAND. Therefore the maximum performance of moviNAND will saturate at a certain MMC interface frequency and bus width depending on the type and the number of NAND used in moviNAND. 1.0 PRODUCT LIST Capacities moviNAND Part ID NAND Flash Type Power System 1GB KLM1G1CEHC-B101 8Gb MLC x 1 2GB KLM2G1DEHE-B101 16Gb MLC x 1 8GB KLM8G4DEHE-B101 16Gb MLC x 4 16GB KLMAG8DEHE-A101 16Gb MLC x 8 - Interface power : VDD (1.70V ~ 1.95V or 2.7V ~ 3.6V) - Memory power : VDDF (2.7V ~ 3.6V) Package size Pin Configuration 11.5m x 13mm x 1.2mm 153FBGA 12mm x 16mm x 1.4mm 169FBGA 2.0 KEY FEATURES * MultiMediaCard System Specification Ver. 4.3 compatible (Boot operation is supported) * Full backward compatibility with previous MultiMediaCard system ( 1bit data bus, multi-moviNAND systems) * MMC I/F Clock frequency : 0~52MHz MMC I/F Boot frequency : 0~26MHz * Data bus width : 1bit(default), 4bit and 8 bit * Temperature : -25'C to 85'C (Operation) , -40'C to 85'C (Storage) * NAND technology changes invisible to the host -4- Draft Rev. 0.0 datasheet KLMxGxxEHx moviNAND 3.0 PACKAGE CONFIGURATIONS 3.1 Pin Configuration 11.5mm x 13mm x 1.2mm(Max) 1 Pin NO Name Pin NO Name C6 VDD H10 VSS DNU DNU DNU P3 VDD K8 VSS DNU DNU DNU P5 VDD E7 VSS DNU DNU DNU M4 VDD P6 VSS 2 3 4 5 6 7 8 9 10 11 12 13 14 DNU DNU DNU DNU DNU DNU DNU DNU DNU DNU DNU N4 VDD G5 VSS J10 VDDF N5 VSS A K9 VDDF C4 VSS B E6 VDDF P4 VSS C F5 VDDF N2 VSS D C2 VDDI A3 DAT0 E M5 CMD A4 DAT1 M6 CLK A5 DAT2 B2 DAT3 B3 DAT4 B4 DAT5 B5 DAT6 B6 DAT7 DAT0 DAT1 DAT2 DAT3 DAT4 DAT5 DAT6 DAT7 VDDI Vss VDD VDDF Vss VDDF F Vss G Vss H VDDF J Vss K VDDF L M Vss N VDD P VDD CMD VDD Vss Vss VDD CLK Vss DNU DNU DNU DNU DNU DNU DNU DNU DNU DNU DNU DNU DNU DNU DNU Figure 1. 153-FBGA -5- Draft Rev. 0.0 datasheet KLMxGxxEHx moviNAND 12mm x 16mm x 1.4mm(Max) Pin NO Name Pin NO Name K6 VDD AA5 VDD T10 VDDF W4 VDD K2 VDDI Y4 VDD R10 Vss AA3 VDD W5 CMD U9 VDDF W6 CLK M6 VDDF H3 DAT0 N5 VDDF H4 DAT1 U8 Vss H5 DAT2 M7 Vss J2 DAT3 AA6 J3 DAT4 J4 1 2 3 4 5 6 7 8 9 10 11 12 13 14 A B DNU DNU DNU DNU DNU DNU DNU DNU DNU DNU DNU DNU DNU DNU DNU DNU DNU C DNU DNU D DNU DNU E DNU DNU F G H DAT0 DAT1 DAT2 Vss J DAT3 DAT4 DAT5 DAT6 DAT7 P5 Vss K VDDI DAT5 Y5 Vss L J5 DAT6 K4 Vss J6 DAT7 Y2 Vss AA4 Vss Vss VDD M VDDF N VDDF P Vss Vss R Vss T VDDF U Vss VDDF V W Y VDD MCMD MCLK Vss AA VDD VDD Vss Vss VDD Vss AB AC AD DNU DNU AE DNU DNU AF DNU DNU AG AH Figure 2. 169-FBGA -6- Draft Rev. 0.0 datasheet KLMxGxxEHx moviNAND 3.2 Package Dimensions 11.5mm x 13mm x 1.2mm(Max) Units : mm #A1 INDEX MARK 0.08 MAX (Datum A) 11.500.10 A 0.50 x 13 = 6.50 11.500.10 B 1413121110 9 8 7 6 5 4 3 2 1 3.25 0.220.05 1.100.10 153-0.300.05 TOP VIEW 0.20 M A B Figure 3. Package Dimension -7- BOTTOM VIEW 0.50 13.000.10 0.50 x 13 = 6.50 3.25 0.50 A B (Datum B) C D E F G H J K L M N P 13.000.10 13.000.10 #A1 Draft Rev. 0.0 datasheet KLMxGxxEHx moviNAND 12mm x 16mm x 1.4mm(Max) #A1 INDEX MARK 12.000.10 0.08 MAX 0.50 0.25 0.220.05 0.75 1.300.10 1.75 169-0.300.05 0.20 M A B 2.75 3.25 BOTTOM VIEW TOP VIEW Figure 4. Package Dimension -8- 16.000.10 0.50 5.25 16.000.10 6.75 6.25 A B C D E F G H J (Datum B) K L M N P R T U V W Y AA AB AC AD AE AF AG AH #A1 B 1413121110 9 8 7 6 5 4 3 2 1 0.50 x 13 = 6.50 (Datum A) 16.000.10 A 0.50 x 13 = 6.50 0.25 12.000.10 Draft Rev. 0.0 datasheet KLMxGxxEHx moviNAND 3.3 Product Architecture VDDF VDD Data In/Out MMC Bus Interface moviNAND Controller NAND Flash Control moviNAND Figure 5. moviNAND Block Diagram -9- Draft Rev. 0.0 datasheet KLMxGxxEHx moviNAND 4.0 FEATURES OF moviNAND This moviNAND follows MMC4.3 standards. KLMxGxxEHx moviNAND series are housed in 153 ball & 169 ball BGA package and JEDEC standard package size. 4.1 Vendor specific command CMD62 is a Vendor command which Samsung provides for customer to use moviNAND more usefully. One is for Boot partition setting and the other is Smart report. CMD INDEX Type Argument Resp Abbreviation Command Description CMD62 ac [31:0] Argument R1b VENDOR_CMD Vendor command can provide two kinds of functions. One is Smart Report, Second is Boot partition setting. 4.1.1 Boot operation mode In boot operation mode, the master (MultiMediaCard host) can read boot data from the slave (MMC device) by keeping CMD line low after power-on, or sending CMD0 with argument 0xFFFFFFFA (optional for slave), before issuing CMD1. The data can be read from either bootarea or user area depending on register setting. Detail description is refer to MMC 4.3 standard 4.1.2 Boot partition Samsung moviNAND provide boot partition feature which users can set the boot partition size There are two partition regions. The minimum size of each boot partition is 0KB. Boot partition size is calculated as follows: [227:226] Maximum boot partition size = 128K byte x BOOT_SIZE_MULT BOOT_SIZE_MULT: the value in Extended CSD register bytes [227:226] The boot partitions are separated from the user area as shown in below figure. 0x00000000 0x00000000 USER area BOOT area partition 1 Maximum boot partition size 0x00000000 BOOT area partition 2 Maximum boot partition size Figure 4. Memory Partition Slave has boot configuration in Extended CSD register byte [179]. The master can choose the configuration by setting the register using CMD6 (switch). Slave also can be configured to boot from the user area by setting the BOOT_PARTITION_ ENABLE bits in the EXT_CSD register, byte [179] to 111b. If host boot from the user area, it will take longer time than boot partition area. - 10 - Draft Rev. 0.0 datasheet KLMxGxxEHx moviNAND 4.1.3 Change boot partition size Initial boot partition size in moviNAND is set to zero. However, the boot partition size is allowed to be changed by user. Boot partition size changing sequence is following the sequence Figure 4-2 below. Argument of the third CMD62 can be set boot partition size. It can be calculated by this equation. Argument (Boot Size) =(Number of Super Block for boot partition) / 2 For example, if user wants 10 super blocks for boot partition, argument of third CMD62 should be 0x5. Detail values of moviNAND are referred to below Table. After setting the boot partition size, all of data in the moviNAND is removed. And the value of EXT_CSD [227:226] and SEC_COUNT is automatically changing. So user should be careful changing boot partition size. Command 62 (ARG: 0xEFAC62EC) Command 62 (ARG: 0x00CBAEA7) Command 62 (ARG: Boot Size) Wait Busy Clear Figure 6. Boot Partition Size Changing Sequence Density Super Block Size MAX Boot Partition Size Max argument value 1GB 1MB 256MB 128 2GB 1MB 256MB 128 8GB 4MB 1024MB 128 16GB 4MB 1024MB 128 4.1.4 Timing in Boot Mode SAMSUNG moviNAND needs Min.50ms time(tDELAY) to start boot mode right after power-up. This time(tDELAY) includes normal boot mode as well as alternative boot mode. If host does not wait the time(tDELAY) for boot mode , hosts may experience timeout because tBA would be out of spec. VDD VDDF CLK CMD CMD1 S 010 E DAT[0] tBA tDELAY Max 50ms Min 50ms S 512bytes E +CRC RESP CMD2 RESP CMD3 S 512bytes E +CRC Boot terminated Min 8 clocks + 48 clocks = 56 clocks required from CMD signal high to next MMC command. tBD 1 sec Max Figure 7. MultiMediaCard state diagram & timing (boot mode) - 11 - RESP Draft Rev. 0.0 datasheet KLMxGxxEHx moviNAND VDD VDDF CLK CMD CMD01 CMD0/Reset DAT[0] CMD2 RESP CMD3 RESP S 512bytes E +CRC tDELAY Max 50ms after power is stable to RESP tBA clocks required S 512bytes E +CRC S 010 E Min 74 CMD1 tBD Max. 1 sec Min 50ms start boot command Figure 8. MultiMediaCard state diagram & timing (alternative boot mode) NOTE : 1) CMD0 with argument 0xFFFFFFFA 4.2 Smart Report Samsung provide Report feature for the Host to notice the device state by Meta data. Samsung call this Smart Report. So Customer can acquire prime factor for understanding at the beginning analysis of error. Below table is the information about Smart Report. Mode Customer Report Contents 1. Detect Error Mode 2. Detect Super Block Size 3. Detect Super Page Size 4. Detect Optimal Write Size 5. Detect Number Of Banks 6.The number of Initial Bad Block, Per Bank 7.the number of Run Time Bad Block, Per Bank 8.Number of remain block in Reserved Block 9.Max, Min, Avg Erase Count 10.Open count 11.Log message of the location that User Data ECC Error 12.Check result of Meta Data integrity 4.2.1 Smart Report Sequence Functions Command Description Entering Smart Report Mode CMD62h(0xEFAC62EC) CMD62h(0xCCEE) After entering Smart Report Mode, the report-related Values are able to be checked on Read Command. Confirming Smart Report CMD17h(0x0) It is possible to confirm Smart Report after reading Sector 1 at Address 0. Removing Smart Report Mode CMD62h(0xEFAC62EC) CMD62h(0xDECCEE) Smart Report Mode is removed by this command. - 12 - Draft Rev. 0.0 datasheet KLMxGxxEHx moviNAND 4.2.2 Smart Report Output Data (For Customer) Data Slice Field Width Remark [3:0] Error Mode 4 bytes Normal : 0xD2D2D2D2, OpenFatalError : 0x37373737, RuntimeFatalError : 0x5C5C5C5C, MetaBrokenError : 0xE1E1E1E1 * In case of open error, other fields are not valid. [7:4] Super Block Size 4 bytes Total Size(in byte) of simultaneously erasable physical blocks (e.g., Number of Channel * N-way Interleaving * physical block size) [11:8] Super Page Size 4 bytes Total Size(in byte) of simultaneously programmable physical pages (e.g., Number of Channel * physical page size) [15:12] Optimal Write Size 4 bytes Write size(in byte) at which the device performs best (e.g., Super Page Size * N-way Interleaving) [19:16] Number Of Banks 4 bytes Number of banks connecting to each NAND flash. Bad blocks are managed by each banks. [23:20] Bank0 Init Bad Block 4 bytes Number of initial defective physical blocks in Bank0 [27:24] Bank0 Runtime Bad Block 4 bytes Number of runtime defective physical blocks in Bank0 [31:28] Bank0 remain reserved Block 4 bytes Number of remain reserved physical blocks in Bank0 [35:32] Bank1 Init Bad Block 4 bytes Number of initial defective physical blocks in Bank1 [39:36] Bank1 Runtime Bad Block 4 bytes Number of runtime defective physical blocks in Bank1 [43:40] Bank1 remain reserved Block 4 bytes Number of remain reserved physical blocks in Bank1 [47:44] Bank2 Init Bad Block 4 bytes Number of initial defective physical blocks in Bank2 [51:48] Bank2 Runtime Bad Block 4 bytes Number of runtime defective physical blocks in Bank2 [55:52] Bank2 remain reserved Block 4 bytes Number of remain reserved physical blocks in Bank2 [59:56] Bank3 Init Bad Block 4 bytes Number of initial defective physical blocks in Bank3 [63:60] Bank3 Runtime Bad Block 4 bytes Number of runtime defective physical blocks in Bank3 [67:64] Bank3 Reserved Block 4 bytes Number of reserved physical blocks in Bank3 [71:68] Max. Erase Count 4 bytes Maximum erase count from among all physical blocks [75:72] Min. Erase Count 4 bytes Minimum erase count from among all physical blocks [79:76] Avg. Erase Count 4 bytes Average erase count of all physical blocks [83:80] Number of ECC Uncorrectable Error [143:84] ECC Uncorrectable Error Location 2 bytes * 30 Physical Block Address of ECC Uncorrectable Error [203:144] ECC Uncorrectable Error Location 2 bytes * 30 Physical Page Offset of ECC Uncorrectable Error [219:204] Reserved [223:220] Read Reclaim Cnt [511:224] Reserved 4 bytes 4 bytes Number of ECC Uncorrectable Error Number of Read Reclaim Count NOTE: Example for 2GB * Super Block Size : * Super Page Size : * Optimal Write Size : * Number Of Bank : 1,048,576 (1MB ) 8,192 (8KB) 16,384 (16KB) 1 - 13 - KLMxGxxEHx Draft Rev. 0.0 datasheet moviNAND 4.3 Reliable Write MMC 4.3 supports reliable write sequence. Espicially Samsung moviNAND supports Max 255 sectors write by Reliable Write. Detail description is in MMC4.3 Standard CMD Argument CMD23 Bit[31] : reliable Write Request Bit[30:16] : set to 0 Bit[15:0] : number of blocks 4.4 Performance (TBD) Density Sequential Write(MB/s) Sequential Read(MB/s) 1GB 6 15 2GB 6 15 8GB 15 20 16GB 15 20 * Test/Estimation Condition : Bus width x8, 52MHz, 4MB data transfer, w/o file system overhead - 14 - Draft Rev. 0.0 datasheet KLMxGxxEHx moviNAND 5.0 REGISTER VALUE 5.1 OCR Register The 32-bit operation conditions register stores the VDD voltage profile of the moviNAND. In addition, this register includes a status information bit. This status bit is set if the moviNAND power up procedure has been finished. The OCR register shall be implemented by all moviNANDs. VDD voltage window2 Register Value [6:0] Reserved 00 00000b [7] 1.70 - 1.95 1b OCR bit [14:8] 2.0-2.6 000 0000b [23:15] 2.7-3.6 1 1111 1111b [28:24] Reserved 0 0000b Access Mode 00b (byte mode) 10b (sector mode) -[ *Higher than 2GB only] [30:29] [31] moviNAND power up status bit (busy)1 NOTE : 1) This bit is set to LOW if the moviNAND has not finished the power up routine 2) The voltage for internal flash memory(VDDF) should be 2.7-3.6v regardless of OCR Register value. 5.2 CID Register Name Field Width CID-slice CID Value Manufacturer ID MID 8 [127:120] 0x15 6 [119:114] --- Reserved Card/BGA CBX 2 [113:112] 01 OEM/Application ID OID 8 [111:104] ---1 Product name PNM 48 [103:56] See Product name table Product revision PRV 8 [55:48] ---2 Product serial number PSN 32 [47:16] ---3 Manufacturing date MDT 8 [15:8] ---4 CRC7 checksum CRC 7 [7:1] ---5 not used, always '1' - 1 [0:0] --- NOTE : 1),4),5) description are same as MMC4.3 standard 2) PRV is composed of the revision count of controller and the revision count of F/W patch 3) A 32 bits unsigned binary integer. (Random Number) 5.2.1 Product Name table (In CID Register) Part Number Density Product Name in CID Register (PNM) KLM1G1CEHC-B101 1GB 0x4D3147314343 KLM2G1DEHE-B101 2GB 0x4D3247314445 KLM8G4DEHE-B101 8GB 0x4D3847344445 KLMAG8DEHE-A101 16GB 0x4D4147384445 - 15 - Draft Rev. 0.0 datasheet KLMxGxxEHx moviNAND 5.3 CSD Register The Card-Specific Data register provides information on how to access the moviNAND contents. The CSD defines the data format, error correction type, maximum data access time, data transfer speed, whether the DSR register can be used etc. The programmable part of the register (entries marked by W or E, see below) can be changed by CMD27. The type of the entries in the table below is coded as follows: Width Cell Type CSD-slice CSD Value Name Field CSD structure CSD_STRUCTURE 2 R [127:126] 0x2 System specification version SPEC_VERS 4 R [125:122] 0x4 1GB 2GB 8GB Reserved - 2 R [121:120] - Data read access-time 1 TAAC 8 R [119:112] 0x0F Data read access-time 2 in CLK cycles (NSAC*100) NSAC 8 R [111:104] 0x00 Max. bus clock frequency TRAN_SPEED 8 R [103:96] 0x32 Card command classes CCC 12 R [95:84] 0xF5 Max. read data block length READ_BL_LEN 4 R [83:80] Partial blocks for read allowed READ_BL_PARTIAL 1 R [79:79] 0x9 0xA 0x9 0x9 0xFFF 0xFFF 0x0 Write block misalignment WRITE_BLK_MISALIGN 1 R [78:78] 0x0 Read block misalignment READ_BLK_MISALIGN 1 R [77:77] 0x0 DSR implemented DSR_IMP 1 R [76:76] 0x0 Reserved - 2 R [75:74] - Card size C_SIZE 12 R [73:62] Min. read current @ VDD min VDD_R_CURR_MIN 3 R [61:59] 0x7 Max. read current @ VDD max VDD_R_CURR_MAX 3 R [58:56] 0x7 Min. write current @ VDD min VDD_W_CURR_MIN 3 R [55:53] 0x7 Max. write current @ VDD max VDD_W_CURR_MAX 3 R [52:50] 0x7 Card size multiplier C_SIZE_MULT 3 R [49:47] Erase group size ERASE_GRP_SIZE 5 R [46:42] Erase group size multiplier ERASE_GRP_MULT 5 R [41:37] 0x1F Write protect group size WP_GRP_SIZE 5 R [36:32] 0x1F Write protect group enable WP_GRP_ENABLE 1 R [31:31] 0x1 Manufacturer default ECC DEFAULT_ECC 2 R [30:29] 0x0 0xEE7 0xEE7 0x7 0x3 0x3 0xF Write speed factor R2W_FACTOR 3 R [28:26] 0x5 Max. write data block length WRITE_BL_LEN 4 R [25:22] 0x9 Partial blocks for write allowed WRITE_BL_PARTIAL 1 R [21:21] 0x0 Reserved - 4 R [20:17] - Content protection application CONTENT_PROT_APP 1 R [16:16] 0x0 File format group FILE_FORMAT_GRP 1 R/W [15:15] 0x0 Copy flag (OTP) COPY 1 R/W [14:14] 0x1 Permanent write protection PERM_WRITE_PROTECT 1 R/W [13:13] 0x0 Temporary write protection TMP_WRITE_PROTECT 1 R/W/E [12:12] 0x0 File format FILE_FORMAT 2 R/W [11:10] 0x0 ECC code ECC 2 R/W/E [9:8] 0x0 CRC CRC 7 R/W/E [7:1] - Not used, always '1' - 1 - [0:0] - - 16 - 16GB 0xF Draft Rev. 0.0 datasheet KLMxGxxEHx moviNAND 5.3.1 Write Protect Group Size The unit of write protect in moviNAND is defined as multiples of Erase group size. For each density of moviNAND, detail information is described below. Value Register Block Length Erase Group Write Protect Group CSD Field 1GB 2GB 8GB Calculation 16GB Unit Size 1GB 2GB 8GB 16GB WRITE_BL_LEN - ERASE_GRP_SIZE ERASE_GRP_MULT (ERASE_GRP_SIZE+1) x (ERASE_GRP_MULT+1) x BL_LEN (512B) 64KB 256KB WP_GRP_SIZE Erase Group(Erasable Unit Size) X (WP_GRP_SIZE + 1) 2048KB 8192KB - 17 - 512B Draft Rev. 0.0 datasheet KLMxGxxEHx moviNAND 5.4 Extended CSD Register The Extended CSD register defines the moviNAND properties and selected modes. It is 512 bytes long. The most significant 320 bytes are the Properties segment, which defines the moviNAND capabilities and cannot be modified by the host. The lower 192 bytes are the Modes segment, which defines the configuration the moviNAND is working in. These modes can be changed by the host by means of the SWITCH command. Name Size (Bytes) Field Cell Type CSD Value CSD-slice 1GB 2GB 8GB 16GB Properties Segment Reserved1 Supported Command Sets 7 Reserved1 Boot information Reserved - R [504] 0x1 275 TBD [503:229] - 1 R [228] 0x1 275 TBD [227] - 1 R [226] 0x0 BOOT_INFO 1 Boot partition size [511:505] 1 S_CMD_SET BOOT_SIZE_MULTI2 Access size ACC_SIZE 1 R [225] 0x6 High-capacity erase unit size HC_ERASE_GRP_SIZE 1 R [224] 0x0 High-capacity erase timeout ERASE_TIMEOUT_MULT 1 R [223] 0x0 Reliable write sector count REL_WR_SEC_C 1 R [222] 0xFF High-capacity write protect group size HC_WP_GRP_SIZE 1 R [221] 0x0 Sleep current (VCC) S_C_VCC 1 R [220] 0x8 Sleep current (VCCQ) S_C_VCCQ 1 R [219] 0x0A 1 TBD [218] - 1 R [217] 0x13 1 TBD [216] - 4 R [215:212] Reserved 1 Sleep/awake timeout Reserved S_A_TIMEOUT 1 Sector Count SEC_COUNT Reserved1 1 0x0 0x0 0x00E E8000 [211] - Minimum Write Performance for 8bit @52MHz MIN_PERF_W_8_52 1 R [210] 0x0 Minimum Read Performance for 8bit @52MHz MIN_PERF_R_8_52 1 R [209] 0x14 Minimum Write Performance for 8bit @26MHz /4bit @52MHz MIN_PERF_W_8_26_4_52 1 R [208] 0x0 Minimum Read Performance for 8bit @26MHz /4bit @52MHz MIN_PERF_R_8_26_4_52 1 R [207] 0x14 Minimum Write Performance for 4bit @26MHz MIN_PERF_W_4_26 1 R [206] 0x0 Minimum Read Performance for 4bit @26MHz MIN_PERF_R_4_26 1 R [205] 0x0 [204] - Reserved1 1 Power Class for 26MHz @ 3.6V PWR_CL_26_360 1 R [203] 0x2 Power Class for 52MHz @ 3.6V PWR_CL_52_360 1 R [202] 0x2 Power Class for 26MHz @ 1.95V PWR_CL_26_195 1 R [201] 0x6 Power Class for 52MHz @ 1.95V PWR_CL_52_195 1 R [200] 0x6 [199:197] - Reserved 1 Card Type Reserved 3 CARD_TYPE 1 1 CSD Structure Version CSD_STRUCTURE 1 Reserved1 Extended CSD Revision R 1 R 1 EXT_CSD_REV 1 - 18 - R [196] 0x3 [195] - [194] 0x2 [193] - [192] 0x3 0x01DD 0000 Draft Rev. 0.0 datasheet KLMxGxxEHx moviNAND Modes Segment Command Set Reserved Reserved CMD_SET_REV 1 POWER_CLASS 1 HS_TIMING 1 Reserved1 Erased Memory Content ERASED_MEM_CONT 1 Boot configuration Reserved [186] - R/W [185] 0x0 [184] - WO [183] 0x1 [182] - [181] 0x0 [180] - [179] 0x0 [178] - R/W [177] 0x0 [176] - R/W [175] 0x0 [174:0] - R/W 1 BOOT_BUS_WIDTH 1 ERASE_GROUP_DEF 1 1 High-density erase group definition 0x0 RO 1 Reserved1 Boot bus width1 [187] 1 BOOT_CONFIG 1 Reserved1 - - 1 Reserved1 [190] 0x0 1 BUS_WIDTH 0x0 [189] R/W 1 [191] [188] 1 1 Bus Width Mode RO 1 1 High Speed Interface Timing R/W 1 1 Power Class Reserved 1 1 Command Set Revision Reserved CMD_SET 175 NOTE : 1) Reserved bits should be read as "0." 2) BOOT_SIZE_MULTI is extended one more byte for Boot partition size. 5.4.1 Density Specification Parameter 1GB 2GB 8GB 16GB User area density more than 1,000,000,000Byte more than 2,000,000,000Byte more than 8,000,000,000Byte more than 16,000,000,000Byte C_SIZE in CSD 0xEE7 0xEE7 0xFFF 0xFFF SEC_COUNT in Extended CSD 0x00 0x00 0x00EE8000 0x01DD0000 - 19 - Draft Rev. 0.0 datasheet KLMxGxxEHx moviNAND 6.0 POWER UP An moviNAND bus power-up is handled locally in each device and in the bus master. Figure 6 shows the power-up sequence and is followed by specific instructions regarding the power-up sequence. Supply voltage VDDF (MAX) Memory field working voltage range VDDF (MIN) VDD (MAX) VDD Control logic working voltage range VDD (MIN) Power-up time(tPUP) Supply ramp-up time first CMD1 to card ready(tINIT) 15ms Initialization sequence CMD1 Initialization delay : The longest of : 1ms, 74 clock cycles, the supply ramp-up time, or the boot operation period. Ncc1 Ncc CMD1 Optional reperitions of CMD1 until the card responds with busy bit set. Figure 9. moviNAND Power up Sequence - 20 - CMD1 Ncc CMD2 Draft Rev. 0.0 datasheet KLMxGxxEHx moviNAND 7.0 AC PARAMETER 7.1 Time out Parameter Parameter Symbol Max Unit Initialization Time Out tINIT 1 s Power-up time tPUP 15 ms Write Time Out - 600 ms Erase Time Out - 1 s Read Time Out - 100 Wake up time Time to enter sleep ms - 45000 us - 2502 us - 10 us 1 NOTE: 1) Wake-up time when VDDF power supply is off during the sleep state. 2) Wake-up time when VDDF power supply is on during the sleep state. 7.2 Bus Timing Parameter fPP CLK 50% of VDD tWL tWH CLK 50% of VDD Clock tTHL tTLH tISU tIH tOSU tOH Input tODLY Output Figure 10. Timing Diagram - Data Input/Output Referenced to Clock - 21 - Draft Rev. 0.0 datasheet KLMxGxxEHx moviNAND Default (under 26MHz) Parameter Symbol Min Max Unit Remark1 Clock CLK(All values are referred to min(VIH) and max(VIL)2 Clock frequency Data Transfer Mode3 fPP 04 26 MHz CL <= 30 pF Tolerance: +100KHz Clock frequency Identification Mode fOD 04 400 kHz Tolerance: +20KHz Clock low time tWL 10 ns CL <= 30 pF Clock high time tWH 10 time5 tTLH 10 ns CL <= 30 pF tTHL 10 ns CL <= 30 pF Clock rise Clock fall time Inputs CMD, DAT (referenced to CLK) Input set-up time tISU 3 ns CL <= 30 pF Input hold time tIH 3 ns CL <= 30 pF Outputs CMD, DAT (referenced to CLK) Output hold time tOH 8.3 ns CL <= 30 pF Output set-up time tOSU 11.7 ns CL <= 30 pF NOTE : 1)The card must always start with the backward-compatible interface timing mode can be switched to high-speed interface timing by the host sending the SWITCH command (CMD6) with the argument for high-speed interface select. 2) CLK timing is measured at 50% of VDD. 3) For compatibility with cards that suport the v4.2 standard or earlier, host should not use>20MHz before switching to high-speed interface timing. 4) Frequency is periodically sampled and not 100% tested. 5) CLK rise and fall times are measured by min(VIH) and max(VIL). High-Speed Mode Parameter Symbol Min Max Unit Remark Clock CLK(All values are referred to min(VIH) and max(VIL)1 Clock frequency Data Transfer Mode2 fPP 03 524 MHz CL <= 30 pF Clock frequency Identification Mode fOD 03 400 kHz CL <= 30 pF Clock low time tWL 6.5 ns CL <= 30 pF Clock High time tWH 6.5 ns CL <= 30 pF Clock rise time5 tTLH 3 ns CL <= 30 pF Clock fall time tTHL 3 ns CL <= 30 pF Inputs CMD, DAT (referenced to CLK) Input set-up time tISU 3 ns CL <= 30 pF Input hold time tIH 3 ns CL <= 30 pF 13.7 ns CL <= 30 pF tRISE 3 ns CL <= 30 pF tFALL 3 ns CL <= 30 pF Outputs CMD, DAT (referenced to CLK) Output Delay time during Data Transfer Mode Output hold time Signal rise time6 Signal fall time tODLY tOH 2.5 CL <= 30 pF NOTE : 1) CLK timing is measured at 50% of VDD. 2) A MultiMediaCard shall support the full frequency range from 10-26MHz, or 10-52MHz 3) Frequency is periodically sampled and not 100% tested. 4) Card can operate as high-speed card interface timing at 26MHz clock frequency. 5) CLK rise and fall times are measured by min(VIH) and max(VIL).6) Inputs CMD, DAT rise and fall times are measured by min(VIH) and max(VIL), and outputs CMD, DAT rise and fall times are measured by min(VOH) and max(VOL). - 22 - Draft Rev. 0.0 datasheet KLMxGxxEHx moviNAND 8.0 DC PARAMETER 8.1 Active Power Consumption during operation (TBD) Density NAND Type 1GB 8Gb MLC x 1 2GB 16Gb MLC x 1 8GB 16Gb MLC x 4 16GB 16Gb MLC x 8 ICC @ CTRL ICC @ NAND Max Max Unit 50 100 mA 200 * Power Measurement conditions: Temperature = 85'C(Worst case) 25'C(Typical case) , Bus configuration =x8 @52MHz , 8.2 Standby Power Consumption in auto power saving mode and standby state (TBD) Density NAND Type 1GB 8Gb MLC x 1 2GB 16Gb MLC x 1 8GB 16Gb MLC x 4 16GB 16Gb MLC x 8 ICC @ CTRL ICC @ NAND Max Max Unit 50 300 uA 200 400 * Power Measurement conditions: Temperature = 85'C(Worst case) 25'C(Typical case) , Bus configuration =x8 @52MHz , * In auto power saving mode(and Standby state) , wake time should be 8.3 Sleep Power Consumption in Sleep State (TBD) Density NAND Type 1GB 8Gb MLC x 1 2GB 16Gb MLC x 1 8GB 16Gb MLC x 4 16GB 16Gb MLC x 8 ICC @ CTRL ICC @ NAND Max Max 300 01 Unit uA * Power Measurement conditions: Temperature = 85'C(Worst case) 25'C(Typical case) , Bus configuration =x8 @52MHz , * 1) In auto power saving mode , NAND power can not be turned off .However in sleep mode NAND power can be turned off. If NAND power is alive , NAND power is same with that of the Standby state. 8.4 Bus Operating Conditions Parameter Min Max Unit Peak voltage on all lines -0.5 3.6 V Input Leakage Current -10 10 A Output Leakage Current -10 10 A Parameter Symbol Min Max Unit VDD 1.70(or 2.7) 1.95(or 3.6) V Supply voltage VDDF 2.7 3.6 V VSS -0.5 0.5 V - 23 - Draft Rev. 0.0 datasheet KLMxGxxEHx moviNAND 8.5 Bus Signal Line Load The total capacitance CL of each line of the moviNAND bus is the sum of the bus master capacitance CHOST, the bus capacitance CBUS itself and the capacitance Cmovi of the moviNAND connected to this line: CL = CHOST + CBUS + Cmovi The sum of the host and bus capacitances should be under 20pF. Parameter Symbol Min Max Unit Pull-up resistance for CMD RCMD 4.7 100 KOhm to prevent bus floating Pull-up resistance for DAT0-DAT7 RDAT 50 100 KOhm to prevent bus floating Internal pull up resistance DAT0-DAT7 Rint 50 150 KOhm to prevent unconnected lines floating Bus signal line capacitance CL 30 pF Single moviNAND capacitance Cmovi 13 pF 16 nH Maximum signal line inductance Remark Single moviNAND fPP <= 52 MHz 8.5.1 moviNAND Connection Guide This Connection guide is an example for customers to adopt moviNAND more easily 8.5.1.1 x8 support Host connection Guide * This appendix is Just guideline for moviNAND connection. This value and schematic can be changed depens on the system environment. * Coupling capacitor (1 F + 0.1F) have to be connected with VDD and VSS as close as possible. * VDDI Capacitor is min 0.1uF VDD VDD VDD R R R R R R R R R 50k 50k 50k 50k 50k 50k 50k 50k 10k moviNAND R 22 ~46 CLK CLK CMD Host Controller CMD DAT0 DAT1 DAT2 DAT3 DAT4 DAT5 DAT6 DAT7 DAT0 DAT1 DAT2 DAT3 DAT4 DAT5 DAT6 DAT7 C2 C 0.1uF - 24 - VDDI VDD VDDF C 1uF VDDF VSS C 1uF C 0.1uF C 0.1uF Draft Rev. 0.0 datasheet KLMxGxxEHx moviNAND 8.5.1.2 x4 support Host connection Guide VDD VDD VDD R R R R R 50k 50k 50k 50k 10k moviNAND R 22 ~46 CLK CLK CMD Host Controller CMD DAT0 DAT1 DAT2 DAT3 DAT0 DAT1 DAT2 DAT3 DAT4 DAT5 DAT6 DAT7 C2 C 0.1uF - 25 - VDDI VDD VDDF C 1uF VDDF VSS C 1uF C 0.1uF C 0.1uF