w WM9001
1W Dual-Mode Class AB/D Speaker Driver
WOLFSON MICROELECTRONICS plc
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Production Data, March 2010, Rev 4.1
Copyright ©2010 Wolfson Microelectronics plc
DESCRIPTION
The WM9001 is a powerful, high quality speaker driver which
can operate in class D or AB mode, providing total flexibility to
the system designer. Low leakage, high PSRR and pop/click
suppression enable direct battery connection to the speaker
supply. RF noise suppression techniques and differential design
are used to suppress undesired noise. A single-ended input
option has been included for complete system flexibility.
The device is enabled by setting a logic '1' on the EN pin. The
class D clock can be generated by an internal oscillator, or
supplied from an external clock source.
Flexible speaker boost options (requiring no additional
components) allow output volume to be maximised for various
SPKVDD/AVDD combinations while minimising internal power
consumption.
The WM9001 is available in a 3x3mm QFN package, ideal for
portable systems such as mobile phones, portable navigation
devices, media players, laptop computers and electronic
dictionaries.
FEATURES
• Class D and AB speaker driver modes for flexibility
• Speaker driver provides 1W into 8Ω at <0.1% THD
• SNR 102dB (Class AB), 97dB (Class D)
• Differential and single-ended input modes
• >80dB PSRR @ 217Hz (SPKVDD)
• <1μA typical leakage with direct battery connection
• Filterless speaker connection
• Fully differential architecture (differential mode)
• Pop/click suppression
• RF noise suppression
• Fully compatible with Wolfson CODECs
including WM8990 / WM8991
• Internal oscillator or external clock source
• Thermal shutdown protection
• 3x3mm QFN package
APPLICATIONS
• Mobile phones
• Portable navigation devices
• Portable media players
• Laptop computers and portable gaming devices
• Electronic dictionaries
• General-purpose high quality speaker amplifier
BLOCK DIAGRAM
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TABLE OF CONTENTS
DESCRIPTION ....................................................................................................... 1
FEATURES..... ................ ............... ................ ................ ................ ................ ......... 1
APPLICATIONS ..................................................................................................... 1
BLOCK DIAGRAM ................................................................................................. 1
TABLE OF CONTENTS ......................................................................................... 2
PIN CONFIGURATION ... ............... ................ .................... ................ ................ ..... 3
ORDERING INFORMATION .................................................................................. 3
PIN DESCRIPTION ................................................................................................ 4
ABSOLUTE MAXIMUM RATINGS ......................................................................... 5
RECOMMENDED OPERATING CONDITIONS ..................................................... 5
THERMAL PERFORMANCE ................................................................................. 6
POWER DE-RATING ............................................................................................. 7
ELECTRICAL CHARACTERISTICS ...................................................................... 8
TERMINOLOGY ...... .......... .......... ............. ......... .......... .......... .......... .......... ......... .......... .. 9
TYPICAL POWER CONSUMPTION .................................................................... 10
SPEAKER DRIVER PERFORMANCE ................................................................. 11
CLASS D MODE .......................................................................................................... 11
CLASS AB MODE ........................................................................................................ 11
PSRR PERFORMANCE ....................................................................................... 12
EFFICIENCY ........................................................................................................ 13
AUDIO SIGNAL PATHS ....................................................................................... 14
DEVICE DESCRIPTION ....................................................................................... 15
INTRODUCTION .......................................................................................................... 15
POWER ON RESET .................................................................................................... 15
ENABLE ....................................................................................................................... 15
INPUT SIGNAL PATH .................................................................................................. 16
SYNC ........................................................................................................................... 16
SPEAKER DRIVER MODE SELECT ............................................................................ 17
SIGNAL BOOST CONTROL ........................................................................................ 17
THERMAL SHUTDOWN .............................................................................................. 18
RF NOISE SUPPRESSION .......................................................................................... 18
POPS / CLICK SUPPRESSION ................................................................................... 18
APPLICATIONS INFORMATION ......................................................................... 19
TYPICAL STAND-ALONE USAGE ............................................................................... 19
TYPICAL USAGE WITH WM8991 CODEC ................................................................. 20
SPEAKER SELECTION ............................................................................................... 21
PCB LAYOUT CONSIDERATIONS .............................................................................. 22
RECOMMENDED EXTERNAL COMPONENTS ........................................................... 23
PACKAGE DIMENSIONS .................................................................................... 24
IMPORTANT NOTICE .......................................................................................... 25
ADDRESS .................................................................................................................... 25
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PIN CONFIGURATION
The WM9001 is supplied in a 3mm x 3mm 16 pin QFN package
QFN
ORDERING INFORMATION
DEVICE MINIMUM ORDER
QUANTITY
TEMPERATURE
RANGE
PACKAGE MOISTURE
SENSITIVITY LEVEL
PEAK SOLDERING
TEMPERATURE
QFN
WM9001GEFL
164 -40°C to 85°C QFN MSL 1 260°C
QFN
WM9001GEFL/R
3500 -40°C to 85°C QFN MSL 1 260°C
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PIN DESCRIPTION
PIN NO NAME TYPE DESCRIPTION
16 INP_SEL Digital Input Audio Input Mode Select
15 LIP Analogue Input Positive differential input
14 EN Enable Device Enable input
13 LIN Analogue Input Negative differential input
12 BSEL2 Digital Input Signal Boost Control[2]
11 BSEL1 Digital Input Signal Boost Control[1]
10 BSEL0 Digital Input Signal Boost Control[0]
9 VMID Analogue Output Midrail voltage decoupling capacitor
8 AVDD Supply Analogue supply
7 CDMODE Digital In Class AB/D Mode select
6 AGND Supply Analogue supply ground
5 SYNC Digital Input Class D clock input
4 VOUTN Analogue Output Speaker negative output
3 SPKGND Supply Speaker driver supply ground
2 SPKVDD Supply Speaker driver supply
1 VOUTP Analogue Output Speaker positive output
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ABSOLUTE MAXIMUM RATINGS
Absolute Maximum Ratings are stress ratings only. Permanent damage to the device may be caused by continuously
operating at or beyond these limits. Device functional operating limits and guaranteed performance specifications are given
under Electrical Characteristics at the test conditions specified.
ESD Sensitive Device. This device is manufactured on a CMOS process. It is therefore generically susceptible
to damage from excessive static voltages. Proper ESD precautions must be taken during handling and storage
of this device.
Wolfson tests its package types according to IPC/JEDEC J-STD-020B for Moisture Sensitivity to determine acceptable storage
conditions prior to surface mount assembly. These levels are:
MSL1 = unlimited floor life at <30°C / 85% Relative Humidity. Not normally stored in moisture barrier bag.
MSL2 = out of bag storage for 1 year at <30°C / 60% Relative Humidity. Supplied in moisture barrier bag.
MSL3 = out of bag storage for 168 hours at <30°C / 60% Relative Humidity. Supplied in moisture barrier bag.
The Moisture Sensitivity Level for each package type is specified in Ordering Information.
CONDITION MIN MAX
AVDD -0.3V +4.5V
SPKVDD -0.3V +7V
Digital Inputs voltage range AGND -0.3V AVDD +0.3V
Analogue Inputs voltage range AGND -0.3V AVDD +0.3V
Operating temperature range, TA -40ºC +85ºC
Junction temperature, TJ -40ºC +150ºC
Storage temperature after soldering -65ºC +150ºC
RECOMMENDED OPERATING CONDITIONS
PARAMETER SYMBOL MIN TYP MAX UNIT
Analogue supply AVDD 2.7 3.6 V
Speaker supply SPKVDD 2.7 5.5 V
Ground AGND, SPKGND 0 V
Notes:
1. Analogue and speaker grounds must always be within 0.3V of each other.
2. All supplies are completely independent from each other (i.e. not internally connected).
3. AVDD must be less than or equal to SPKVDD.
4. SPKVDD must be high enough to support the peak output voltage when using DCGAIN and ACGAIN functions, to
avoid output waveform clipping. Peak output voltage is AVDD*(DCGAIN+ACGAIN)/2.
5. The EN and SYNC pins are compatible with low voltage (eg. 1.8v) logic levels from external devices, and can accept
logic 1 digital inputs as low as 1.6V, even though the WM9001 AVDD supply minimum is 2.7V. This provides
compatibility with a low voltage DVDD on a controlling device such as the WM8991 CODEC.
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THERMAL PERFORMANCE
Thermal analysis should be performed in the intended application to prevent the WM9001 from
exceeding maximum junction temperature. Several contributing factors affect thermal performance
most notably the physical properties of the mechanical enclosure, location of the device on the PCB
in relation to surrounding components and the number of PCB layers. Connecting the GND
pins/paddle through thermal vias and into a large ground plane will aid heat extraction.
Three main heat transfer paths exist to surrounding air:
- Package top to air (radiation).
- Package bottom to PCB (radiation).
- Package pins/paddle/balls to PCB (conduction).
The temperature rise TR is given by TR = PD * ӨJA
- PD is the power dissipated in the device.
- ӨJA is the thermal resistance from the junction of the die to the ambient temperature
and is therefore a measure of heat transfer from the die to surrounding air. ӨJA is
determined with reference to JEDEC standard JESD51-9.
The junction temperature TJ is given by TJ = TA +TR, where TA is the ambient temperature.
PARAMETER SYMBOL MIN TYP MAX UNIT
Operating temperature range TA -40 85 °C
Operating junction temperature TJ -40 100 °C
Thermal Resistance ӨJA 52 °C/W
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POWER DE-RATING
The speaker driver has been designed to drive a maximum of 1W into 8Ω with a 5V supply.
However, thermal restrictions defined by the package ӨJA limit the amount of power that can be
safely dissipated in the device without exceeding the maximum operating junction temperature.
Power dissipated in the device correlates directly with speaker efficiency, hence there are separate
de-rating curves for class D and class AB operation.
Under no circumstances should the recommended maximum powers be exceeded.
The de-rating curves in Figure 1 are based on a sinusoidal input signal delivering a maximum output
power of 1W into 8Ω.
CLASS D
CLASS AB
P
[W]
T
[ºC]
807060
0.4
0.6
0.8
1.0
SPKVDD = 2.7V
SPKVDD = 3V
SPKVDD = 3.3V
SPKVDD = 3.6V
SPKVDD = 4.2VSPKVDD = 5VSPKVDD = 5.5V
0.9
0.7
0.3
0.5
0.1
0.2
55 65 75 85
Figure 1 Speaker Power De-Rating Curves
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ELECTRICAL CHARACTERISTICS
Test Conditions
AVDD = 3.3V; SPKVDD = 5V, TA = +25oC, 1kHz input signal, BSEL[2:0] = 000 unless otherwise stated.
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
Analogue Input Pins (LIN, LIP)
Maximum Full-Scale Input Signal Level
Differential Mode (INP_SEL=0): This is
the maximum on each input pin; the total
differential input is 2x this figure.
Single-Ended Mode (INP_SEL=1): This is
the maximum on LIP.
Note that the maximum signal level scales
in proportion to AVDD (AVDD/3.3).
1.0
0
Vrms
dBV
Input Resistance – Differential Mode
(INP_SEL=0)
Gain=0dB (BSEL[2:0]=000) 160 kΩ
Gain=2.1dB (BSEL[2:0]=001) 123 kΩ
Gain=2.9dB (BSEL[2:0]=010) 112 kΩ
Gain=3.6dB (BSEL[2:0]=011) 103 kΩ
Gain=4.5dB (BSEL[2:0]=100) 94 kΩ
Gain=5.1dB (BSEL[2:0]=101) 87 kΩ
Input Resistance – Single-Ended Mode
(INP_SEL=1)
All gain settings 20 kΩ
Input Capacitance 10 pF
Speaker Driver Performance
SNR (A-weighted) BSEL[2:0] = 011 (1.52x)
8Ω Bridge Tied Load
Class D Mode
Differential and Single-Ended
Input Modes
90 97 dB
THD (PO=0.5W) -92 -81 dB
THD+N (PO=0.5W) -87 -79 dB
THD (PO=1.0W) -83 -73 dB
THD+N (PO=1.0W) -78 -68 dB
SNR (A-weighted) BSEL[2:0] = 011 (1.52x)
8Ω Bridge Tied Load
Class AB Mode
Differential and Single-Ended
Input Modes
94 102 dB
THD (PO=0.5W) -79 -70 dB
THD+N (PO=0.5W) -77 -68 dB
THD (PO=1.0W) -77 -70 dB
THD+N (PO=1.0W) -75 -68 dB
Mute Attenuation Device disabled (EN=0) 100 dB
Common Mode Rejection Ratio Differential Mode 50 dB
Bandwidth 0 22 kHz
AVDD PSRR 100mV pk-pk ripple, 217Hz 60 dB
SPKVDD PSRR 83 dB
DC Offset at load 5 mV
SPKVDD Leakage Current EN=0 0.3 μA
AVDD Leakage Current EN=0 9 μA
Reference Levels
VMID Midrail Reference Voltage -3% AVDD/2 +3% V
Output Common Mode Voltage
(Note: BSEL[2:0]=110 and BSEL[2:0]=111
are reserved settings)
BSEL[2:0] = 000 1.00 x VMID V
BSEL[2:0] = 001 1.27 x VMID
BSEL[2:0] = 010 1.40 x VMID
BSEL[2:0] = 011 1.52 x VMID
BSEL[2:0] = 100 1.67 x VMID
BSEL[2:0] = 101 1.80 x VMID
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Test Conditions
AVDD = 3.3V; SPKVDD = 5V, TA = +25oC, 1kHz input signal, BSEL[2:0] = 000 unless otherwise stated.
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
Input / Output (for hardware control)
Input HIGH Level (BSEL, CDMODE) 0.7×AVDD V
Input HIGH Level (EN, SYNC) 1.6 V
Input LOW Level 0.3×AVDD V
Input capacitance 10 pF
Input leakage -0.9 0.9 uA
Oscillator
Free-running oscillator frequency 600 800 950 kHz
External clock frequency range 600 800 950 kHz
Power-Up Time (Based on recommended Vmid capacitor value; these times will vary with different capacitors)
Class AB Enable time Vmid capacitor = 4.7μF 400 ms
Class D Enable time Vmid capacitor = 4.7μF 100 ms
TERMINOLOGY
1. Signal-to-Noise Ratio (dB) – SNR is a measure of the difference in level between the maximum theoretical full scale
output signal and the output with no input signal applied.
2. Total Harmonic Distortion (dB) – THD is the level of the rms value of the sum of harmonic distortion products relative
to the amplitude of the measured output signal.
3. Total Harmonic Distortion plus Noise (dB) – THD+N is the level of the rms value of the sum of harmonic distortion
products plus noise in the specified bandwidth relative to the amplitude of the measured output signal.
4. All performance measurements carried out with 20kHz low pass filter, and where noted an A-weighted filter. Failure to
use such a filter will result in higher THD and lower SNR readings than are found in the Electrical Characteristics. The
low pass filter removes out of band noise; although it is not audible it may affect dynamic specification values.
5. Mute Attenuation – This is a measure of the difference in level between the full scale output signal and the output with
mute applied.
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TYPICAL POWER CONSUMPTION
MODE GAIN EN CDMODE SYNC INP_SEL TOTAL
(V) (uA) (V) (uA) (uW)
OFF 0dB0000002.70.020.054
EN=0, AVDD=0V 0dB0000003.70.060.222
0dB0000004.20.110.462
0dB00000050.140.7
0dB0000005.50.170.935
(V) (uA) (V) (uA) (uW)
OFF Standby 0dB 00002.77.672.70.0220.763
EN=0, AVDD enabled 2.1dB000038.163.70.0724.739
2.1dB00003.38.914.20.129.823
3.6dB00003.38.9350.3731.319
3.6dB00003.69.755.50.6438.62
(V) (mA) (V) (mA) (mW)
Class AB Speaker Mode 0dB 11002.70.32.73.4510.12
8Ω2.1dB110030.333.74.6918.35
2.1dB11003.30.354.25.624.71
3.6dB11003.30.3556.3733
3.6dB11003.60.385.57.4242.16
Class D Speaker Mode 0dB10002.71.092.71.085.84
8Ω2.1dB100031.223.71.529.3
Internal Oscillator 2.1dB10003.31.364.21.812.06
3.6dB10003.31.3652.1515.23
3.6dB10003.61.55.52.4218.74
Class D Speaker Mode 0dB 1 0 800kHz 0 2.7 1.08 2.7 1.13 5.97
8Ω2.1dB 1 0 800kHz 0 3 1.23 3.7 1.54 9.4
External Oscillator 2.1dB 1 0 800kHz 0 3.3 1.37 4.2 1.76 11.91
3.6dB 1 0 800kHz 0 3.3 1.37 5 2.19 15.45
3.6dB 1 0 800kHz 0 3.6 1.52 5.5 2.47 19.06
(V) (mA) (V) (mA) (mW)
Class AB Speaker Mode
0.45W into 8Ω
Class AB Speaker Mode
0.2W into 8Ω
Class D Speaker Mode
1W into 8Ω
Class D Speaker Mode
0.5W into 8Ω
606.73
1180.18
3.6dB10003.31.365120.45
722.26
3.6dB10003.31.345235.15
1059.3
3.6dB11003.30.355144.22
3.3 0.35 5 211.63
QUIESCENT
ACTIVE
3.6dB1100
AVDD SPKVDD
BATTERY LEAKAGE
STANDBY LEAKAGE
Note that the Gain settings are determined by the BSEL[2:0] values as follows:
Gain (dB) Gain (v) BSEL[2] BSEL[1] BSEL[0]
0dB 1.00x 0 0 0
2.1dB 1.27x 0 0 1
2.9dB 1.40x 0 1 0
3.6dB 1.52x 0 1 1
4.5dB 1.67x 1 0 0
5.1dB 1.80x 1 0 1
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SPEAKER DRIVER PERFORMANCE
The THD+N performance of the Speaker Driver is shown below for Class AB mode and for Class D mode.
Load RL = 8Ω + 22μH, Frequency = 1kHz.
Data is provided for four typical Power Supply /Gain combinations:
AVDD SPKVDD GAIN
2.7V 2.7V 0 dB (x1.0)
3.0V 3.7V 2.1 dB (x1.27)
3.3V 4.2V 2.1 dB (x1.27)
3.3V 5.0V 3.6 dB (x1.52)
CLASS D MODE
WM9001 THD+N Ratio v Output Power
Cla ss D
0.001
0.01
0.1
1
10
0 0.2 0.4 0.6 0.8 1 1.2 1.4
Output Power (W)
THD+N Ratio (%)
SPKVDD=5.0V, AVDD=3.3V, Gain=3.6dB SPKVDD=4.2V, AVDD=3.3V, Gain=2.1dB
SPKVDD=3.7V, AVDD=3.0V, Gain=2.1dB SPKVDD=2.7V, AVDD=2.7V, Gain=0dB
Figure 2 Class D Speaker Performance
CLASS AB MODE
WM9001 THD+N Ratio v Output Power
Class AB
0.001
0.01
0.1
1
10
0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6
Output Power (W)
THD+N Ratio (%)
SPKVDD=5.0V, AVDD=3.3V, Gain=3.6dB SPKVDD=4.2V, AVDD=3.3V, Gain=2.1dB
SPKVDD=3.7V, AVDD=3.0V, Gain=2.1dB SPKVDD=2.7V, AVDD=2.7V, Gain=0dB
Figure 3 Class AB Speaker Performance
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PSRR PERFORMANCE
Typical PSRR versus frequency curves are provided below. The curves were produced by
superimposing a 100mV pk-pk ripple onto a DC level at the supply pin and measuring rejection of
this signal at the output.
CLASS AB SPKVDD PSRR CLASS D SPKVDD PSRR
WM9001 Class AB SPKVDD PSRR
AVDD=3.3V, SPKVDD=5.0V
40
50
60
70
80
90
100
0 2 4 6 8 101214 161820
Frequency (kHz)
PSRR (dB)
Differential Mode
Single-Emded Mode
WM9001 Class D SPKVDD PSRR
AVDD=3.3V, SPKVDD=5.0V
40
50
60
70
80
90
100
0 2 4 6 8 10121416 1820
Frequency (kHz)
PSRR (dB)
Differential Mode
Single-Emded Mode
CLASS AB AVDD PSRR CLASS D AVDD PSRR
WM9001 Class AB AVDD PSRR
AVDD=3.3V, SPKVDD=5.0V
20
30
40
50
60
70
80
90
02468101214161820
Frequency (kHz)
PSRR (dB)
Differential Mode
Single-Emded Mode
WM9001 Class D AVDD PSRR
AVDD=3.3V, SPKVDD=5.0V
20
30
40
50
60
70
80
90
02468101214161820
Frequency (kHz)
PSRR (dB)
Differential Mode
Single-Emded Mode
Note: The measurement noise floor is at approximately 88dB
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EFFICIENCY
Typical Efficiency versus output power curves are provided below for both class AB and class D
modes.
CLASS AB CLASS D
WM9001 Class AB Efficiency
AVDD=3.3V, SPKVDD=5.0V, BSEL[2:0]=011 (x1.52)
0
10
20
30
40
50
60
70
80
90
100
0 200 400 600 800 1000 1200 1400
Output Powe r (mW )
Efficiency (%)
Differential Mode
Single-Ended Mode
WM9001 Class D Efficiency
AVDD=3.3V, SPKVDD=5.0V, BSEL[2:0]=011 (x1.52)
0
10
20
30
40
50
60
70
80
90
100
0 200 400 600 800 1000 1200 1400
Output Power (mW)
Efficiency (%)
Differential Mode
Single-Ended Mode
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AUDIO SIGNAL PATHS
The WM9001 speaker driver can operate in two modes:
1. INP_SEL=0: Takes a differential audio input and produces a differential class AB or class D
output. The audio signal path is illustrated below.
Figure 4 Differential Mode Audio Signal Paths
2. INP_SEL=1: Takes a single-ended audio input and produces a differential class AB or class D
output. The audio signal path is illustrated below.
Figure 5 Single-Ended Mode Audio Signal Paths
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DEVICE DESCRIPTION
INTRODUCTION
The WM9001 is a powerful mono speaker driver, which can operate in class D or AB mode, providing
total flexibility to the system designer. The WM9001 can deliver 1W in class D mode, Figure 2 , or in
class AB mode, Figure 3, into an 8Ω load. The input can be configured either as a single channel
differential line output offering good noise rejection characteristics, or as a single-ended line output
for systems where there is no differential option.
It can be used as a stand-alone device, or in conjunction with a CODEC such as the WM8991 or
WM8990 to provide a complete stereo solution. The gain settings and speaker driver mode are
configurable via the hardware control pins BSEL[2:0] and CDMODE. For stand-alone operation these
pins are tied to logic 1/0.
The class D amplifier requires a clock signal. An internal oscillator can be used for stand alone
operation by tying the SYNC pin to logic 1/0. Alternatively an external clock can be used by applying
this signal to the SYNC pin. The EN (Enable) pin provides a controllable method for switching
ON/OFF the speaker outputs.
The very small 3 x 3mm QFN packages make the WM9001 ideal for portable systems, such as
mobile phones, portable navigation devices, media players, laptop computers and electronic
dictionaries.
POWER ON RESET
The WM9001 includes an internal Power-On Reset (POR) circuit which is used to reset the device
into a default state at power up. The POR circuit is controlled by the AVDD power supply. Note that
there is no POR on the SPKVDD supply.
When the chip is powered down, the speaker driver outputs, SPKP and SPKN, become tri-state.
ENABLE
The chip is enabled by a logic ‘1’ on the EN pin.
PIN NAME DESCRIPTION
14
EN Device Enable input
0 = Device Disabled
1 = Device Enabled
Table 1 Device Enable Control
The EN pin should be used to disable the device prior to removing the audio or clock (removing an
external clock will not disable the output). When the chip is disabled, the speaker driver outputs
become tri-state.
The EN pin is compatible with low voltage (eg. 1.8v) logic levels from external devices, and can
accept logic 1 digital inputs as low as 1.6V, even though the WM9001 AVDD supply minimum is
2.7V. This provides compatibility with a low voltage DVDD on a controlling device such as the
WM8991 CODEC.
Ultra low quiescent current in the disabled state minimises extends battery life in this condition. The
typical values of SPKVDD current and AVDD current in the disabled (Standby) state are described in
the Electrical Characteristics section.
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INPUT SIGNAL PATH
The line inputs to the WM9001 are identified as LIP and LIN on the pin diagram. These are a fully
balanced differential input pair, with matched impedances on both terminals. The input stage of the
WM9001 is driven by the voltage difference between these two pins. This results in a very low noise
amplifier stage, as any common mode noise (unwanted signals that are present in equal amplitude
on both pins) are cancelled out at the input and are not reproduced at the output.
The LIP input can also be configured as a single-ended line input – see Table 2 below. Single-ended
to differential conversion is carried out internally with the N channel input (normally LIN) connected to
an inverted version of the P channel (LIP). In this configuration the LIN pin should be connected to
analogue ground.
PIN NAME DESCRIPTION
16 INP_SEL
Input Mode Select
0 = Differential Mode (LIP/LIN)
1 = Single-Ended Mode (LIP only)
Table 2 Input Mode Control
WM9001 inputs LIP and LIN are biased to Vmid (equal to AVDD/2) therefore DC-blocking capacitors
are required when connecting non Vmid reference input signals. The Vmid pin must be decoupled
externally – see ‘Applications Information’ for more detail.
SYNC
In Class D operation the WM9001 may be clocked using one of two methods.
• Externally supplied clock to the SYNC pin (800kHz typical).
• Internal oscillator, allowing stand-alone operation of the device.
The Clock source selection is determined automatically by the WM9001 according to the status of
the SYNC pin. If a clock signal is present on the SYNC pin, then this signal is automatically selected
as the WM9001 clock source. If the clock signal is interrupted and this pin is pulled high or low, then
the internal oscillator will be selected. It is not recommended to interrupt or change clock sources
whilst the device is enabled.
PIN NAME DESCRIPTION
5 SYNC
Class D PWM clock input
Constant 0 / 1 – Internal Oscillator enabled
Clock – Clock used to sync PWM class D
Table 3 Sync Clock Control
The SYNC pin is compatible with low voltage (eg. 1.8v) logic levels from external devices, and can
accept logic 1 digital inputs as low as 1.6V, even though the WM9001 AVDD supply minimum is
2.7V. This provides compatibility with a low voltage DVDD on a controlling device such as the
WM8991 CODEC.
Figure 6 System Clock Timing Requirements
Please refer to the Electrical Characteristics for minimum and maximum SYNC frequencies.
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SPEAKER DRIVER MODE SELECT
The speaker outputs operate in a BTL configuration, in either class AB or class D mode. The speaker
driver mode is selected using the CDMODE pin.
PIN NAME DESCRIPTION
7 CDMODE
Class AB/D Mode Select
0 = Class D mode
1 = Class AB mode
Table 4 Class AB / D Mode Control
SIGNAL BOOST CONTROL
Six levels of signal boost are available to provide maximum output power for many commonly used
SPKVDD/AVDD combinations. These boost options are available in class AB and class D modes.
AC and DC gain levels from 1.0x to 1.8x are selected using the BSEL[2:0] input pins. Note that
ACGAIN = DCGAIN for all settings.
An appropriate SPKVDD supply voltage must be provided to prevent waveform clipping when signal
boost is used.
Figure 7 Signal Boost Operation
PIN NAME DESCRIPTION
12,11,10 BSEL[2:0]
Signal Boost Control
000 = 1.00x boost (+0dB)
001 = 1.27x boost (+2.1dB)
010 = 1.40x boost (+2.9dB)
011 = 1.52x boost (+3.6dB)
100 = 1.67x boost (+4.5dB)
101 = 1.8x boost (+5.1dB)
110 = Reserved
111 = Reserved
Table 5 Signal Boost Control
To prevent pop noise, the BSEL[2:0] settings should not be modified while the speaker outputs are
enabled. Note that ACGAIN = DCGAIN for all settings.
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THERMAL SHUTDOWN
To protect the WM9001 from damage due to overheating, a thermal shutdown circuit is included. If
the junction temperature exceeds approximately 150ºC, then the WM9001 will be disabled.
Note that the internal power dissipation of the WM9001 is significantly higher in class AB mode than
in class D mode – see “Power De-Rating” section.
It is not possible to disable the thermal shutdown function.
RF NOISE SUPPRESSION
The WM9001 provides internal RF filtering which minimises the impact of high frequency noise in the
system.
POPS / CLICK SUPPRESSION
The WM9001 incorporates mechanisms that reduce audible pops/clicks at the speaker outputs.
To prevent pop noise, it is recommended that the BSEL, SYNC, CDMODE and INP_SEL settings
should not be modified while the speaker outputs are enabled. Muting the device (setting EN = 0)
during any update to these settings is recommended.
Production Data WM9001
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APPLICATIONS INFORMATION
TYPICAL STAND-ALONE USAGE
The WM9001 may be used as a differential speaker amplifier, as illustrated in Figure 8, or as a
single-ended speaker amplifier in Figure 9.
Figure 8 Operation of WM9001 as Stand-alone Differential Amplifier
Figure 9 Operation of WM9001 as a Stand-alone Single-ended Amplifier
In the both configurations DC blocking capacitors are required on the input paths. A typical
application might use 1uF capacitors for this purpose, providing a high pass cut-off frequency of less
than 20Hz.
In single-ended mode it is recommend that the unused LIN input is connected to analogue ground.
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TYPICAL USAGE WITH WM8991 CODEC
The WM9001 may be used in conjunction with a CODEC such as the WM8991 to provide a complete
stereo solution. Such a solution allows the left and right drivers to be positioned separately as close
to the speakers as possible, minimising EMI emissions from long speaker cables.
In this configuration the EN & SYNC pins may be driven from GPIO outputs from the WM8991, and,
providing that the WM8991 and WM9001 are connected to the same analogue supply (AVDD), then
DC blocking capacitors are not required on the LIP and LIN inputs to WM9001.
CONTROL
INTERFAC E
SDIN
SCLK
ADCDAT
ADCLRC/GPIO1
BCLK
DACDAT
DACLRC
MODE
CSB/ADDR
GPIO5/DACDAT2
GPIO6/ADCLRCB
DIGITAL AUDIO
INTERFAC E
A-law and u-law s upport
TDM Support
DCVDD
DBVDD
DGND
SPKGND
SPKVDD
HPVDD
HPGND
GPIO 2/MC LK2
GPIO 3/BC LK2
GPIO4/DACLRC2
MCLK
PLL SY SCLK
MCLK 2
MCLK
Left ADC Bypass
Left MIC
Left Line Input to Left Output Mixer
Rx Voice -
Left Line Input to Speaker
Right Line Input to Speaker
Rx Voice +
Right Line Input to Right Output Mixer
Right MIC
Right ADC Bypass
INPUT PGAs INPUT MIXERS
DIGITAL CORE
GPIO
Alternative DAC Inter face
Alternative MCLK
Button Control / Accessory Detect
Clock Output
Inverted ADCLRC
MICBIAS
50
k
50k
VREF
AVDD
AGND
VMID
LIN2
LIN1
RIN1
LIN3/GPI7
RIN3 /GPI 8
RIN2
LIN4/RXN
RIN4 /RXP
+
-
+
-
+
-
+
-
+
-
INMIXR
LIN12
LIN34
RIN3 4
RIN12
AINLMUX
AINR MUX
en
+
-
250k
250k
5k5k
MICBIAS Current Dete ct
-73dB to +6dB,
1dB steps
-73dB to +6dB,
1dB steps
+
+
+
+
LIN2
Mixer L
DAC L
DAC R
Mixer R
RIN2
LIN3
L MIC
R MIC
R ADC Bypass
L ADC Bypass
DAC L
DAC R
R ADC Bypass
L ADC Bypass
L MIC
R MIC
RIN3
Mixer R
RXP
RXN
Mix er L
MIC L
MIC R
Mix er L
Mixer R
MIC L
MIC R
Inver ted Out R
Mixer L
Mixer R
Inver ted Out L
OUTPUT MIXERS
LOPGA
ROPGA
HIGH PAS S
FILTER
(Voice or Hi-
Fi)
HIGH PASS
FILTER
(Voice or Hi-
Fi)
+
0dB,
+6dB,
+12dB,
+18dB
0
0
ADC L
ADC R
+
MON
O
MIX
-71.625dB to
+17.625dB,
0.375dB steps
-71.625dB to
+17.625dB,
0.375dB
steps
-71.625dB to 0dB,
0.375dB steps
-71.625dB to 0dB,
0.375dB steps
-36dB to 0dB,
3dB steps
-12dB to 0dB,
3dB steps
-12dB to 0dB,
3dB steps
0dB, +30dB
0dB, +30dB
-12dB to +6dB
-12dB to +6dB
0dB, +30dB
0dB, +30dB
-12dB to +6dB
-12dB to +6dB
-16.5dB to +30dB, 0.75dB steps
-16.5dB to +30dB, 0.75dB steps
-16.5dB to +30dB, 0. 75dB steps
-16.5dB to +30dB, 0.75dB steps
DIFFINL
DIFF INR
OUT3 MIX
OUT4MIX
ROPMIX
RONMIX
LONMIX
LOPMIX
DAC L
DAC R
+
INMIXL
+
+
POR
AVDD
DCVDD
POR
-12dB to +6dB
-
+
RXVOICE
-
+
-12dB to +6dB
-12dB to +6dB
-12dB to +6dB RXVOICE
RIN3
LIN3
LOMIX
+
ROMI X
+
Record R
Record L
LADC
bypass
RADC
bypass
+
Mixer L
+
Mixer R
SPKMIX
+
0dB,
-6dB,
-12dB
LOUT
OUT3
OUT4
LON
LOP
ROP
RON
HP
-73dB to +6dB, 1dB steps
HP ROUT
-73dB to +6dB, 1dB steps
HP
HP
Line
Line
Line
Line
0dB,
-6dB
0dB, -6dB
0dB, -6dB
0dB, -6dB
-
1
-
1
SPKP
SPKN
SP
K
1x,
1.27x
,
1.4x,
1.52x
,
1.67x
1.8x
1xVMID,
1.27xVMID,
1.4xVMID,
1.52xVMID,
1.67xVMID
1.8xVMID
SPKPGA
-73dB to +6dB,
1dB steps
DIFFERENTIAL RIGHT CHANNEL SPEAKER OUTPUT
LEFT CHANNEL
SPEAKER OUTPUT
ACGAIN & DCGAIN
SET BY
REGISTERS
ACGAIN & DCGAIN
SET BY H/W
EN
SYNC
CDMODE
SET BY H/W
LIN
LIP
AVDD
+
CLASS AB/D
SPEAKER DRIVER
-SPKN
SPKP
AGND SPKVDD SPKGND
POP/ CLICK
SUPPR ESS ION
OSCILLATOR
THERMAL
SHUTDOWN
VMID
CDMODE SYNCBSEL[ 2:0]
D / AB Selec t
CLOCK
DETECT
DEVICE
ENABLE
AGN
D
AVDD
ACGAIN
ACGAIN
DCGAIN
RF NOISE
SUPPR ESSI ON
EN
OUTPUT POWER
BOOST SEL ECT
EN
INP_SEL
Figure 10 Operation of WM9001 in Conjunction with WM8991
The EN and SYNC pins are compatible with low voltage (eg. 1.8v) logic levels from external devices,
and can accept logic 1 digital inputs as low as 1.6V, even though the WM9001 AVDD supply
minimum is 2.7V. This provides compatibility with a low voltage DVDD on a controlling device such
as the WM8991 CODEC.
Production Data WM9001
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21
SPEAKER SELECTION
In Class D driver mode, the WM9001 output contains high frequency signals resulting from the
switched PWM operation. To avoid the need for specific filter components, it is important to make an
appropriate choice of loudspeaker. Note that, for Class AB mode usage, the choice of speaker is not
so important as there are no high frequency harmonics in the WM9001 output.
The speaker inductance and load resistance create a low-pass filter which, ideally, will attenuate the
high frequency Class D switching harmonics whilst passing the desired audio frequencies. The 3dB
cut-off frequency of the speaker inductance and resistance may be calculated as follows:
fc = RL / 2πL
Therefore, for an 8Ω speaker and a desired 3dB cut-off frequency of 20kHz, the speaker should be
chosen to have an inductance of:
L = RL / 2πfc = 8Ω / 2π * 20kHz = 64μH
8Ω speakers for portable applications typically have an inductance in the range 20μH to 100μH. If the
inductance is higher than value calculated above, then the cut-off frequency will be reduced, limiting
the audio bandwidth. Lower values of inductance will result in a higher cut-off frequency. The Class D
outputs contain harmonics at much higher frequencies than is recommended for most speakers, and
the cut-off frequency of the filter must therefore be low enough to protect the speaker.
Figure 11 Speaker Equivalent Circuit
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PCB LAYOUT CONSIDERATIONS
The efficiency of the speaker drivers is affected by the series resistance between the WM9001 and
the speaker (e.g. inductor ESR) as shown in Figure 12. This resistance should be as low as possible
to ٛaximizi efficiency.
Figure 12 Speaker Connection Losses
The distance between the WM9001 and the speakers should be kept to a minimum to reduce series
resistance, and also to reduce EMI. Further reductions in EMI can be achieved by additional passive
filtering and/or shielding as shown in Figure 13. When additional passive filtering is used, low ESR
components should be chosen to ٛaximizi series resistance between the WM9001 and the speaker,
ٛaximizing efficiency.
LC passive filtering will usually be effective at reducing EMI at frequencies up to around 30MHz. To
reduce emissions at higher frequencies, ferrite beads placed as close to the device as possible will
be more effective.
WM9001
SPKP
SPKN EMI WM9001
SPKP
SPKN
Short connection reduces EMI
WM9001
SPKP
SPKN
LC Filtering
reduces EMI
LOW ESR
LOW ESR
WM9001
SPKP
SPKN
Shielding using PCB ground
plane (or Vdd) reduces EMI
WM9001
SPKP
SPKN
Ferrite beads reduce EMI
LC filtering is more effective at removing EMI at
frequencies below ~30MHz
Ferrite beads are more effective at removing
EMI at frequencies above ~30MHz
Long, exposed tracks emit more EMI
Figure 13 EMI Reduction Techniques
Production Data WM9001
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23
RECOMMENDED EXTERNAL COMPONENTS
WM9001 Production Data
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PD, March 2010, Rev 4.1
24
PACKAGE DIMENSIONS
DM053.C
FL: 16 PIN QFN PLASTIC PACKAGE 3 X 3 X 0.75 mm BODY, 0.50 mm LEAD PITCH
INDEX AREA
(D/2 X E/2)
TOP VIEW
D
E
4
NOTES:
1. DIMENSION b APPLIES TO METALLIZED TERMINAL AND IS MEASURED BETWEEN 0.15 mm AND 0.30 mm FROM TERMINAL TIP.
2. FALLS WITHIN JEDEC, MO-220, VARIATION VGGD-2.
3. ALL DIMENSIONS ARE IN MILLIMETRES.
4. THE TERMINAL #1 IDENTIFIER AND TERMINAL NUMBERING CONVENTION SHALL CONFORM TO JEDEC 95-1 SPP-002.
5. COPLANARITY APPLIES TO THE EXPOSED HEAT SINK SLUG AS WELL AS THE TERMINALS.
6. REFER TO APPLICATIONS NOTE WAN_0118 FOR FURTHER INFORMATION REGARDING PCB FOOTPRINTS AND QFN PACKAGE SOLDERING.
7. THIS DRAWING IS SUBJECT TO CHANGE WITHOUT NOTICE.
A3
b
Exposed lead
Dimensions (mm)
Symbols
MIN NOM MAX NOTE
A
A1
A3
0.70 0.75 0.80
0.05
0.02
0
0.20 REF
b
D
D2
E
E2
e
L
0.300.20
3.00 BSC
1.751.701.65
0.50 BSC
0.325 0.375 0.425
2
2
3.00 BSC
1.751.701.65
0.10
aaa
bbb
ccc
REF:
0.15
0.10
JEDEC, MO-220, VARIATION VGGD-2.
Tolerances of Form and Position
0.25
DETAIL 1
DETAIL 2
A
4
1
9
12
16
13
8
e
D2
b
51
BCbbb MA
BOTTOM VIEW
Caaa
2 X
Caaa
2 X
1
C
A3
SEATING PLANE DETAIL 2
A1
C0.08
Cccc
A
5
SIDE VIEW
L
EXPOSED
GROUND
PADDLE
6
DETAIL 1
0.32mm
45
degrees
EXPOSED
GROUND
PADDLE
e
Datum
DETAIL 2
Terminal
Tip
e/2
1
R
E2
SEE DETAIL 2
Production Data WM9001
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25
IMPORTANT NOTICE
Wolfson Microelectronics plc (“Wolfson”) products and services are sold subject to Wolfson’s terms and conditions of sale,
delivery and payment supplied at the time of order acknowledgement.
Wolfson warrants performance of its products to the specifications in effect at the date of shipment. Wolfson reserves the
right to make changes to its products and specifications or to discontinue any product or service without notice. Customers
should therefore obtain the latest version of relevant information from Wolfson to verify that the information is current.
Testing and other quality control techniques are utilised to the extent Wolfson deems necessary to support its warranty.
Specific testing of all parameters of each device is not necessarily performed unless required by law or regulation.
In order to minimise risks associated with customer applications, the customer must use adequate design and operating
safeguards to minimise inherent or procedural hazards. Wolfson is not liable for applications assistance or customer
product design. The customer is solely responsible for its selection and use of Wolfson products. Wolfson is not liable for
such selection or use nor for use of any circuitry other than circuitry entirely embodied in a Wolfson product.
Wolfson’s products are not intended for use in life support systems, appliances, nuclear systems or systems where
malfunction can reasonably be expected to result in personal injury, death or severe property or environmental damage. Any
use of products by the customer for such purposes is at the customer’s own risk.
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intellectual property right of Wolfson covering or relating to any combination, machine, or process in which its products or
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Reproduction of information from Wolfson datasheets is permissible only if reproduction is without alteration and is
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ADDRESS
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