SCDS007U − NOVEMBER 1992 − REVISED JUNE 2005
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
DMembers of the Texas Instruments
Widebus Family
D5-Ω Switch Connection Between Two Ports
DTTL-Compatible Input Levels
DLatch-Up Performance Exceeds 250 mA Per
JESD 17
DESD Protection Exceeds JESD 22
− 200-V Machine Model (A115-A)
description/ordering information
The ’CBT16212A devices provide 24 bits of
high-speed TTL-compatible bus switching or
exchanging. The low on-state resistance of the
switch allows connections to be made with
minimal propagation delay.
Each device operates as a 24-bit bus switch or a
12-bit bus exchanger that provides data
exchanging between the four signal ports via the
data-select (S0, S1, S2) terminals.
ORDERING INFORMATION
TAPACKAGE†ORDERABLE
PART NUMBER TOP-SIDE
MARKING
SSOP − DL
Tube SN74CBT16212ADL
CBT16212A
SSOP − DL Tape and reel SN74CBT16212ADLR CBT16212A
−40°C to 85°C
TSSOP − DGG Tape and reel SN74CBT16212ADGGR CBT16212A
−40°C to 85°CTVSOP − DGV Tape and reel SN74CBT16212ADGVR CY212A
VFBGA − GQL
Tape and reel
SN74CBT16212AGQLR
CY212A
VFBGA − ZQL (Pb-free) Tape and reel SN74CBT16212AZQLR CY212A
−55°C to 125°CCFP − WD Tube SNJ54CBT16212AWD SNJ54CBT16212AWD
†Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at
www.ti.com/sc/package.
!"# $ %&'# "$ (&)*%"# +"#',
+&%#$ %! # $('%%"#$ (' #-' #'!$ '."$ $#&!'#$
$#"+"+ /""#0, +&%# (%'$$1 +'$ # '%'$$"*0 %*&+'
#'$#1 "** (""!'#'$,
Copyright 2005, Texas Instruments Incorporated
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
S0
1A1
1A2
2A1
2A2
3A1
3A2
GND
4A1
4A2
5A1
5A2
6A1
6A2
7A1
7A2
VCC
8A1
GND
8A2
9A1
9A2
10A1
10A2
11A1
11A2
12A1
12A2
S1
S2
1B1
1B2
2B1
2B2
3B1
GND
3B2
4B1
4B2
5B1
5B2
6B1
6B2
7B1
7B2
8B1
GND
8B2
9B1
9B2
10B1
10B2
11B1
11B2
12B1
12B2
SN54CBT16212A ...WD PACKAGE
SN74CBT16212A . . . DGG, DGV, OR DL PACKAGE
(TOP VIEW)
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
(+&%#$ %!(*"# # 23454 "** (""!'#'$ "' #'$#'+
&*'$$ #-'/$' #'+, "** #-' (+&%#$ (+&%#
(%'$$1 +'$ # '%'$$"*0 %*&+' #'$#1 "** (""!'#'$,
Widebus is a trademark of Texas Instruments.
SCDS007U − NOVEMBER 1992 − REVISED JUNE 2005
2POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
terminal assignments
123456
A1A2 1A1 S0 S1 S2 1B1
B3A1 2A2 2A1 1B2 2B1 2B2
C4A1 GND 3A2 3B1 GND 3B2
D5A2 4A2 5A1 4B2 4B1 5B1
E6A2 6A1 5B2 6B1
F7A1 7A2 7B1 6B2
GVCC GND 8A1 8B1 GND 7B2
H8A2 9A1 9A2 9B2 9B1 8B2
J10A1 10A2 11A1 11B1 10B2 10B1
K11A2 12A1 12A2 12B2 12B1 11B2
FUNCTION TABLE
INPUTS INPUTS/OUTPUTS
FUNCTION
S2 S1 S0 A1 A2
FUNCTION
L L L Z Z Disconnect
LL H B1 port Z A1 port = B1 port
LH L B2 port Z A1 port = B2 port
LHH Z B1 port A2 port = B1 port
HLL ZB2 port A2 port = B2 port
HLH Z Z Disconnect
H H L B1 port B2 port A1 port = B1 port
A2 port = B2 port
H H H B2 port B1 port A1 port = B2 port
A2 port = B1 port
GQL OR ZQL PACKAGE
(TOP VIEW)
A
B
C
D
E
F
G
H
J
K
123456
SCDS007U − NOVEMBER 1992 − REVISED JUNE 2005
3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
logic diagram (positive logic)
12B2
12B1
1B2
1B1
12A2
12A1
1A2
1A1
S0
S1
S2
2
3
27
28
1
56
55
54
53
30
29
Pin numbers shown are for the DGG, DGV, DL, and WD packages.
SCDS007U − NOVEMBER 1992 − REVISED JUNE 2005
4POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)†
Supply voltage range, VCC −0.5 V to 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input voltage range, VI (see Note 1) −0.5 V to 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Continuous channel current 128 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input clamp current, IIK (VI < 0) −50 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Package thermal impedance, θJA (see Note 2): DGG package 64°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
DGV package 48°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
DL package 56°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
GQL/ZQL package 42°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . .
Storage temperature range, Tstg −65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
†Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed.
2. The package thermal impedance is calculated in accordance with JESD 51-7.
recommended operating conditions (see Note 3)
SN54CBT16212A SN74CBT16212A
UNIT
MIN MAX MIN MAX
UNIT
VCC Supply voltage 4 5.5 4 5.5 V
VIH High-level control input voltage 2 2 V
VIL Low-level control input voltage 0.8 0.8 V
TAOperating free-air temperature −55 125 −40 85 °C
NOTE 3: All unused control inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
PARAMETER
TEST CONDITIONS
SN54CBT16212A SN74CBT16212A
UNIT
PARAMETER
TEST CONDITIONS
MIN TYP‡MAX MIN TYP‡MAX
UNIT
VIK VCC = 4.5 V, II = −18 mA −1.2 −1.2 V
II
VCC = 0, VI = 5.5 V 10 10
A
IIVCC = 5.5 V, VI = 5.5 V or GND ±1±1µA
ICC VCC = 5.5 V, IO = 0, VI = VCC or GND 3.2 3 µA
∆ICC§Control inputs VCC = 5.5 V, One input at 3.4 V,
Other inputs at VCC or GND 2.5 2.5 mA
CiControl inputs VI = 3 V or 0 2.5 2.5 pF
Cio(off) VO = 3 V or 0, S0, S1, and S2 = GND 7.5 7.5 pF
VCC = 4 V,
TYP at VCC = 4 V VI = 2.4 V, II = 15 mA 14 20 14 20
ron
¶
VI = 0
II = 64 mA 4 10 4 7 Ω
ron¶
V
CC
= 4.5 V VI = 0 II = 30 mA 4 10 4 7
Ω
VCC = 4.5 V
VI = 2.4 V, II = 15 mA 6 14 6 12
‡All typical values are at VCC = 5 V (unless otherwise noted), TA = 25°C.
§This is the increase in supply current for each input that is at the specified TTL voltage level, rather than VCC or GND.
¶Measured by the voltage drop between the A and B terminals at the indicated current through the switch. On-state resistance is determined by
the lower of the voltages of the two (A or B) terminals.
SCDS007U − NOVEMBER 1992 − REVISED JUNE 2005
5
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
switching characteristics over recommended operating free-air temperature range, CL = 50 pF
(unless otherwise noted) (see Figure 1)
SN54CBT16212A SN74CBT16212A
PARAMETER FROM
(INPUT) TO
(OUTPUT) VCC = 4 V VCC = 5 V
± 0.5 V VCC = 4 V VCC = 5 V
± 0.5 V UNIT
(INPUT)
(OUTPUT)
MIN MAX MIN MAX MIN MAX MIN MAX
tpd†A or B B or A 0.8* 0.35 0.25 ns
tpd SA or B 14 1.5 13 10 1.5 9.1 ns
ten SA or B 15 1.5 13.7 10.4 1.5 9.7 ns
tdis SA or B 14.2 1.5 13.5 9.2 1.5 8.8 ns
* On products compliant to MIL-PRF-38535, this parameter is not production tested.
†The propagation delay is the calculated RC time constant of the typical on-state resistance of the switch and the specified load capacitance, when
driven by an ideal voltage source (zero output impedance).
PARAMETER MEASUREMENT INFORMATION
VOH
VOL
From Output
Under Test
CL = 50 pF
(see Note A)
LOAD CIRCUIT
S1
7 V
Open
GND
500 Ω
500 Ω
tPLH tPHL
Output
Control
Output
Waveform 1
S1 at 7 V
(see Note B)
Output
Waveform 2
S1 at Open
(see Note B)
tPZL
tPZH
tPLZ
tPHZ
3 V
0 V
VOH
VOL
0 V
VOL + 0.3 V
VOH − 0.3 V
0 V
Input
3 V
3.5 V
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
Output
tpd
tPLZ/tPZL
tPHZ/tPZH
Open
7 V
Open
TEST S1
NOTES: A. CL includes probe and jig capacitance.
B. W aveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR ≤10 MHz, ZO = 50 Ω, tr ≤2.5 ns, tf ≤2.5 ns
.
D. The outputs are measured one at a time, with one transition per measurement.
E. tPLZ and tPHZ are the same as tdis.
F. tPZL and tPZH are the same as ten.
G. tPLH and tPHL are the same as tpd.
H. All parameters and waveforms are not applicable to all devices.
1.5 V 1.5 V
1.5 V 1.5 V
1.5 V 1.5 V
1.5 V
1.5 V
Figure 1. Load Circuit and Voltage Waveforms
PACKAGE OPTION ADDENDUM
www.ti.com 25-Sep-2013
Addendum-Page 1
PACKAGING INFORMATION
Orderable Device Status
(1)
Package Type Package
Drawing Pins Package
Qty Eco Plan
(2)
Lead/Ball Finish MSL Peak Temp
(3)
Op Temp (°C) Device Marking
(4/5)
Samples
5962-9852101QXA ACTIVE CFP WD 56 1 TBD A42 N / A for Pkg Type -55 to 125 5962-9852101QX
A
SNJ54CBT16212A
WD
74CBT16212ADGGRE4 ACTIVE TSSOP DGG 56 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 CBT16212A
74CBT16212ADGGRG4 ACTIVE TSSOP DGG 56 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 CBT16212A
74CBT16212ADGVRE4 ACTIVE TVSOP DGV 56 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 CY212A
74CBT16212ADGVRG4 ACTIVE TVSOP DGV 56 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 CY212A
SN74CBT16212ADGGR ACTIVE TSSOP DGG 56 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 CBT16212A
SN74CBT16212ADGVR ACTIVE TVSOP DGV 56 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 CY212A
SN74CBT16212ADL ACTIVE SSOP DL 56 20 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 CBT16212A
SN74CBT16212ADLG4 ACTIVE SSOP DL 56 20 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 CBT16212A
SN74CBT16212ADLR ACTIVE SSOP DL 56 1000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 CBT16212A
SN74CBT16212ADLRG4 ACTIVE SSOP DL 56 1000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 CBT16212A
SN74CBT16212AZQLR ACTIVE BGA
MICROSTAR
JUNIOR
ZQL 56 1000 Green (RoHS
& no Sb/Br) SNAGCU Level-1-260C-UNLIM -40 to 85 CY212A
SNJ54CBT16212AWD ACTIVE CFP WD 56 1 TBD A42 N / A for Pkg Type -55 to 125 5962-9852101QX
A
SNJ54CBT16212A
WD
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PACKAGE OPTION ADDENDUM
www.ti.com 25-Sep-2013
Addendum-Page 2
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
OTHER QUALIFIED VERSIONS OF SN54CBT16212A, SN74CBT16212A :
•Catalog: SN74CBT16212A
•Military: SN54CBT16212A
NOTE: Qualified Version Definitions:
•Catalog - TI's standard catalog product
•Military - QML certified for Military and Defense Applications
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device Package
Type Package
Drawing Pins SPQ Reel
Diameter
(mm)
Reel
Width
W1 (mm)
A0
(mm) B0
(mm) K0
(mm) P1
(mm) W
(mm) Pin1
Quadrant
SN74CBT16212ADGGR TSSOP DGG 56 2000 330.0 24.4 8.6 15.6 1.8 12.0 24.0 Q1
SN74CBT16212ADGVR TVSOP DGV 56 2000 330.0 24.4 6.8 11.7 1.6 12.0 24.0 Q1
SN74CBT16212ADLR SSOP DL 56 1000 330.0 32.4 11.35 18.67 3.1 16.0 32.0 Q1
SN74CBT16212AZQLR BGA MI
CROSTA
R JUNI
OR
ZQL 56 1000 330.0 16.4 4.8 7.3 1.5 8.0 16.0 Q1
PACKAGE MATERIALS INFORMATION
www.ti.com 26-Jan-2013
Pack Materials-Page 1
*All dimensions are nominal
Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
SN74CBT16212ADGGR TSSOP DGG 56 2000 367.0 367.0 45.0
SN74CBT16212ADGVR TVSOP DGV 56 2000 367.0 367.0 45.0
SN74CBT16212ADLR SSOP DL 56 1000 367.0 367.0 55.0
SN74CBT16212AZQLR BGA MICROSTAR
JUNIOR ZQL 56 1000 336.6 336.6 28.6
PACKAGE MATERIALS INFORMATION
www.ti.com 26-Jan-2013
Pack Materials-Page 2
MECHANICAL DATA
MCFP010B – JANUARY 1995 – REVISED NOVEMBER 1997
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
WD (R-GDFP-F**) CERAMIC DUAL FLATPACK
4040176/D 10/97
48 LEADS SHOWN
48
48
25
56
0.610
(18,80)
0.710
(18,03)
0.7400.640
0.390 (9,91)
0.370 (9,40)
0.870 (22,10)
1.130 (28,70)
1
A
0.120 (3,05)
0.075 (1,91)
LEADS**
24
NO. OF
A MIN
A MAX (16,26)
(15,49)
0.025 (0,635)
0.009 (0,23)
0.004 (0,10)
0.370 (9,40)
0.250 (6,35)
0.370 (9,40)
0.250 (6,35)
0.014 (0,36)
0.008 (0,20)
NOTES: A. All linear dimensions are in inches (millimeters).
B. This drawing is subject to change without notice.
C. This package can be hermetically sealed with a ceramic lid using glass frit.
D. Index point is provided on cap for terminal identification only
E. Falls within MIL STD 1835: GDFP1-F48 and JEDEC MO-146AA
GDFP1-F56 and JEDEC MO-146AB
MECHANICAL DATA
MPDS006C – FEBRUAR Y 1996 – REVISED AUGUST 2000
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
DGV (R-PDSO-G**) PLASTIC SMALL-OUTLINE
24 PINS SHOWN
14
3,70
3,50 4,90
5,10
20
DIM
PINS **
4073251/E 08/00
1,20 MAX
Seating Plane
0,05
0,15
0,25
0,50
0,75
0,23
0,13
112
24 13
4,30
4,50
0,16 NOM
Gage Plane
A
7,90
7,70
382416
4,90
5,103,70
3,50
A MAX
A MIN
6,60
6,20
11,20
11,40
56
9,60
9,80
48
0,08
M
0,07
0,40
0°–8°
NOTES: A. All linear dimensions are in millimeters.
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusion, not to exceed 0,15 per side.
D. Falls within JEDEC: 24/48 Pins – MO-153
14/16/20/56 Pins – MO-194
MECHANICAL DATA
MTSS003D – JANUARY 1995 – REVISED JANUAR Y 1998
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
DGG (R-PDSO-G**) PLASTIC SMALL-OUTLINE PACKAGE
4040078/F 12/97
48 PINS SHOWN
0,25
0,15 NOM
Gage Plane
6,00
6,20 8,30
7,90
0,75
0,50
Seating Plane
25
0,27
0,17
24
A
48
1
1,20 MAX
M
0,08
0,10
0,50
0°–8°
56
14,10
13,90
48
DIM
A MAX
A MIN
PINS **
12,40
12,60
64
17,10
16,90
0,15
0,05
NOTES: A. All linear dimensions are in millimeters.
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold protrusion not to exceed 0,15.
D. Falls within JEDEC MO-153
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