TQP3M9009 High Linearity LNA Gain Block Applications Repeaters Mobile Infrastructure LTE / WCDMA / EDGE / CDMA General Purpose Wireless 3-pin SOT-89 Package Product Features Functional Block Diagram 50-4000 MHz 21.8 dB Gain @ 1.9 GHz +39.5 dBm Output IP3 1.3 dB Noise Figure @ 1.9 GHz 50 Ohm Cascadable Gain Block Unconditionally stable High input power capability +5V Single Supply, 125 mA Current SOT-89 Package GND 4 1 2 3 RF IN GND RF OUT General Description Pin Configuration The TQP3M9009 is a cascadable, high linearity gain block amplifier in a low-cost surface-mount package. At 1.9 GHz, the amplifier is targeted to provide 21.8 dB gain, +39.5 dBm OIP3, and 1.3 dB Noise Figure while only drawing 125 mA current. The device is housed in a leadfree/green/RoHS-compliant industry-standard SOT-89 package using a NiPdAu plating to eliminate the possibility of tin whiskering. Pin # Symbol 1 3 2, 4 RF Input RF Output / Vcc Ground The TQP3M9009 has the benefit of having high gain across a broad range of frequencies while also providing very low noise. This allows the device to be used in both receiver and transmitter chains for high performance systems. The amplifier is internally matched using a high performance E-pHEMT process and only requires an external RF choke and blocking/bypass capacitors for operation from a single +5V supply. The internal active bias circuit also enables stable operation over bias and temperature variations. The TQP3M9009 covers the 0.05-4 GHz frequency band and is targeted for wireless infrastructure or other applications requiring high linearity and/or low noise figure. Ordering Information Part No. Description TQP3M9009 TQP3M9009-PCB_IF TQP3M9009-PCB_RF High Linearity LNA Gain Block TQP3M9009 EVB 0.05-0.5 GHz TQP3M9009 EVB 0.5-4 GHz Standard T/R size = 1000 pieces on a 7" reel. Advanced Data Sheet: Rev B 03/29/10 (c) 2009 TriQuint Semiconductor, Inc. - 1 of 10 - Disclaimer: Subject to change without noticee Connecting the Digital World to the Global Network(R) TQP3M9009 High Linearity LNA Gain Block Specifications Absolute Maximum Ratings Parameter Storage Temperature RF Input Power,CW,50 , T = 25C Device Voltage,Vdd Reverse Device Voltage Thermal Resistance (junction to case) Junction Temperature, TJ For 106 hours MTTF Recommended Operating Conditions Rating -65 to +150 oC +23 dBm +7 V -0.3 V 34 oC/W 190 oC Parameter Min Typ Vdd T(case) +4.75 -40 +5 Max Units +5.25 85 V o C Electrical specifications are measured at specified test conditions. Specifications are not guaranteed over all recommended operating conditions. Operation of this device outside the parameter ranges given above may cause permanent damage. Electrical Specifications Test conditions unless otherwise noted: +25C, +5V Vsupply, 50 system. Parameter Operational Frequency Range Test Frequency Gain Input Return Loss Output Return Loss Output P1dB Output IP3 Noise Figure Vdd Current, Idd Conditions Min 50 Typical 1900 21.8 13 14 +22 +39.5 1.3 +5 125 See Note 1. Max 4000 Units MHz MHz dB dB dB dBm dBm dB V mA Notes 1. OIP3 measured with two tones at an output power of +3 dBm / tone separated by 1 MHz. The suppression on the largest IM3 product is used to calculate the OIP3 using 2:1 rule. Advanced Data Sheet: Rev B 03/29/10 (c) 2009 TriQuint Semiconductor, Inc. - 2 of 10 - Disclaimer: Subject to change without noticee Connecting the Digital World to the Global Network(R) TQP3M9009 High Linearity LNA Gain Block Application Circuit Configuration +5Vdd Notes: 1. See PC Board Layout, page 8 for more information. 2. Components shown on the silkscreen but not on the schematic are not used. 3. B1 (0 jumper) may be replaced with copper trace in the target application layout. 4. The recommended component values are dependent upon the frequency of operation. 5. All components are of 0603 size unless stated on the schematic. Bill of Material Reference Designation Frequency (MHz) TQP3M9009-PCB_IF TQP3M9009-PCB_RF 50 - 500 500 - 4000 Q1 C2, C6 C1 L2 L1, D1, C3, C4 B1 TQP3M9009 1000 pF 0.01 uF 330 nH 100 pF 0.01 uF 68 nH Do Not Place 0 Notes: 1. Performances can be optimized at frequency of interest by using recommended component values shown in the table below. Reference Designation 500 2000 C2, C6 L2 100 pF 82 nH 22 pF 22 nH Advanced Data Sheet: Rev B 03/29/10 (c) 2009 TriQuint Semiconductor, Inc. Frequency (MHz) 2500 - 3 of 10 - 22 pF 18 nH 3500 22 pF 15 nH Disclaimer: Subject to change without noticee Connecting the Digital World to the Global Network(R) TQP3M9009 High Linearity LNA Gain Block Typical Performance 500-4000 MHz Test conditions unless otherwise noted: +25C, +5V, 125 mA, 50 system. The data shown below is measured on TQP3M9009-PCB_RF. Frequency MHz 500 900 1900 2700 3500 4000 Gain Input Return Loss Output Return Loss Output P1dB OIP3 [1] Noise Figure [2] dB dB dB dBm dBm dB 25.5 11.5 10.8 +22.5 +41.4 0.9 24.7 12 13 +21.8 +40.5 0.9 21.8 13 14 +22 +39.5 1.3 20 13 10 +21.6 +39 1.7 18.9 8 10 +21.8 +37.9 2.1 17.9 6 11.3 +20.7 +35.8 2.4 Notes: 1. OIP3 measured with two tones at an output power of +3 dBm / tone separated by 1 MHz. The suppression on the largest IM3 product is used to calculate the OIP3 using 2:1 rule. 2. Noise figure data shown in the table above is measured on evaluation board which includes board losses of around 0.1 dB @ 2 GHz. RF Performance Plots S11 vs. Frequency over Temp Gain vs. Frequency over Temp 0 28 -40 C -20 C +25 C +85 C -5 S11 (dB) Gain (dB) 24 +85 C +25 C -20 C -40 C -10 20 -15 -20 16 500 1000 1500 2000 2500 3000 3500 500 4000 1000 1500 S22 vs. Frequency over Temp 2500 3000 3500 4000 Noise Figure vs. Frequency over Temp 0 4 -40 C -20 C +25 C +85 C +85 C 3 NF (dB) -5 S22 (dB) 2000 Frequency (MHz) Frequency (MHz) -10 -15 +25 C -40 C 2 1 -20 0 500 1000 1500 2000 2500 3000 3500 4000 Frequency (MHz) Advanced Data Sheet: Rev B 03/29/10 (c) 2009 TriQuint Semiconductor, Inc. 500 1000 1500 2000 2500 3000 3500 4000 Frequency (MHz) - 4 of 10 - Disclaimer: Subject to change without noticee Connecting the Digital World to the Global Network(R) TQP3M9009 High Linearity LNA Gain Block RF Performance Plots OIP3 vs. Pout / tone over Temp OIP3 vs. Frequency over Temp 1 MHz Spacing, 3 dBm/tone 45 45 40 40 OIP3 (dBm) OIP3 (dBm) Freq = 1900 MHz, 1 MHz Spacing 35 +25 C +85 C -40 C 30 35 +25 C +85 C -40 C 30 25 25 0 2 4 6 8 Pout / tone (dBm) 10 12 500 1000 1500 OIP3 vs. Vdd 45 2000 2500 3000 Pout / tone (dBm) 3500 4000 P1dB vs. Frequency over Temp F=1900 MHz, 1 MHz Spacing, T=+25C, 3dBm / tone 24 22 P1dB (dB) OIP3 (dBm) 40 35 30 25 3.25 20 18 -40 C +25 C +85 C 16 14 3.5 3.75 4 4.25 4.5 Vdd (V) 4.75 5 500 5.25 1000 1500 Idd vs. Vdd 3500 4000 CW Signal 125 Idd (mA) Idd (mA) 3000 130 125 120 115 110 105 3.25 2500 Idd vs. Temperature T=25C, CW Signal 130 2000 Frequency (MHz) 120 115 110 105 3.5 3.75 4 4.25 Vdd (V) Advanced Data Sheet: Rev B 03/29/10 (c) 2009 TriQuint Semiconductor, Inc. 4.5 4.75 5 5.25 - 5 of 10 - -40 -15 10 35 Temperature (C) 60 85 Disclaimer: Subject to change without noticee Connecting the Digital World to the Global Network(R) TQP3M9009 High Linearity LNA Gain Block Typical Performance 50-500 MHz Test conditions unless otherwise noted: +25C, +5V, 125 mA, 50 system. The data shown below is measured on TQP3M9009-PCB_IF. Frequency MHz 70 100 200 500 Gain Input Return Loss Output Return Loss Output P1dB OIP3 [1] Noise Figure [2] dB dB dB dBm dBm dB 27 12 11 +21.6 +37.6 1.4 26.8 13 12 +21.9 +38.8 1.3 26.4 13 12 +21.9 +39 0.9 25.8 13 13 +22.2 +41.4 0.9 Notes: 1. OIP3 measured with two tones at an output power of +3 dBm / tone separated by 1 MHz. The suppression on the largest IM3 product is used to calculate the OIP3 using 2:1 rule. 2. Noise figure data shown in the table above is measured on evaluation board which includes board losses of around 0.1 dB @ 2 GHz. IF Performance Plots Gain vs. Frequency over Temp S11 vs. Frequency over Temp 28 0 -40 C -20 C +25 C +85 C -5 S11 (dB) Gain (dB) 24 -40 C -20 C +25 C +85 C 20 -10 -15 16 -20 0 100 200 300 400 500 0 100 Frequency (MHz) 300 400 500 Frequency (MHz) S22 vs. Frequency over Temp Noise Figure vs. Frequency over Temp 0 4 -40 C +20 C +25 C +85 C 3 +85 C NF (dB) -5 S22 (dB) 200 -10 -15 +25 C 2 -40 C 1 -20 0 0 100 200 300 400 500 Frequency (MHz) Advanced Data Sheet: Rev B 03/29/10 (c) 2009 TriQuint Semiconductor, Inc. 0 100 200 300 400 500 Frequency (MHz) - 6 of 10 - Disclaimer: Subject to change without noticee Connecting the Digital World to the Global Network(R) TQP3M9009 High Linearity LNA Gain Block IF Performance Plots OIP3 vs. Frequency over Temp P1dB vs. Frequency over Temp 1 MHz Spacing, 3 dBm/tone 24 45 22 35 P1dB (dB) OIP3 (dBm) 40 -40 C +25 C +85 C 30 20 -40 C +25 C +85 C 18 16 14 25 0 100 200 300 Pout / tone (dBm) Advanced Data Sheet: Rev B 03/29/10 (c) 2009 TriQuint Semiconductor, Inc. 400 500 0 100 200 300 400 500 Frequency (MHz) - 7 of 10 - Disclaimer: Subject to change without noticee Connecting the Digital World to the Global Network(R) TQP3M9009 High Linearity LNA Gain Block Pin Configuration and Description GND 4 1 2 3 RF IN GND RF OUT Pin Symbol Description 1 2, 4 3 RF IN GND RFout / Vdd Input, matched to 50 ohms, External DC block is required. Needed for RF and the thermal path Output, matched to 50 ohms, External DC Block is required and supply voltage Applications Information PC Board Layout Top RF layer is .014" NELCO N4000-13, r = 3.9, 4 total layers (0.062" thick) for mechanical rigidity. Metal layers are 1-oz copper. 50 ohm Microstrip line details: width = .029", spacing = .035". The pad pattern shown has been developed and tested for optimized assembly at TriQuint Semiconductor. The PCB land pattern has been developed to accommodate lead and package tolerances. Since surface mount processes vary from supplier to supplier, careful process development is recommended. Advanced Data Sheet: Rev B 03/29/10 (c) 2009 TriQuint Semiconductor, Inc. - 8 of 10 - Disclaimer: Subject to change without noticee Connecting the Digital World to the Global Network(R) TQP3M9009 High Linearity LNA Gain Block Mechanical Information Package Information and Dimensions This package is lead-free/RoHScompliant. The plating material on the leads is NiPdAu. It is compatible with both lead-free (maximum 260 C reflow temperature) and lead (maximum 245 C reflow temperature) soldering processes. 3M9009 YXXX The component will be marked with a "3M9009" designator with an alphanumeric lot code on the top surface of package. The "Y" represents the last digit of the year the part was manufactured; the "XXX" is an auto generated number. Mounting Configuration All dimensions are in millimeters (inches). Angles are in degrees. Notes: 1. Ground / thermal vias are critical for the proper performance of this device. Vias should use a .35mm (#80 / .0135") diameter drill and have a final plated thru diameter of .25 mm (.010"). 2. Add as much copper as possible to inner and outer layers near the part to ensure optimal thermal performance. 3. RF trace width depends upon the PC board material and construction. 4. Use 1 oz. Copper minimum. Advanced Data Sheet: Rev B 03/29/10 (c) 2009 TriQuint Semiconductor, Inc. - 9 of 10 - Disclaimer: Subject to change without noticee Connecting the Digital World to the Global Network(R) TQP3M9009 High Linearity LNA Gain Block Product Compliance Information Solderability ESD Information Compatible with the latest version of J-STD-020, Lead free solder, 260 ESD Rating: Value: Test: Standard: Class 1A Passes 250 V to < 500 V. Human Body Model (HBM) JEDEC Standard JESD22-A114 ESD Rating: Value: Test: Standard: Class IV Passes 1000 V Charged Device Model (CDM) JEDEC Standard JESD22-C101 This part is compliant with EU 2002/95/EC RoHS directive (Restrictions on the Use of Certain Hazardous Substances in Electrical and Electronic Equipment). This product also has the following attributes: * Lead Free * Halogen Free (Chlorine, Bromine) * Antimony Free * TBBP-A (C15H12Br402) Free * PFOS Free * SVHC Free MSL Rating Level 3 at +260 C convection reflow The part is rated Moisture Sensitivity Level 3 at 260C per JEDEC standard IPC/JEDEC J-STD-020. Contact Information For the latest specifications, additional product information, worldwide sales and distribution locations, and information about TriQuint: Web: www.triquint.com Email: info-sales@tqs.com Tel: Fax: +1.503.615.9000 +1.503.615.8902 For technical questions and application information: Email: sjcapplications.engineering@tqs.com Important Notice The information contained herein is believed to be reliable. TriQuint makes no warranties regarding the information contained herein. TriQuint assumes no responsibility or liability whatsoever for any of the information contained herein. TriQuint assumes no responsibility or liability whatsoever for the use of the information contained herein. The information contained herein is provided "AS IS, WHERE IS" and with all faults, and the entire risk associated with such information is entirely with the user. All information contained herein is subject to change without notice. Customers should obtain and verify the latest relevant information before placing orders for TriQuint products. The information contained herein or any use of such information does not grant, explicitly or implicitly, to any party any patent rights, licenses, or any other intellectual property rights, whether with regard to such information itself or anything described by such information. TriQuint products are not warranted or authorized for use as critical components in medical, life-saving, or life-sustaining applications, or other applications where a failure would reasonably be expected to cause severe personal injury or death. Advanced Data Sheet: Rev B 03/29/10 (c) 2009 TriQuint Semiconductor, Inc. - 10 of 10 Disclaimer: Subject to change without noticee Connecting the Digital World to the Global Network(R)