SCAS459D − NOVEMBER 1994 − REVISED OCT OBER 2003
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
D4.5-V to 5.5-V VCC Operation
DInputs Accept Voltages to 5.5 V
DMax tpd of 20 ns at 5 V
D3-State Outputs Directly Drive Bus Lines
DFlow-Through Architecture Optimizes PCB
Layout
DCenter-Pin VCC and GND Configurations
Minimize High-Speed Switching Noise
DESD Protection Exceeds JESD 22
− 2000-V Human-Body Model (A114-A)
− 200-V Machine Model (A115-A)
DDesigned for the IEEE 1284-I (Level-1 Type)
and IEEE 1284-II (Level-2 Type) Electrical
Specifications
description/ordering information
The ’ACT1284 devices are designed for
asynchronous two-way communication between
data buses. The control function minimizes
external timing requirements.
The devices allow data transmission in either the
A-to-B or the B-to-A direction for bits 1, 2, 3, and
4, depending on the logic level at the
direction-control (DIR) input. Bits 5, 6, and 7,
however, always transmit in the A-to-B direction.
The output drive for each mode is determined by the high-drive (HD) control pin. When HD is high, the high drive
is delivered by the totem-pole configuration, and when HD is low, the outputs are open drain. This meets the
drive requirements as specified in the IEEE 1284-I (level-1 type) and the IEEE 1284-II (level-2 type) parallel
peripheral-interface specification.
ORDERING INFORMATION
TAPACKAGE†ORDERABLE
PART NUMBER TOP-SIDE
MARKING
SOIC − DW
Tube SN74ACT1284DW
ACT1284
SOIC − DW Tape and reel SN74ACT1284DWR ACT1284
0°C to 70°C
SOP − NS Tape and reel SN74ACT1284NSR ACT1284
0°C to 70°CSSOP − DB Tape and reel SN74ACT1284DBR AU284
TSSOP − PW
Tube SN74ACT1284PW
AU284
TSSOP − PW Tape and reel SN74ACT1284PWR AU284
CDIP − J Tube SNJ54ACT1284J SNJ54ACT1284J
−55°C to 125°CCFP − W Tube SNJ54ACT1284W SNJ54ACT1284W
−55 C to 125 C
LCCC − FK Tube SNJ54ACT1284FK SNJ54ACT1284FK
†Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are
available at www.ti.com/sc/package.
Copyright 2003, Texas Instruments Incorporated
!"#$%& "!&'&
&(!)$'!& "#))%& ' !( *#+,"'!& '%- )!#" "!&(!)$ !
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)!#"!& *)!"%&1 !% &! &%"%'),0 &",#% %&1 !( ',,
*')'$%%)-
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications o
f
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
A1
A2
A3
A4
GND
GND
A5
A6
A7
DIR
B1
B2
B3
B4
VCC
VCC
B5
B6
B7
HD
SN54ACT1284 ...J OR W PACKAGE
SN74ACT1284 . . . DB, DW, NS, OR PW PACKAGE
(TOP VIEW)
3212019
910 11 12 13
4
5
6
7
8
18
17
16
15
14
B3
B4
VCC
VCC
B5
A4
GND
GND
A5
A6
SN54ACT1284 . . . FK PACKAGE
(TOP VIEW)
A3
A2
A1
B7
B6 B2
A7
DIR
HD B1
SCAS459D − NOVEMBER 1994 − REVISED OCT OBER 2003
2POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
FUNCTION TABLE
INPUTS
OUTPUT
MODE
DIR HD
OUTPUT
MODE
L
L
Open drain A to B: Bits 5, 6, 7
L L Totem pole B to A: Bits 1, 2, 3, 4
L H Totem pole B to A: Bits 1, 2, 3, 4 and A to B: Bits 5, 6, 7
H L Open drain A to B: Bits 1, 2, 3, 4, 5, 6, 7
H H Totem pole A to B: Bits 1, 2, 3, 4, 5, 6, 7
logic diagram (positive logic)
HD
DIR
A1, A2, A3, A4
A5, A6, A7
B1, B2, B3, B4
B5, B6, B7
SCAS459D − NOVEMBER 1994 − REVISED OCT OBER 2003
3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)†
Supply voltage range, VCC −0.5 V to 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
B-port input and output voltage range, VI and VO (see Notes 1 and 2) −2 V to 7 V. . . . . . . . . . . . . . . . . . . . . .
A-port input and output voltage range, VI and VO (see Note 1) −0.5 V to VCC + 0.5 V. . . . . . . . . . . . . . . . . . . .
Input clamp current, IIK (VI < 0 or VI > VCC) ±20 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Output clamp current, IOK (VO < 0 or VO > VCC) ±50 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Continuous output current, IO (VO = 0 to VCC) ±50 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Continuous current through VCC or GND ±200 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Package thermal impedance, θJA (see Note 3): DB package 70°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
DW package 58°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
NS package 60°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
PW package 83°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Storage temperature range, Tstg −65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
†Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
2. The ac input voltage pulse duration is limited to 20 ns if the input voltage goes more negative than −0.5 V.
3. The package thermal impedance is calculated in accordance with JESD 51-7.
recommended operating conditions (see Note 4)
SN54ACT1284 SN74ACT1284
UNIT
MIN MAX MIN MAX
UNIT
VCC Supply voltage 4.7 5.5 4.7 5.5 V
VIH High-level input voltage 2 2 V
VIL Low-level input voltage 0.8 0.8 V
VIInput voltage 0 VCC 0 VCC V
VOOpen-drain output voltage HD low 0 5.5 0 5.5 V
IOH
High-level output current
B port, HD high −14 −14
mA
IOH High-level output current A port −4 −4 mA
IOL
Low-level output current
B port 14 14
mA
IOL Low-level output current A port 4 4 mA
TAOperating free-air temperature −55 125 0 70 °C
NOTE 4: All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
2 &(!)$'!& "!&"%)& *)!#" & % (!)$'3% !)
%1& *'% !( %3%,!*$%&- ')'"%)" '' '& !%)
*%"("'!& ')% %1& 1!',- %.' &)#$%& )%%)3% % )1 !
"'&1% !) "!&&#% %% *)!#" /!# &!"%-
SCAS459D − NOVEMBER 1994 − REVISED OCT OBER 2003
4POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
electrical characteristics over recommended ranges of operating free-air temperature and supply
voltage (unless otherwise noted)
PARAMETER
TEST CONDITIONS
VCC†
SN54ACT1284 SN74ACT1284
UNIT
PARAMETER
TEST CONDITIONS
VCC
†
MIN TYP MAX MIN TYP MAX
UNIT
Vhys
Input
VIT+ − VIT− for all inputs
5 V 0.4 0.4
V
Vhys
Input
hysteresis VIT+ − VIT− for all inputs 4.7 V 0.2 0.2 V
B port IOH = −14 mA 4.7 V 2.4 2.4
VOH
A port
IOH = −50 µAMIN
to MAX VCC−0.2 VCC−0.2 V
A port
IOH = −4 mA 4.7 V 3.7 3.7
B port IOL =14 mA 4.7 V 0.4 0.4
V
OL
A port
IOL = 50 µA
4.7 V
0.2 0.2 V
VOL
A port IOL = 4 mA 4.7 V 0.4 0.4
V
IIVI = VCC or GND 5.5 V ±1±1µA
IOZ A or B ports‡VO = VCC or GND 5.5 V ±20 ±20 µA
Ioff B port VI or VO ≤ 7 V 0 V ±100 ±100 µA
ICC VI = VCC or GND, IO = 0 5.5 V 1.5 1.5 mA
CiControl inputs VI = VCC or GND 5 V 4 4 pF
Cio A or B ports VO = VCC or GND 5 V 12 12 pF
ZOB port IOH = −20 mA, IOH = −50 mA 5 V 8 30 8 30 Ω
†For I/O ports, the parameter IOZ includes the input leakage current II.
‡For conditions shown as MIN or MAX, use the appropriate values under recommended operating conditions.
switching characteristics over recommended ranges of supply voltage and operating free-air
temperature (unless otherwise noted) (see Figure 1)
PARAMETER
FROM
TO
SN54ACT1284 SN74ACT1284
UNIT
PARAMETER
FROM
(INPUT)
TO
(OUTPUT) MIN MAX MIN MAX
UNIT
tPLH
Totem pole
A or B
B or A
1 20 1 20
ns
tPHL Totem pole A or B B or A 1 20 1 20 ns
SR Totem pole B output 0.05 0.4 0.05 0.4 V/ns
tpd(EN)
Totem pole
HD
B
1 20 1 20
ns
tpd(DIS) Totem pole HD B 1 20 1 20 ns
tr, tfOpen drain A B 120 120 ns
2 &(!)$'!& "!&"%)& *)!#" & % (!)$'3% !)
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*%"("'!& ')% %1& 1!',- %.' &)#$%& )%%)3% % )1 !
"'&1% !) "!&&#% %% *)!#" /!# &!"%-
SCAS459D − NOVEMBER 1994 − REVISED OCT OBER 2003
5
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
PARAMETER MEASUREMENT INFORMATION
50% VCC
tPHL
tPLH
From B Output
Under Test
A-TO-B LOAD (totem pole)
1.5 V
VOLTAGE WAVEFORMS MEASURED AT TP1
PROPAGATION DELAY TIMES (A to B)
3 V
VOH
VOL
VOL
0 V
62 Ω
CL = 50 pF
(see Note A)
33 Ω
TP1
VCC
CL = 50 pF
(see Note A)
Sink Load
Source Load
1.5 V1.5 V
VOH
VOL VOH − 1.4 VVOH − 1.4 VVOL + 1.4 V
62 Ω
tPHL
tPLH
tf
A-TO-B LOAD (open drain)
1.5 V
VOLTAGE WAVEFORMS MEASURED AT TP1 (B SIDE)
3 V
VOH
VOL
0 V
TP1
VCC
CL = 50 pF
(see Note A)
1.5 V
VOL
(see Note E) 0.8 V
500 Ω
From B Output
tr
2 V2 V
0.8 V
tPHL
tPLH
1.5 V
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES (B to A)
3 V
VOH
VOL
VOL
0 V
1.5 V1.5 V
Output 50% VCC
B-TO-A LOAD (totem pole)
CL = 50 pF
(see Note A) 500 Ω
From A Output
Under Test
Input
(see Note C)
Output
(see Note D)
Input
(see Note F)
Input
(see Note F)
NOTES: A. CL includes probe and jig capacitance.
B. The outputs are measured one at a time with one transition per measurement.
C. Input rise and fall times are 3 ns, 150 ns < pulse duration <10 µs for both low-to-high and high-to-low transitions.
D. Slew rate is defined as 10% and 90% of the transition times.
E. Rise and fall times, open drain, are <120 ns.
F. Input rise and fall times are 3 ns.
Figure 1. Load Circuits and Voltage Waveforms
PACKAGE OPTION ADDENDUM
www.ti.com 28-Aug-2010
Addendum-Page 1
PACKAGING INFORMATION
Orderable Device Status (1) Package Type Package
Drawing Pins Package Qty Eco Plan (2) Lead/
Ball Finish MSL Peak Temp (3) Samples
(Requires Login)
SN74ACT1284DBLE OBSOLETE SSOP DB 20 TBD Call TI Call TI Samples Not Available
SN74ACT1284DBR ACTIVE SSOP DB 20 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM Contact TI Distributor
or Sales Office
SN74ACT1284DBRE4 ACTIVE SSOP DB 20 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM Contact TI Distributor
or Sales Office
SN74ACT1284DBRG4 ACTIVE SSOP DB 20 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM Contact TI Distributor
or Sales Office
SN74ACT1284DW ACTIVE SOIC DW 20 25 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM Purchase Samples
SN74ACT1284DWE4 ACTIVE SOIC DW 20 25 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM Purchase Samples
SN74ACT1284DWG4 ACTIVE SOIC DW 20 25 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM Purchase Samples
SN74ACT1284DWR ACTIVE SOIC DW 20 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM Contact TI Distributor
or Sales Office
SN74ACT1284DWRE4 ACTIVE SOIC DW 20 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM Contact TI Distributor
or Sales Office
SN74ACT1284DWRG4 ACTIVE SOIC DW 20 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM Contact TI Distributor
or Sales Office
SN74ACT1284NSR ACTIVE SO NS 20 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM Purchase Samples
SN74ACT1284NSRE4 ACTIVE SO NS 20 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM Purchase Samples
SN74ACT1284NSRG4 ACTIVE SO NS 20 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM Purchase Samples
SN74ACT1284PWR ACTIVE TSSOP PW 20 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM Contact TI Distributor
or Sales Office
SN74ACT1284PWRE4 ACTIVE TSSOP PW 20 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM Contact TI Distributor
or Sales Office
SN74ACT1284PWRG4 ACTIVE TSSOP PW 20 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM Contact TI Distributor
or Sales Office
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
PACKAGE OPTION ADDENDUM
www.ti.com 28-Aug-2010
Addendum-Page 2
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device Package
Type Package
Drawing Pins SPQ Reel
Diameter
(mm)
Reel
Width
W1 (mm)
A0
(mm) B0
(mm) K0
(mm) P1
(mm) W
(mm) Pin1
Quadrant
SN74ACT1284DBR SSOP DB 20 2000 330.0 16.4 8.2 7.5 2.5 12.0 16.0 Q1
SN74ACT1284DWR SOIC DW 20 2000 330.0 24.4 10.8 13.0 2.7 12.0 24.0 Q1
SN74ACT1284NSR SO NS 20 2000 330.0 24.4 8.2 13.0 2.5 12.0 24.0 Q1
SN74ACT1284PWR TSSOP PW 20 2000 330.0 16.4 6.95 7.1 1.6 8.0 16.0 Q1
PACKAGE MATERIALS INFORMATION
www.ti.com 14-Jul-2012
Pack Materials-Page 1
*All dimensions are nominal
Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
SN74ACT1284DBR SSOP DB 20 2000 367.0 367.0 38.0
SN74ACT1284DWR SOIC DW 20 2000 367.0 367.0 45.0
SN74ACT1284NSR SO NS 20 2000 367.0 367.0 45.0
SN74ACT1284PWR TSSOP PW 20 2000 367.0 367.0 38.0
PACKAGE MATERIALS INFORMATION
www.ti.com 14-Jul-2012
Pack Materials-Page 2
MECHANICAL DATA
MSSO002E – JANUARY 1995 – REVISED DECEMBER 2001
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
DB (R-PDSO-G**) PLASTIC SMALL-OUTLINE
4040065 /E 12/01
28 PINS SHOWN
Gage Plane
8,20
7,40
0,55
0,95
0,25
38
12,90
12,30
28
10,50
24
8,50
Seating Plane
9,907,90
30
10,50
9,90
0,38
5,60
5,00
15
0,22
14
A
28
1
2016
6,50
6,50
14
0,05 MIN
5,905,90
DIM
A MAX
A MIN
PINS **
2,00 MAX
6,90
7,50
0,65 M
0,15
0°–ā8°
0,10
0,09
0,25
NOTES: A. All linear dimensions are in millimeters.
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusion not to exceed 0,15.
D. Falls within JEDEC MO-150
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