SCAS459D - NOVEMBER 1994 - REVISED OCTOBER 2003 D D D D D D D D SN54ACT1284 . . . J OR W PACKAGE SN74ACT1284 . . . DB, DW, NS, OR PW PACKAGE (TOP VIEW) 4.5-V to 5.5-V VCC Operation Inputs Accept Voltages to 5.5 V Max tpd of 20 ns at 5 V 3-State Outputs Directly Drive Bus Lines Flow-Through Architecture Optimizes PCB Layout Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise ESD Protection Exceeds JESD 22 - 2000-V Human-Body Model (A114-A) - 200-V Machine Model (A115-A) Designed for the IEEE 1284-I (Level-1 Type) and IEEE 1284-II (Level-2 Type) Electrical Specifications A1 A2 A3 A4 GND GND A5 A6 A7 DIR 1 20 2 19 3 18 4 17 5 16 6 15 7 14 8 13 9 12 10 11 B1 B2 B3 B4 VCC VCC B5 B6 B7 HD SN54ACT1284 . . . FK PACKAGE (TOP VIEW) A3 A2 A1 B1 B2 description/ordering information The 'ACT1284 devices are designed for asynchronous two-way communication between data buses. The control function minimizes external timing requirements. A4 GND GND A5 A6 The devices allow data transmission in either the A-to-B or the B-to-A direction for bits 1, 2, 3, and 4, depending on the logic level at the direction-control (DIR) input. Bits 5, 6, and 7, however, always transmit in the A-to-B direction. 4 3 2 1 20 19 18 5 17 6 16 7 15 14 8 B3 B4 VCC VCC B5 A7 DIR HD B7 B6 9 10 11 12 13 The output drive for each mode is determined by the high-drive (HD) control pin. When HD is high, the high drive is delivered by the totem-pole configuration, and when HD is low, the outputs are open drain. This meets the drive requirements as specified in the IEEE 1284-I (level-1 type) and the IEEE 1284-II (level-2 type) parallel peripheral-interface specification. ORDERING INFORMATION SN74ACT1284DW Tape and reel SN74ACT1284DWR SOP - NS Tape and reel SN74ACT1284NSR ACT1284 SSOP - DB Tape and reel SN74ACT1284DBR AU284 Tube SN74ACT1284PW Tape and reel SN74ACT1284PWR CDIP - J Tube SNJ54ACT1284J SNJ54ACT1284J CFP - W Tube SNJ54ACT1284W SNJ54ACT1284W LCCC - FK Tube SNJ54ACT1284FK SNJ54ACT1284FK TSSOP - PW -55C -55 C to 125 125C C TOP-SIDE MARKING Tube SOIC - DW 0C to 70C ORDERABLE PART NUMBER PACKAGE TA ACT1284 AU284 Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. Copyright 2003, Texas Instruments Incorporated !"#$%& "!&'& &(!)$'!& "#))%& ' !( *#+,"'!& '%- )!#" "!&(!)$ ! *%"("'!& *%) % %)$ !( %.' &)#$%& '&') /'))'&0)!#"!& *)!"%&1 !% &! &%"%'),0 &",#% %&1 !( ',, *')'$%%)POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 1 SCAS459D - NOVEMBER 1994 - REVISED OCTOBER 2003 FUNCTION TABLE INPUTS DIR HD L L L OUTPUT MODE Open drain A to B: Bits 5, 6, 7 Totem pole B to A: Bits 1, 2, 3, 4 H Totem pole B to A: Bits 1, 2, 3, 4 and A to B: Bits 5, 6, 7 H L Open drain A to B: Bits 1, 2, 3, 4, 5, 6, 7 H H Totem pole A to B: Bits 1, 2, 3, 4, 5, 6, 7 logic diagram (positive logic) HD DIR A1, A2, A3, A4 B1, B2, B3, B4 B5, B6, B7 A5, A6, A7 2 POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 SCAS459D - NOVEMBER 1994 - REVISED OCTOBER 2003 absolute maximum ratings over operating free-air temperature range (unless otherwise noted) Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5 V to 7 V B-port input and output voltage range, VI and VO (see Notes 1 and 2) . . . . . . . . . . . . . . . . . . . . . . -2 V to 7 V A-port input and output voltage range, VI and VO (see Note 1) . . . . . . . . . . . . . . . . . . . . -0.5 V to VCC + 0.5 V Input clamp current, IIK (VI < 0 or VI > VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 mA Output clamp current, IOK (VO < 0 or VO > VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 mA Continuous output current, IO (VO = 0 to VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 mA Continuous current through VCC or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 200 mA Package thermal impedance, JA (see Note 3): DB package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70C/W DW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58C/W NS package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60C/W PW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83C/W Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -65C to 150C Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed. 2. The ac input voltage pulse duration is limited to 20 ns if the input voltage goes more negative than -0.5 V. 3. The package thermal impedance is calculated in accordance with JESD 51-7. recommended operating conditions (see Note 4) SN54ACT1284 VCC VIH Supply voltage VIL VI Low-level input voltage VO Open-drain output voltage High-level input voltage IOL Low-level output current MIN MAX 4.7 5.5 4.7 5.5 2 0.8 0 HD low B port, HD high High-level output current MAX 2 Input voltage IOH SN74ACT1284 MIN 0 VCC 5.5 0 0 UNIT V V 0.8 V VCC 5.5 V -14 -14 A port -4 -4 B port 14 14 A port 4 4 V mA mA TA Operating free-air temperature -55 125 0 70 C NOTE 4: All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs, literature number SCBA004. 2 &(!)$'!& "!&"%)& *)!#" & % (!)$'3% !) %1& *'% !( %3%,!*$%&- ')'"%)" '' '& !%) *%"("'!& ')% %1& 1!',- %.' &)#$%& )%%)3% % )1 ! "'&1% !) "!&&#% %% *)!#" /!# &!"%- POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 3 SCAS459D - NOVEMBER 1994 - REVISED OCTOBER 2003 electrical characteristics over recommended ranges of operating free-air temperature and supply voltage (unless otherwise noted) PARAMETER Vhys VOH II IOZ SN54ACT1284 VCC MIN TYP SN74ACT1284 MAX MIN Input hysteresis 5V 0.4 0.4 VIT+ - VIT- for all inputs 4.7 V 0.2 0.2 B port IOH = -14 mA 4.7 V 2.4 2.4 IOH = -50 A MIN to MAX VCC-0.2 VCC -0.2 IOH = -4 mA IOL = 14 mA 4.7 V A port B port VOL TEST CONDITIONS A or B ports Ioff ICC B port Ci Control inputs Cio A or B ports MAX UNIT V V 3.7 4.7 V IOL = 50 A IOL = 4 mA A port 3.7 TYP 4.7 V 0.4 0.4 0.2 0.2 0.4 0.4 1 1 A A V VI = VCC or GND VO = VCC or GND 5.5 V 5.5 V 20 20 VI or VO 7 V VI = VCC or GND, 0V 100 100 A 1.5 1.5 mA IO = 0 VI = VCC or GND VO = VCC or GND 5.5 V 5V 4 4 pF 5V 12 12 pF ZO B port IOH = -20 mA, IOH = -50 mA 5V 8 30 For I/O ports, the parameter IOZ includes the input leakage current II. For conditions shown as MIN or MAX, use the appropriate values under recommended operating conditions. 8 30 switching characteristics over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) (see Figure 1) PARAMETER tPLH tPHL Totem pole SR Totem pole FROM (INPUT) TO (OUTPUT) A or B B or A B output tpd(EN) tpd(DIS) Totem pole HD B tr, tf Open drain A B 2 &(!)$'!& "!&"%)& *)!#" & % (!)$'3% !) %1& *'% !( %3%,!*$%&- ')'"%)" '' '& !%) *%"("'!& ')% %1& 1!',- %.' &)#$%& )%%)3% % )1 ! "'&1% !) "!&&#% %% *)!#" /!# &!"%- 4 POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 SN54ACT1284 SN74ACT1284 MIN MAX MIN MAX 1 20 1 20 1 20 1 20 0.05 0.4 0.05 0.4 1 20 1 20 1 20 1 20 120 120 UNIT ns V/ns ns ns SCAS459D - NOVEMBER 1994 - REVISED OCTOBER 2003 PARAMETER MEASUREMENT INFORMATION VCC From B Output Under Test 62 CL = 50 pF (see Note A) TP1 tPHL 33 3V Input (see Note C) 0V Output (see Note D) Sink Load 1.5 V 1.5 V tPLH tPHL VOH VOH - 1.4 V VOL VOH VOL + 1.4 V tPLH VOL Source Load 62 VOLTAGE WAVEFORMS MEASURED AT TP1 PROPAGATION DELAY TIMES (A to B) CL = 50 pF (see Note A) A-TO-B LOAD (totem pole) 3V Input (see Note F) VCC 1.5 V 1.5 V 0V TP1 2V 0.8 V VOL (see Note E) 500 2V 0.8 V VOH VOL tf tr From B Output VOLTAGE WAVEFORMS MEASURED AT TP1 (B SIDE) CL = 50 pF (see Note A) A-TO-B LOAD (open drain) Input (see Note F) 1.5 V 0V From A Output Under Test CL = 50 pF (see Note A) 3V 1.5 V tPLH 500 tPHL VOH Output 50% VCC 50% VCC VOL VOLTAGE WAVEFORMS PROPAGATION DELAY TIMES (B to A) B-TO-A LOAD (totem pole) NOTES: A. B. C. D. E. F. CL includes probe and jig capacitance. The outputs are measured one at a time with one transition per measurement. Input rise and fall times are 3 ns, 150 ns < pulse duration <10 s for both low-to-high and high-to-low transitions. Slew rate is defined as 10% and 90% of the transition times. Rise and fall times, open drain, are <120 ns. Input rise and fall times are 3 ns. Figure 1. Load Circuits and Voltage Waveforms POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 5 PACKAGE OPTION ADDENDUM www.ti.com 28-Aug-2010 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Qty SN74ACT1284DBLE OBSOLETE SSOP DB 20 SN74ACT1284DBR ACTIVE SSOP DB 20 2000 SN74ACT1284DBRE4 ACTIVE SSOP DB 20 SN74ACT1284DBRG4 ACTIVE SSOP DB SN74ACT1284DW ACTIVE SOIC SN74ACT1284DWE4 ACTIVE SN74ACT1284DWG4 Eco Plan (2) TBD Lead/ Ball Finish (3) Samples (Requires Login) Call TI Samples Not Available Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM Contact TI Distributor or Sales Office 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM Contact TI Distributor or Sales Office 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM Contact TI Distributor or Sales Office DW 20 25 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM Purchase Samples SOIC DW 20 25 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM Purchase Samples ACTIVE SOIC DW 20 25 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM Purchase Samples SN74ACT1284DWR ACTIVE SOIC DW 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM Contact TI Distributor or Sales Office SN74ACT1284DWRE4 ACTIVE SOIC DW 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM Contact TI Distributor or Sales Office SN74ACT1284DWRG4 ACTIVE SOIC DW 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM Contact TI Distributor or Sales Office SN74ACT1284NSR ACTIVE SO NS 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM Purchase Samples SN74ACT1284NSRE4 ACTIVE SO NS 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM Purchase Samples SN74ACT1284NSRG4 ACTIVE SO NS 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM Purchase Samples SN74ACT1284PWR ACTIVE TSSOP PW 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM Contact TI Distributor or Sales Office SN74ACT1284PWRE4 ACTIVE TSSOP PW 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM Contact TI Distributor or Sales Office SN74ACT1284PWRG4 ACTIVE TSSOP PW 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM Contact TI Distributor or Sales Office (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. Addendum-Page 1 Call TI MSL Peak Temp PACKAGE OPTION ADDENDUM www.ti.com 28-Aug-2010 LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 2 PACKAGE MATERIALS INFORMATION www.ti.com 14-Jul-2012 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant SN74ACT1284DBR SSOP DB 20 2000 330.0 16.4 8.2 7.5 2.5 12.0 16.0 Q1 SN74ACT1284DWR SOIC DW 20 2000 330.0 24.4 10.8 13.0 2.7 12.0 24.0 Q1 SN74ACT1284NSR SO NS 20 2000 330.0 24.4 8.2 13.0 2.5 12.0 24.0 Q1 SN74ACT1284PWR TSSOP PW 20 2000 330.0 16.4 6.95 7.1 1.6 8.0 16.0 Q1 Pack Materials-Page 1 PACKAGE MATERIALS INFORMATION www.ti.com 14-Jul-2012 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) SN74ACT1284DBR SN74ACT1284DWR SSOP DB 20 2000 367.0 367.0 38.0 SOIC DW 20 2000 367.0 367.0 45.0 SN74ACT1284NSR SO NS 20 2000 367.0 367.0 45.0 SN74ACT1284PWR TSSOP PW 20 2000 367.0 367.0 38.0 Pack Materials-Page 2 MECHANICAL DATA MSSO002E - JANUARY 1995 - REVISED DECEMBER 2001 DB (R-PDSO-G**) PLASTIC SMALL-OUTLINE 28 PINS SHOWN 0,38 0,22 0,65 28 0,15 M 15 0,25 0,09 8,20 7,40 5,60 5,00 Gage Plane 1 14 0,25 A 0-8 0,95 0,55 Seating Plane 2,00 MAX 0,10 0,05 MIN PINS ** 14 16 20 24 28 30 38 A MAX 6,50 6,50 7,50 8,50 10,50 10,50 12,90 A MIN 5,90 5,90 6,90 7,90 9,90 9,90 12,30 DIM 4040065 /E 12/01 NOTES: A. B. C. D. All linear dimensions are in millimeters. This drawing is subject to change without notice. Body dimensions do not include mold flash or protrusion not to exceed 0,15. Falls within JEDEC MO-150 POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46C and to discontinue any product or service per JESD48B. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and complete. All semiconductor products (also referred to herein as "components") are sold subject to TI's terms and conditions of sale supplied at the time of order acknowledgment. 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