www.irf.com 2
IRS2110(-1,-2,S)PbF/IRS2113(-1,-2,S)PbF
Recommended Operating Conditions
The input/output logic timing diagram is shown in Fig. 1. For proper operation, the device should be used within the
recommended conditions. The VS and VSS offset ratings are tested with all supplies biased at a 15 V differential.
Typical ratings at other bias conditions are shown in Figs. 36 and 37.
Note 2: Logic operational for VS of -4 V to +500 V. Logic state held for VS of -4 V to -VBS. (Refer to the Design Tip DT97-3)
Note 3: When VDD < 5 V, the minimum VSS offset is limited to -VDD.
Absolute Maximum Ratings
Absolute maximum ratings indicate sustained limits beyond which damage to the device may occur. All voltage param-
eters are absolute voltages referenced to COM. The thermal resistance and power dissipation ratings are measured
under board mounted and still air conditions. Additional information is shown in Figs. 28 through 35.
Symbol Definition Min. Max. Units
V B High-side floating supply voltage (IRS2110) -0.3 520 (Note 1)
(IRS2113) -0.3 620 (Note 1)
VS
High-side floating supply offset voltage VB - 20 VB + 0.3
VHO
High-side floating output voltage VS - 0.3 VB + 0.3
VCC
Low-side fixed supply voltage -0.3 20 (Note 1)
VLO
Low-side output voltage -0.3 VCC + 0.3
VDD
Logic supply voltage -0.3 VSS+20
(Note 1)
VSS Logic supply offset voltage VCC - 20 VCC + 0.3
VIN Logic input voltage (HIN, LIN, & SD) VSS - 0.3 VDD + 0.3
dVs/dt Allowable offset supply voltage transient (Fig. 2) — 50 V/ns
PDPackage power dissipation @ TA ≤ +25 °C (14 lead DIP) — 1.6
(16 lead SOIC) — 1.25
RTHJA Thermal resistance, junction to ambient (14 lead DIP) — 75
(16 lead SOIC) — 100
TJJunction temperature — 150
TSStorage temperature -55 150
TLLead temperature (soldering, 10 seconds) — 300
°C/W
W
V
°C
Symbol Definition Min. Max. Units
VB
High-side floating supply absolute voltage VS + 10 VS + 20
VS High-side floating supply offset voltage (IRS2110) Note 2 500
(IRS2113) Note 2 600
VHO
High-side floating output voltage VS
VB
VCC
Low-side fixed supply voltage 10 20
VLO
Low-side output voltage 0 VCC
VDD Logic supply voltage VSS + 3 VSS + 20
VSS Logic supply offset voltage -5 (Note 3) 5
VIN Logic input voltage (HIN, LIN & SD) VSS VDD
TAAmbient temperature -40 125 °C
V
Note 1: All supplies are fully tested at 25 V, and an internal 20 V clamp exists for each supply.