SSM3J35CT
2015-09-29
1
TOSHI BA Field-Ef fect T ra nsistor Silicon P-Channel MOS Type
SSM3J35CT
○ High-Speed Switching Applications
○ Analog Switch Applications
• 1.2-V drive
• Low ON-resistance : Ron = 44 Ω (max) (@VGS = -1.2 V)
: Ron = 22 Ω (max) (@VGS = -1.5 V)
: Ron = 11 Ω (max) (@VGS = -2.5 V)
: Ron = 8 Ω (max) (@VGS = -4.0 V)
Absolute Maximum Ratings (Ta = 25˚C)
Characteristics Symbol Rating Unit
Drain–sourc e voltage VDSS -20 V
Gate–source voltage VGSS ±10 V
Drain current DC ID -100 mA
Pulse IDP -200
Drain power dissipati on PD (Note 1)
100 mW
Channel temperature Tch 150 °C
Storage temperature Tstg −55 to 150 °C
Note: Using continuously under heavy loads (e.g. the application of high
temperature/current/voltage and the significant change in
temperature, etc.) may cause this product to decrease in the
reliability significantly even if the operating conditions (i.e. operating
temperature/current/voltage, etc.) are within the absolute maximum ratings.
Please design the appropriate reliability upon reviewing the Toshiba Semiconductor Reliability Handbook
(“Handling Precautions”/“Derating Concept and Methods”) and individual reliability data (i.e. reliability test report
and estimated failure rate, etc).
Note 1: Mounted on an FR4 board
(10 mm × 10 mm × 1.0 mm, Cu Pad: 100 mm2 )
Marking (t op view) Pin Assignment (top view) Equivalent Circui t (t op vi ew)
Unit: mm
JEDEC -
JEITA -
TOSHIBA 2-1J1B
Weight: 0.75 mg (typ.)
1. Gate
2. Source
3. Drain
*
Electrodes: on the bottom
Polarity mark
Polarity mark (on the top)
1
2
3
S3
1
2
3
Start of commercial production
2008-03
CST3
SSM3J35CT
2015-09-29
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Electrical Characteristics (Ta = 25°C)
Characteristics Symbol Tes t C ondition Min Typ. Max Unit
Gate leakage current IGSS VGS = ±10 V, VDS = 0 V ― ― ±10 μA
Drain–sourc e breakdown voltage V (BR) DSS ID = -0.1 mA, VGS = 0 V -20 ― ― V
Drain cutoff current IDSS VDS = -20 V, VGS = 0 V ― ― -1 μA
Gate threshold volt age Vth VDS = -3 V, ID = -1 mA -0.4 ― -1.0 V
Forward transfer admitt ance |Yfs| VDS = -3 V, ID = -50 mA (Note 2) 77 ― ― mS
Drain–sourc e ON-resistance RDS (ON)
ID = -50 mA, VGS = -4 V (Note 2) ― 4.3 8
Ω
ID = -50 mA, VGS = -2.5 V (Note 2) ― 5.6 11
ID = -5 mA, VGS = -1.5 V (Note 2) ― 8.2 22
ID = -2 mA, VGS = -1.2 V (Note 2) ― 11 44
Input capacitance Ciss
VDS = -3 V, VGS = 0 V, f = 1 MHz
― 12.2 ―
pF
Reverse transfer c apacitance Crss ― 6.5 ―
Output capacitance Coss ― 10.4 ―
Switching time Turn-on time ton VDD = -3 V, ID = -50 mA,
VGS = 0 t o -2.5 V
― 175 ― ns
Turn-off time toff ―
251 ―
Drain–source forward voltage VDSF ID = 100 mA, VGS = 0 V (Note 2) ― 0.83 1.2 V
Note 2: Pulse test
Switching Time Test Circuit
(a) Test Circuit (b) VIN
Usage Considerations
Let Vth be the voltage applied between gate and source that causes the drain current (ID) to below (−1 mA for the
SSM3J35CT). Then, for normal switching operation, VGS(on) must be higher than Vth, and VGS(off) must be lower than
Vth. This relationship can be expressed as: VGS(off) < Vth < VGS(on).
Take this into consideration when using the device.
Handling Preca ution
When handling indiv id ual dev i ces that ar e not yet mou nted on a circuit boar d , make sur e that the environment is
protected aga ins t electr ostati c dis char ge. Oper at or s should wear antistatic clothing, and containers and other objects that
come into direct contact with devices should be made of antistatic materials.
(c) V
OUT
V
DD
= -3 V
D
uty ≤ 1%
V
IN: tr, tf < 5 ns
(Z
out = 50 Ω)
Common Source
Ta
= 25°C
IN
0
−
2.5V
10 μs
VDD
OUT
50Ω
RL
ton
90%
10%
−2.5 V
0 V
90%
10%
toff
tr
tf
VDS (ON)
V
DD
SSM3J35CT
2015-09-29
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I
D
– V
DS
Drain current ID (mA)
Drain–sourc e voltage V
DS
(V)
0
-0.5
-1 -1.5 -2
Common Source
Ta = 25°C
0
-50
-100
-150
-200
-250
-2.5 V
-1.8 V
-1.5 V
VGS=-1.2 V
-4 V
Drain current I
D
(mA)
Drain–sourc e ON-resistance
RDS (ON) (
Ω
)
0
-1
10
-1000
-10
5
15
20
-100
RDS (ON) – ID
R
DS (ON)
– V
GS
Gate–source voltage V
GS
(V)
Drain–sourc e ON-resistance
R
DS (ON)
(Ω)
-10
-8
-6 -4
-2
0
0
20
10
5
15
Common Source
ID = -5 mA
Ta=100°C
25°C
-25°C
VGS = -1.2 V
-4 V
-2.5 V
-1.5 V
Common Source
Ta = 25°C
I
D
– V
GS
Gate–source voltage V
GS
(V)
Drain current I
D
(mA)
-0.01
0
-1
-1000
-2 -1
-0.1
-10
-100
R
DS (ON)
– V
GS
Gate–source voltage V
GS
(V)
-10
-8
-6 -4
-2
0
0
0
−50
10
50 150
0
5
20
15
100
R
DS (ON)
– Ta
Ambient temperature Ta (°C)
Drain–sourc e ON-resistance
R
DS (ON)
(Ω)
−25°C
Ta = 100°C
25°C
Common Source
VDS = -3 V
-3
25°C
Ta=100°C
-25°C
5
10
15
-2.5 V, -50 mA
V
GS
=−1.2 V, ID=-2 mA
-4 V, -50 mA
-1.5 V, -5 mA
Common Source
Common Source
ID = -50 mA
Drain–sourc e ON-resistance
RDS (ON) (Ω)
SSM3J35CT
2015-09-29
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|Y
fs
| – I
D
I
DR
– V
DS
Drain current I
D
(mA)
Drain–sourc e voltage V
DS
(V)
Drain–sourc e voltage V
DS
(V)
Drain current I
D
(mA)
Drain reverse current I
DR
(mA)
Switching time t (ns)
10
-0.1
100
10000
1000
-100
-1 -10
-0.1
10
100
-100
-1 -10
0.01
0
1
1000
1.4 0.4
0.1
10
100
0.2 0.6 0.8 1 1.2
C – V
DS
t – I
D
1
Forward transf er admittance |Y
fs
| (mS)
Capacitance C (pF)
0
0
250
160 40
50
200
20 60 80 100 140 120
P
D
– Ta
Ambient temperature Ta (°C)
Drain Power Dissipation P
D
(mW)
V
th
– Ta
Ambient temperature Ta (°C)
Gate threshold voltage V
th
(V)
0
-0.4
-0.2
-1
-0.8
-0.6
Common Source
ID = -1 mA
VDS = -3 V
−50 50 150
0 100
Common Source
VGS = 0 V
G
D
S
IDR
Ciss
Crss
Coss
-1000
Common Source
VGS = 0 V
f = 1 MHz
Ta = 25°C
Ta=100°C
25°C
-25°C
100
150
tr
ton
tf
toff
Common Source
VDD = -3 V
VGS = 0 to -2.5 V
Ta = 25°C
1
-1
10
1000
100
-1000
-10
-100
Common Source
VDS = -3 V
Ta = 25°C
Mounted on FR4 board
(10 mm × 10 mm × 1.0 mm, Cu Pad: 100 mm2 )
SSM3J35CT
2015-09-29
5
RESTRICTIONS ON PRODUCT USE
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in this document, and related hardware, software and systems (collect i vely "Product " ) without notic e.
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responsibl e for compl ying with safety standards and for providing adequate designs and safeguards for their hardware, software and
systems which minimi ze risk and avoid situations in which a malfunction or fail ure of Product could cause loss of human life, bodily
injury or damage to property, including data loss or corruption. Before c ust om ers use the Product, create designs including t he
Product, or incorporat e the Product into thei r own applicati ons, c ustomers must also refer to and comply with (a) the latest ver sions of
all relevant TOSHIBA information, including without limi tation, this document, the specific at i ons, t he data sheets and application notes
for Product and the precautions and conditions set forth in the "TOSHIBA Semiconductor Reliability Handbook" and (b) the
instruct i ons for the applicati on with which the Product will be used with or for. Cust omers are solely responsi bl e for all aspects of their
own product design or applications, includi ng but not limit ed to (a) determini ng the appropriateness of the use of this Product in suc h
design or applications; (b) evaluating and determining the applicability of any information contained in this document, or in charts,
diagrams, programs, al gorithms , sample application circuits, or any other referenced documents; and (c) validating all operating
parameters for such designs and applications. TOSHIBA ASSUMES NO LIABILITY FOR CUSTOMERS' PRODUCT DESIGN OR
APPLICATIONS.
• PRODUCT IS NEI THE R INTENDE D NO R WARRANTED FOR USE IN EQUIPMENTS OR SYSTEMS THAT REQ UIRE
EXTRAORDINARILY HIGH LEVELS OF QUALITY AND/OR RELIABILITY, AND/OR A MAL FUNCTION OR FAILURE OF WHICH
MAY CAUSE LOSS OF HUM AN LIFE, BO DILY INJURY, SE RIOUS PROPERTY DAMAGE AND/OR SERIOUS PUBLI C IMPACT
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limitation, equipment used in nuclear facilities, equi pm ent used in the aerospace industry, medical equipment, equipment us ed for
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Please use Product in compliance with all applicabl e l aws and regulations t hat regulate the inclusion or use of controlled substances,
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