REJ03D0907-0100 Rev.1.00 Feb 22, 2008
Page 1 of 14
HA1630S07
Single CMOS High Drive Operational Amplifier REJ03D0907-0100
Rev.1.00
Feb 22, 2008
Description
HA1630S07 is a low power single CMOS operational amplifier featuring high output current with typical current
supply of 60 µA (2.7 V to 5.5 V). This IC designed to operate from a single power supply and have full swing outputs.
Available in CMPAK-5 and MPAK-5 package, the miniature size of this IC not only allows compact integration in
portable devices but also minimizes distance of signal sources (sensors), thus reducing external noise pick up prior to
amplification. This IC exhibit excellent current drive-power ratio capable of 2 kΩ load driving and yet resistant to
oscillation for capacitive loads up to 200 pF.
Features
• Low supply current IDD = 60 µA Typ (VDD = 3 V, RL = No load)
• Low voltage operation VDD = 2.7 V to 5.5 V
• Low input offset voltage VIO = 6 mV Max
• Low input bias current IIB = 1 pA Typ
• High output current IOSOURCE = 15 mA Typ (VDD = 3.0 V, VOH = 2.5 V)
I
OSINK = 15 mA Typ (VDD = 3.0 V, VOL = 0.5 V)
• Input common voltage range includes ground
Ordering Information
Part No. Package Name Package Code
HA1630S07CM CMPAK-5 PTSP0005ZC-A
HA1630S07LP MPAK-5 PLSP0005ZB-A
HA1630D07
REJ03D0907-0100 Rev.1.00 Feb 22, 2008
Page 2 of 14
Pin Arrangement
VDD VOUT
VIN(+) VIN(–)
54
1
VSS
3
2
−+
(Top view)
Equivalent Circuit
V
DD
V
SS
Vbias2
Vbias1 Vbias3
V
IN(–)
V
IN(+)
V
OUT
HA1630D07
REJ03D0907-0100 Rev.1.00 Feb 22, 2008
Page 3 of 14
Absolute Maximum Ratings
(Ta = 25°C)
Item Symbol Ratings Unit Note
Supply voltage VDD 7.0 V
Differential input voltage VIN(diff) –VDD to +VDD V 1
Input voltage VIN –0.1 to +VDD V
Output current IOUT 40 mA
80 (CMPAK-5) Power dissipation PT 120 (MPAK-5) mW 2
Operating temperature Topr –40 to +85 °C
Storage temperature Tstg –55 to +125 °C
Note: 1. Do not apply input voltage exceeding VDD or 7 V.
2. If Ta > 25°C,
CMPAK-5: –0.8 mW/°C
MPAK-5: –1.2 mW/°C
Electrical Characteristics
DC Characteristics
(Ta = 25°C, VDD = 3.0 V, VSS = 0 V)
Item Symbol Min Typ Max Unit Test Conditions
Input offset voltage VIO — — 6 mV VIN = 1.5 V, RL = 1 MΩ
Input bias current IIB — (1) — pA VIN = 1.5 V
Input offset current IIO — (1) — pA VIN = 1.5 V
Common mode input voltage range VCM –0.1 — 1.8 V
Supply current IDD — 60 170 µA VIN(+) = 1.0 V, RL = ∞
Output source current IOSOURCE 7.5 15 — mA VOUT = 2.5 V
Output sink current IOSINK 7.5 15 — mA VOUT = 0.5 V
Open loop voltage gain AV 55 80 — dB RL = 100 kΩ
Common mode rejection ratio CMRR 50 80 — dB VIN1 = 0 V, VIN2 = 1.8 V
Power supply rejection ratio PSRR 55 80 — dB VDD1 = 2.7 V, VDD2 = 5.5 V
Output high voltage VOH 2.9 — — V RL = 2 kΩ to VSS
Output low voltage VOL — — 0.1 V RL = 2 kΩ to VDD
Note: ( ) : Design specification
AC Characteristics
(Ta = 25°C, VDD = 3.0 V, VSS = 0 V)
Item Symbol Min Typ Max Unit Test Conditions
SRr — (1) — Slew rate SRf — (1) —
V/µsVIN = 1.5 V, CL = 15 pF
(VINL = 0.2 V, VINH = 1.7 V)
Gain bandwidth product GBW — (1.5) — MHz VIN = 1.5 V, CL = 15 pF
Note: ( ) : Design specification
HA1630D07
REJ03D0907-0100 Rev.1.00 Feb 22, 2008
Page 4 of 14
Table of Graphs
Electrical Characteristics Characteristic
Curves Test
Circuit No.
vs. Supply voltage 1 1 Supply current IDD vs. Temperature 2 1
Output high voltage VOH vs. Rload 3 2
Output low voltage VOL vs. Rload 4 3
vs. Output high voltage 5 4 Output source current IOSOURCE vs. Temperature 6 4
vs. Output low voltage 7 5 Output sink current IOSINK vs. Temperature 8 5
vs. Supply voltage 9 6
vs. Input voltage 10 6
Input offset voltage VIO
vs. Temperature 11 7
vs. Supply voltage 12 8 Common mode input voltage range VCM vs. Temperature 13 8
Common mode rejection ratio CMRR vs. Input voltage 14 9
Power supply rejection ratio PSRR vs. Supply voltage 15 10
vs. Input voltage 16 11, 12 Input bias current IIB vs. Temperature 17 11, 12
vs. Cload 18 13
vs. Temperature 19 13
Slew rate (rising) SRr
Time waveform 20 13
vs. Cload 21 13
vs. Temperature 22 13
Slew rate (falling) SRf
Time waveform 23 13
vs. Rload 24 14 Open loop gain AV vs. Frequency 25, 26 14
Phase margin PM vs. Cload 27 14
Noise input voltage VNI vs. Frequency 28 15
HA1630D07
REJ03D0907-0100 Rev.1.00 Feb 22, 2008
Page 5 of 14
Test Circuits
(Unless otherwise noted, VDD = 3 V, VSS = 0 V, Ta = 25°C)
1. Supply Current, I
DD
A
−
+
1 V
V
DD
2. Output High Voltage, V
OH
V
−
+
1 V R
LOAD
= 2 kΩ
V
DD
3. Output Low Voltage, V
OL
1 V
V
−
+
R
LOAD
= 2 kΩ
V
DD
4. Output Source Current, I
OSOURCE
−
+
1 V
V
DD
A
V
OUT
5. Output Sink Current, I
OSINK
−
+V
DD
A
V
OUT
1 V
6. Input Offset Voltage vs. Operating Voltage
V
−
+V
DD
V
OUT
1 kΩ
1 kΩ
V
DD
/2
1 MΩ
1 MΩ
7. Input Offset Voltage, V
IO
1 MΩ
V
−
+1.5 V
V
IO
= V
OUT
/ 1001
V
OUT
1 kΩ
1 kΩ
1 MΩ
–1.5 V
V
IO
= V
OUT
/ 1001
8. Common Mode Input Voltage Range, V
CM
Note:
V
CML
and V
CMH
are values
of V
IN
when V
IO
changes
more than 50 dB taking
V
IN
= 0 V as reference.
V
−
+V
DD
V
OUT
1 kΩ
1 kΩ
V
IN
1 MΩ
1 MΩ
1.5 V
V
IO
V
IN
V
IN
= 0 V
V
CMH
V
CML
HA1630D07
REJ03D0907-0100 Rev.1.00 Feb 22, 2008
Page 6 of 14
Test Circuits (cont.)
(Unless otherwise noted, VDD = 3 V, VSS = 0 V, Ta = 25°C)
13. Slew Rate (Large Signal Input)
10. Power Supply Rejection Ratio, PSRR
11. Input Bias Current, I
IB+
9. Common Mode Rejection Ratio, CMRR
1 MΩ
V
−
+1.5 V
V
OUT
1 kΩ
1 kΩ
V
IN
1 MΩ
–1.5 V
1 MΩ
V
−
+V
DD
/2
V
OUT
1 kΩ
1 kΩ
1 MΩ
–V
DD
/2
−
+V
DD
V
IN
A
12. Input Bias Current, I
IB–
V
IN
−
+V
DD
A
−
+
1.7 V – 0.2 V V
DD
V
V
OUT
50 Ω15 pF
V
IN
V
OUT
∆t
tr
∆V
tr
SRr = ∆V
tr
/ ∆t
tr
SRf = ∆V
tf
/ ∆t
tf
∆V
tf
∆t
tf
10%
90% 90%
10%
V
IN
Measure
Point
V
OUT1
Calculate
V
IO
V
IO1
= V
OUT1
/ 1001
CMRR Calculation
CMRR = 20log
10
|[V
IO2
– V
IO1
]|
0.3 – (–1.5 V)
–1.5 V
V
OUT2
V
IO2
= V
OUT2
/ 1001
0.3 V
V
DD
Measure
Point
V
OUT1
Calculate
V
IO
V
IO1
= V
OUT1
/ 1001
CMRR Calculation
PSRR = 20log
10
|[V
IO2
– V
IO1
]|
5.5 V – 2.7 V
2.7 V
V
OUT2
V
IO2
= V
OUT2
/ 1001
5.5 V
HA1630D07
REJ03D0907-0100 Rev.1.00 Feb 22, 2008
Page 7 of 14
Test Circuits (cont.)
(Unless otherwise noted, VDD = 3 V, VSS = 0 V, Ta = 25°C)
15. Noise Input Voltage, VNI
14. Open Loop Voltage Gain, A
V
V
−
+1.5 V
V
OUT
1 kΩ
1 MΩ
–1.5 V
50 Ω
V
−
+1.5 V
V
OUT
10 kΩ
1 MΩ
–1.5 V
10 to 100 MHz
–40 dBm
V
V
IN
A
V
= 20log
10
101 × |V
OUT
|
|V
IN
|
VNI = V
OUT
1001
HA1630D07
REJ03D0907-0100 Rev.1.00 Feb 22, 2008
Page 8 of 14
Characteristic Curves
Figure 1 HA1630S07
Supply Current vs. Supply Voltage
Figure 3 HA1630S07
Output High Voltage vs. Resistor Load
23456
100 1 k 10 k 100 k
Supply Voltage, V
DD
(V)
Resistor Load, R
L
(Ω)
Output High Voltage, V
OH
(V)
Figure 2 HA1630S07
Supply Current vs. Ambient Temperature
90
20
3.2
3.1
3.0
2.9
2.8
2.7
Output Source Current, I
OSOURCE
(mA)
30
25
20
15
10
5
Figure 5 HA1630S07
Output High Voltage vs. Output Source Current
0 1020304050
Output Source Current, I
OSOURCE
(mA)
Output High Voltage, V
OH
(V)
6
5
4
3
2
1
0
Figure 4 HA1630S07
Output Low Voltage vs. Resistor Load
Figure 6 HA1630S07
Output Source Current vs. Ambient Temperature
100 1 k 10 k 100 k
Resistor Load, R
L
(Ω)
Output Low Voltage, V
OL
(V)
0.3
0.2
0.1
0.0
–0.1
30
40
50
60
70
80
90
20
30
40
50
60
70
80
–50 –25 0 25 50 75 100
Ambient Temperature, Ta (°C)
–50 –25 0 25 50 75 100
Ambient Temperature, Ta (°C)
Supply Current, I
DD
(µA)
Supply Current, I
DD
(µA)
V
DD
= 3.0 V V
DD
= 3.0 V
V
DD
= 5.5 V
V
DD
= 5.5 V
V
DD
= 5.0 V
V
DD
= 3.0 V
V
DD
= 2.7 V
V
DD
= 2.7 V, 3.0 V
V
DD
= 3.0 V
HA1630D07
REJ03D0907-0100 Rev.1.00 Feb 22, 2008
Page 9 of 14
Characteristic Curves (cont.)
Figure 9 HA1630S07
Input Offset Voltage vs. Supply Voltage
23456
Supply Voltage, VDD (V)
6
–6
–4
–2
0
2
4
6
–6
–4
–2
0
2
4
Input Offset Voltage, VIO (mV)
Figure 12 HA1630S07
Common Mode Input Voltage vs. Supply Voltage
23456
Supply Voltage, VDD (V)
5
–2
–1
2
1
0
3
4
Common Mode
Input Voltage, VCM (V)
Figure 10 HA1630S07
Input Offset Voltage vs. Input Voltage
–2.5 –1.5 –0.5 0.5 1.5
Input Voltage, VIN (V)
15
–15
–10
–5
0
5
10
Input Offset Voltage, VIO (mV) Output Sink Current, IOSINK (mA)
30
25
20
15
10
5
Figure 8 HA1630S07
Output Sink Current vs. Ambient Temperature
–50 –25 0 25 50 75 100
Ambient Temperature, Ta (°C)
VDD = 3.0 V
Input Offset Voltage, VIO (mV)
Figure 11 HA1630S07
Input Offset Voltage vs. Ambient Temperature
–50 –25 0 25 50 75 100
Ambient Temperature, Ta (°C)
VDD = 2.7 V, 3.0 V, 5.5 V
VDD = 1.5 V, VSS = –1.5 V
VCM–
Common Mode
Input Voltage Range
VCM+
Figure 7 HA1630S07
Output Low Voltage vs. Output Sink Current
01020304050
Output Sink Current, IOSINK (mA)
Output Low Voltage, VOL (V)
3
2
1
0
VDD = 5.5 V
VDD = 5.0 V
VDD = 3.0 V
VDD = 2.7 V
HA1630D07
REJ03D0907-0100 Rev.1.00 Feb 22, 2008
Page 10 of 14
Characteristic Curves (cont.)
VDD = 3.0 V
Figure 13 HA1630S07
Common Mode Input Voltage vs. Ambient Temperature
–50–250 255075100
Ambient Temperature, Ta (°C)
3.0
–1.0
1.0
0.0
2.0
3.0
1.0
0.0
2.0
VCM–
Common Mode
Input Voltage Range
VCM+
Figure 15 HA1630S07
Power Supply Rejection Ratio vs. Supply Voltage
23456
Supply Voltage, VDD (V)
Figure 18 HA1630S07
Slew Rate (rising) vs. Capacitive Load
0 100 200 300 400
Capacitive Load, CL (pF)
Slew Rate (rising), SRr (V/µs)
Figure 16 HA1630S07
Input Bias Current vs. Input Voltage
0123
Input Voltage, VIN (V)
100
–100
–50
0
50
100
–100
–50
0
50
Input Bias Current, IIB (pA)
120
100
80
60
40
20
0
Figure 14 HA1630S07
Common Mode Rejection Ratio vs. Input Voltage
–2 –1 0 1
Input Voltage, VIN (V)
VDD = 1.5 V, VSS = –1.5 V
Input Bias Current, IIB (pA)
Figure 17 HA1630S07
Input Bias Current vs. Ambient Temperature
–50 –25 0 25 50 75 100
Ambient Temperature, Ta (°C)
VDD = 3.0 V
Common Mode
Input Voltage, VCM (V)
Common Mode
Rejection Ratio, CMRR (dB)
120
100
80
60
40
20
0
Power Supply
Rejection Ratio, PSRR (dB)
VDD = 3.0 V VDD = 3.0 V
HA1630D07
REJ03D0907-0100 Rev.1.00 Feb 22, 2008
Page 11 of 14
Characteristic Curves (cont.)
120
40
60
0
80
100
20
Figure 24 HA1630S07
Open Loop Gain vs. Resistor Load
Open Loop Gain, AV (dB)
3.0
0.0
1.0
2.0
Figure 21 HA1630S07
Slew Rate (falling) vs. Capacitive Load
0 100 200 30050 150 250 350 400
Capacitive Load, CL (pF)
Slew Rate (falling), SRf (V/µs)
Slew Rate (falling), SRf (V/µs)
3.0
1.0
0.0
2.0
Figure 19 HA1630S07
Slew Rate (rising) vs. Ambient Temperature
Slew Rate (rising), SRr (V/µs)
Figure 22 HA1630S07
Slew Rate (falling) vs. Ambient Temperature
Figure 20 HA1630S07
Slew Rate (rising)
Figure 23 HA1630S07
Slew Rate (falling)
–50 –25 0 25 50 75 100
Ambient Temperature, Ta (°C)
3.0
1.0
0.0
2.0
–50 –25 0 25 50 75 100
Ambient Temperature, Ta (°C)
VDD = 3.0 V
VDD = 2.7 V, 3.0 V, 5.5 V
VDD = 2.7 V, 3.0 V, 5.5 V
100 1 k 10 k 100 k
Resistor Load, RL (Ω)
SRr = 1.10 V/µs
SRf = 1.23 V/µs
VDD = 3.0 V
HA1630D07
REJ03D0907-0100 Rev.1.00 Feb 22, 2008
Page 12 of 14
Characteristic Curves (cont.)
V
DD
= 3.0 V
R
L
= 100 kΩ
Figure 25 HA1630S07
Open Loop Gain, Phase vs. Frequency
V
DD
= 3.0 V
C
L
= 400 pF
Figure 27 HA1630S07
Phase Margin vs. Capacitive Load
0 100 200 30050 150 250 350 400
Capacitive Load, C
L
(pF)
1.0
0.0
0.2
0.4
0.8
0.6
–100
–50
100
50
0
–100
–50
100
50
0
Open Loop Gain, A
V
(dB)
–90
270
90
0
180
Open Loop Gain, A
V
(dB)
Phase (deg.)
Phase (deg.)
–90
270
90
0
180
Phase Margin, PM (deg.)
Figure 26 HA1630S07
Open Loop Gain, Phase vs. Frequency
Noise Input Voltage, VNI (µV/√Hz)
Figure 28 HA1630S07
Noise Input Voltage vs. Frequency
10 100 1 k 10 k
Frequency, f (Hz)
10 100 1 k 10 k 100 k 1 M 10 M10 100 1 k 10 k 100 k 1 M 10 M Frequency, f (Hz)Frequency, f (Hz)
80
70
60
50
40
30
20
10
0
V
DD
= 3.0 V
V
DD
= 3.0 V
Gain
Phase
Gain
Phase
HA1630D07
REJ03D0907-0100 Rev.1.00 Feb 22, 2008
Page 13 of 14
Package Dimensions
e
A
EH
E
L
L
1
Q
c
D
b
AA
Pattern of terminal position areas
b
2
l
1
e
1
e
A
3
L
P
S
A
A
2
A
1
A
A
1
A
2
b
b
1
c
c
1
D
E
e
H
E
L
L
P
x
y
b
2
e
1
l
1
Q
0.8
0
0.8
0.15
0.1
1.8
1.15
1.8
0.3
0.2
0.22
0.25
0.9
0.13
0.11
2.0
1.25
0.65
2.1
1.5
0.25
1.1
0.1
1.0
0.3
0.2
0.15
2.2
1.35
2.4
0.7
L
1
0.1 0.5
0.6
0.05
0.05
0.35
0.9
Dimension in Millimeters
Reference
Symbol
Min Nom Max
A
3
AS
M
x
S
y
SC-88A 0.006g
MASS[Typ.]
CMPAK-5 / CMPAK-5VPTSP0005ZC-A
RENESAS CodeJEITA Package Code Previous Code
b
A-A Section
b
1
c
1
c
D
e
A
Qc
AA
b
xSA
A
A
2
A
1
M
E
L
H
E
L
1
L
P
A
3
yS
Pattern of terminal position areas
S
I
1
b
2
e
e
1
A
A1
A2
A3
b
c
D
E
e
HE
L
L1
LP
x
y
b2
e1
I1
Q
1.0
0
1.0
0.35
0.11
2.8
1.5
2.5
0.3
0.1
0.2
Min Nom
Dimension in Millimeters
Reference
Symbol Max
1.1
0.25
0.4
0.16
2.95
1.6
0.95
2.8
2.15
0.3
1.4
0.1
1.3
0.5
0.26
3.1
1.8
3.0
0.7
0.5
0.6
0.05
0.05
0.55
0.85
SC-74A 0.015g
MASS[Typ.]
MPAK-5 / MPAK-5VPLSP0005ZB-A
RENESAS CodeJEITA Package Code Previous Code
b
A-A Section
c
Package Name
MPAK-5
HA1630D07
REJ03D0907-0100 Rev.1.00 Feb 22, 2008
Page 14 of 14
Taping & Reel Specification
Package Code
Package
Ordering Unit
W P Ao Ko E F Maximum Storage No.
MPAK-5
MPAK-5
4 1.5 1.05 3,000 pcs/reel
W1 W2
11.4 9
3,000 pcs
8
CMPAK-5 11.4 98
Tape width
[Taping]
[Reel]
[Ordering Information]
8 3.3 3.3 1.75 3.5
CMPAK-5 4 1.1 1.05 3,000 pcs/reel8 2.25 2.45 1.75 3.5
Bo D1
Unit: mm
φ1.5
4.0
2.0
A
B
P
0
0
1
D
W
FE
K
0
Cover
tape
Tape withdraw direction
φ13 ± 0.5
φ178 ± 2
11.4
9.0
4 ± 0.5
120°
2.0
±
0.5
Mark Indication
1 G 1 G
Trace Code Trace Code
• MPAK-5 • CMPAK-5
Notes:
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10. Although Renesas endeavors to improve the quality and reliability of its products, IC products have specific characteristics such as the occurrence of failure at a certain
rate and malfunctions under certain use conditions. Please be sure to implement safety measures to guard against the possibility of physical injury, and injury or damage
caused by fire in the event of the failure of a Renesas product, such as safety design for hardware and software including but not limited to redundancy, fire control and
malfunction prevention, appropriate treatment for aging degradation or any other applicable measures. Among others, since the evaluation of microcomputer software
alone is very difficult, please evaluate the safety of the final products or system manufactured by you.
11. In case Renesas products listed in this document are detached from the products to which the Renesas products are attached or affixed, the risk of accident such as
swallowing by infants and small children is very high. You should implement safety measures so that Renesas products may not be easily detached from your products.
Renesas shall have no liability for damages arising out of such detachment.
12. This document may not be reproduced or duplicated, in any form, in whole or in part, without prior written approval from Renesas.
13. Please contact a Renesas sales office if you have any questions regarding the information contained in this document, Renesas semiconductor products, or if you have
any other inquiries.
Sales Strategic Planning Div. Nippon Bldg., 2-6-2, Ohte-machi, Chiyoda-ku, Tokyo 100-0004, Japan
http://www.renesas.com
Refer to "http://www.renesas.com/en/network" for the latest and detailed information.
Renesas Technology America, Inc.
450 Holger Way, San Jose, CA 95134-1368, U.S.A
Tel: <1> (408) 382-7500, Fax: <1> (408) 382-7501
Renesas Technology Europe Limited
Dukes Meadow, Millboard Road, Bourne End, Buckinghamshire, SL8 5FH, U.K.
Tel: <44> (1628) 585-100, Fax: <44> (1628) 585-900
Renesas Technology (Shanghai) Co., Ltd.
Unit 204, 205, AZIACenter, No.1233 Lujiazui Ring Rd, Pudong District, Shanghai, China 200120
Tel: <86> (21) 5877-1818, Fax: <86> (21) 6887-7858/7898
Renesas Technology Hong Kong Ltd.
7th Floor, North Tower, World Finance Centre, Harbour City, Canton Road, Tsimshatsui, Kowloon, Hong Kong
Tel: <852> 2265-6688, Fax: <852> 2377-3473
Renesas Technology Taiwan Co., Ltd.
10th Floor, No.99, Fushing North Road, Taipei, Taiwan
Tel: <886> (2) 2715-2888, Fax: <886> (2) 3518-3399
Renesas Technology Singapore Pte. Ltd.
1 Harbour Front Avenue, #06-10, Keppel Bay Tower, Singapore 098632
Tel: <65> 6213-0200, Fax: <65> 6278-8001
Renesas Technology Korea Co., Ltd.
Kukje Center Bldg. 18th Fl., 191, 2-ka, Hangang-ro, Yongsan-ku, Seoul 140-702, Korea
Tel: <82> (2) 796-3115, Fax: <82> (2) 796-2145
Renesas Technology Malaysia Sdn. Bhd
Unit 906, Block B, Menara Amcorp, Amcorp Trade Centre, No.18, Jln Persiaran Barat, 46050 Petaling Jaya, Selangor Darul Ehsan, Malaysia
Tel: <603> 7955-9390, Fax: <603> 7955-9510
RENESAS SALES OFFICES
© 2008. Renesas Technology Corp., All rights reserved. Printed in Japan.
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