© 2003 Fairchild Semiconductor Corporation DS005985 www.fairchildsemi.com
October 1987
Revised September 2003
CD40106BC Hex Schmitt Trigger
CD40106BC
Hex Schmitt Trigger
General Description
The CD40106BC Hex Schmitt Trigger is a monolithic com-
plementary MOS (CMOS) integrated circuit constructed
with N and P-channel enhancement tra nsistors. The posi-
tive and negative-going threshold voltages, VT+ and VT−,
show low variation with respect to temperature (typ
0.0005V/°C at VDD = 10V), and hyst ere si s, V T+ − VT− ≥ 0.2
VDD is guaranteed.
All inputs are protected from damage due to static dis-
charge by diode clamps to VDD and VSS.
Features
■Wide supply voltage range: 3V to 15V
■High noise immun ity: 0 .7 VDD (typ.)
■Low power TTL compatibility:
Fan out of 2 driving 74L or 1 driving 74LS
■Hysteresis: 0.4 VDD (typ.),
0.2 VDD guaranteed
■Equivalent to MM74C14
Ordering Code:
Devices also available in Tape and R eel. Speci fy by append ing the suffix let t er “X” to the o r dering code.
Connection Diagram
Top View
Schematic Diagram
Order Num b er Packa ge Num ber Packag e Descr ip tio n
CD40106BCM M14A 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
CD40106BCN N14A 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
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CD40106BC
Absolute Maximum Ratings(Note 1)
(Note 2) Recommended Operating
Conditions (N ote 2)
Note 1: “Absolute Maximum Ratings” are those values beyond which the
safety of the device cannot be guaranteed. They are not meant to imply
that the devic es should be opera ted at these limits. The table of “Recom-
mended Operating Conditions” and “Electrical Characteristics” provides
conditions for act ual devi c e operation.
Note 2: VSS = 0V unless otherwise specified.
DC Electrical Characteristics (Note 3)
Note 3: IOH and IOL are tes t ed one output at a t ime.
DC Supply Voltage (VDD)−0.5 to +18 VDC
Input Voltage (VIN)−0.5 to VDD +0.5 VDC
Stora ge Temper atu re R ang e (TS)−65°C to +150°C
Power Di ssipa ti on (PD)
Dual-In- Li ne 700 mW
Small Outline 500 mW
Lead Temperature (TL)
(Solde ring, 10 seconds) 26 0°C
DC Supply Voltage (VDD) 3 to 15 VDC
Input Voltage (VIN)0 to V
DD VDC
Operati ng Temperature Range (TA)−55°C to +125°C
Symbol Parameter Conditions −55°C+25°C+125°CUnits
Min Max Min Typ Max Min Max
IDD Quiescent Device Current VDD = 5V 1.0 1.0 30 µAVDD = 10V 2.0 2.0 60
VDD = 15V 4.0 4.0 120
VOL LOW Level Output |IO| < 1 µA
V
Voltage VDD = 5V 0.05 0.05 0.05
VDD = 10V 0.05 0.05 0.05
VDD = 15V 0.05 0.05 0.05
VOH HIGH Level Output |IO| < 1 µA
V
Voltage VDD = 5V 4.95 4.95 5 4.95
VDD = 10V 9.95 9.95 10 0.95
VDD = 15V 14.95 14.95 15 14.95
VT−Negative-Going Threshold VDD = 5V, VO = 4.5V 0.7 2.0 0.7 1.4 2.0 0.7 2.0 VVoltage VDD = 10V, VO = 9V 1.4 4.0 1.4 3.2 4.0 1.4 4.0
VDD = 15V, VO = 13.5V 2.1 6.0 2.1 5.0 6.0 2.1 6.0
VT+Positive-Going Threshold VDD = 5V, VO = 0.5V 3.0 4.3 3.0 3.6 4.3 3.0 4.3 VVoltage VDD = 10V, VO = 1V 6.0 8.6 6.0 6.8 8.6 6.0 8.6
VDD = 15V, VO = 1.5V 9.0 12.9 9.0 10.0 12.9 9.0 12.9
VHHysteresis (VT+ − VT−)V
DD = 5V 1.0 3.6 1.0 2.2 3.6 1.0 3.6 VVoltage VDD = 10V 2.0 7.2 2.0 3.6 7.2 2.0 7.2
VDD = 15V 3.0 10.8 3.0 5.0 10.8 3.0 10.8
IOL LOW Level Output VDD = 5V, VO = 0.4V 0.64 0.51 0.88 0.36 mACurrent (Note 3) VDD = 10V, VO = 0.5V 1.6 1.3 2.25 0.9
VDD = 15V, VO = 1.5V 4.2 3.4 8.8 2.4
IOH HIGH Level Output VDD = 5V, VO = 4.6V −0.64 −0.51 −0.88 −0.36 mACurrent (Note 3) VDD = 10V, VO = 9.5V −1.6 −1.3 −2.25 −0.9
VDD = 15V, VO = 13.5V −4.2 −3.4 −8.8 −2.4
IIN Input Current VDD = 15V, VIN = 0V −0.1 −10−5−0.1 −1.0 µA
VDD = 15V, VIN = 15V 0.1 10−50.1 1.0
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CD40106BC
AC Electrical Characteristics (Note 4)
TA = 25°C, CL = 50 pF, RL = 200k, tr and tf = 20 ns, unless otherwise specified
Note 4: AC Paramet ers are guaranteed by DC co rrelated te s tin g.
Note 5: CPD dete rm ines th e no l oad ac power c onsum pti on of any C MOS devic e. For co mp l ete explanation s ee 74 C Family Ch arac t erist ics Application Note,
AN-90.
Switching Time Waveforms
tr = tf = 20 ns
Typical Applications
Low Power Oscillator
Note: The equations ass ume
t1 + t2 >> tPHL + tPLH
Symbol Parameter Conditions Min Typ Max Units
tPHL or tPLH Propagation Delay Time from VDD = 5V 220 400 nsInput to Output VDD = 10V 80 200
VDD = 15V 70 160
tTHL or tTLH Transition Time VDD = 5V 100 200 nsVDD = 10V 50 100
VDD = 15V 40 80
CIN Average Input Capacitance Any Input 5 7.5 pF
CPD Power Dissipation Capacity Any Gate (Note 5) 14 pF
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CD40106BC
Typical Performance Characteristics
Typical Transf er
Characteristics
Guaranteed
Guaranteed
Trip Point Range
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CD40106BC
Physical Dimensions inches (millimeters) unless otherwise noted
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
Package Number M14A
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CD40106BC Hex Schmitt Trigger
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
Package Number N14A
Fairchild does not assu me any responsibility for use of any circuitry de scribed, no circuit patent licenses are implied and
Fairchild reserves the right at any time without notice to change said circuitry and specifications.
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FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD
SEMICONDUCTOR CORPORATION. As used herein:
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which, (a) are intended for surgical implant into the
body, or (b) support or sustain life, and (c) whose failure
to perform when properly used in accordance with
instructions for use provided in the labeling, can be rea-
sonably expected to result in a significant injury to the
user.
2. A critical compon ent i n any compon ent of a lif e supp ort
device or system whose failure to perform can be rea-
sonabl y ex pect ed to ca use the fa ilu re of the li fe su pp ort
device or system, or to affect its safety or effectiveness.
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