IRL1404PBF - INTERNATIONAL RECTIFIER

IRL1404PbF

HEXFET® Power MOSFET

Seventh Generation HEXFET® power MOSFETs from International

Rectifier utilize advanced processing techniques to achieve extremely

low on-resistance per silicon area. This benefit, combined with the fast

switching speed and ruggedized device design that HEXFET power

MOSFETs are well known for, provides the designer with an extremely

efficient and reliable device for use in a wide variety of applications.

The TO-220 package is universally preferred for all commercial-industrial

applications at power dissipation levels to approximately 50 watts. The

low thermal resistance and low package cost of the TO-220 contribute to

its wide acceptance throughout the industry.

Parameter Max. Units

ID @ TC = 25°C Continuous Drain Current, VGS @ 10V 160

ID @ TC = 100°C Continuous Drain Current, VGS @ 10V 110A

IDM Pulsed Drain Current 640

PD @TC = 25°C Power Dissipation 200 W

Linear Derating Factor 1.3 W/°C

VGS Gate-to-Source Voltage ± 20 V

EAS Single Pulse Avalanche Energy620 mJ

IAR Avalanche Current95 A

EAR Repetitive Avalanche Energy20 mJ

dv/dt Peak Diode Recovery dv/dt 5.0 V/ns

TJOperating Junction and -55 to + 175

TSTG Storage Temperature Range

Soldering Temperature, for 10 seconds 300 (1.6mm from case)

°C

Mounting torque, 6-32 or M3 srew 10 lbf•in (1.1N•m)

Absolute Maximum Ratings

Thermal Resistance

VDSS = 40V

RDS(on) = 4.0mΩ

ID = 160A

lAdvanced Process Technology

lUltra Low On-Resistance

lDynamic dv/dt Rating

l175°C Operating Temperature

lFast Switching

lFully Avalanche Rated

lLead-Free

Description

09/27/10

www.irf.com 1

Parameter Typ. Max. Units

RθJC Junction-to-Case ––– 0.75

RθCS Case-to-Sink, Flat, Greased Surface 0.50 ––– °C/W

RθJA Junction-to-Ambient (PCB Mounted)––– 62

TO-220AB

PD - 95588A

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Parameter Min. Typ. Max. Units Conditions

V(BR)DSS Drain-to-Source Breakdown Voltage 40 ––– ––– V VGS = 0V, ID = 250µA

∆V(BR)DSS/∆TJBreakdown Voltage Temp. Coefficient ––– 0.038 ––– V/°C Reference to 25°C, ID = 1mA

––– ––– 4.0 VGS = 10V, ID = 95A 

––– ––– 5.9 VGS = 4.3V, ID = 40A 

VGS(th) Gate Threshold Voltage 1.0 ––– 3.0 V VDS = VGS, ID = 250µA

gfs Forward Transconductance 93 ––– ––– S VDS = 25V, ID = 95A

––– ––– 20 µA VDS = 40V, VGS = 0V

––– ––– 250 VDS = 32V, VGS = 0V, TJ = 150°C

Gate-to-Source Forward Leakage ––– ––– 200 VGS = 20V

Gate-to-Source Reverse Leakage ––– ––– -200 nA VGS = -20V

QgTotal Gate Charge ––– ––– 140 ID = 95A

Qgs Gate-to-Source Charge ––– ––– 48 nC VDS = 32V

Qgd Gate-to-Drain ("Miller") Charge ––– ––– 60 VGS = 5.0V, See Fig. 6 

td(on) Turn-On Delay Time ––– 18 ––– VDD = 20V

trRise Time ––– 270 ––– ID = 95A

td(off) Turn-Off Delay Time ––– 38 ––– RG = 2.5Ω VGS = 4.5V

tfFall Time ––– 37 ––– RD = 0.25Ω 

Between lead,

––– ––– 6mm (0.25in.)

from package

and center of die contact

Ciss Input Capacitance ––– 6590 ––– VGS = 0V

Coss Output Capacitance ––– 1710 ––– pF VDS = 25V

Crss Reverse Transfer Capacitance ––– 350 ––– ƒ = 1.0MHz, See Fig. 5

Coss Output Capacitance ––– 6650 ––– VGS = 0V, VDS = 1.0V, ƒ = 1.0MHz

Coss Output Capacitance ––– 1510 ––– VGS = 0V, VDS = 32V, ƒ = 1.0MHz

Coss eff. Effective Output Capacitance ––– 1480 ––– VGS = 0V, VDS = 0V to 32V

Electrical Characteristics @ TJ = 25°C (unless otherwise specified)

LDInternal Drain Inductance

LSInternal Source Inductance ––– –––

IGSS

4.5

7.5

IDSS Drain-to-Source Leakage Current

Parameter Min. Typ. Max. Units Conditions

ISContinuous Source Current MOSFET symbol

(Body Diode) ––– ––– showing the

ISM Pulsed Source Current integral reverse

(Body Diode) ––– ––– p-n junction diode.

VSD Diode Forward Voltage ––– ––– 1.3 V TJ = 25°C, IS = 95A, VGS = 0V 

trr Reverse Recovery Time ––– 63 94 ns TJ = 25°C, IF = 95A

Qrr Reverse RecoveryCharge ––– 170 250 nC di/dt = 100A/µs 

ton Forward Turn-On Time Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)

Source-Drain Ratings and Characteristics

160

640

 Repetitive rating; pulse width limited by

max. junction temperature. ( See fig. 11).

 Starting TJ = 25°C, L = 0.35mH

RG = 25Ω, IAS = 95A. (See Figure 12).

ISD ≤ 95A, di/dt ≤ 160A/µs, VDD ≤ V(BR)DSS,

TJ ≤ 175°C.

 Pulse width ≤ 300µs; duty cycle ≤ 2%.

Notes:

 Coss eff. is a fixed capacitance that gives the same charging time

as Coss while VDS is rising from 0 to 80% VDSS.

 Calculated continuous current based on maximum allowable

junction temperature; for recommended current-handing of the

package refer to Design Tip # 93-4.

 Calculated continuous current based on maximum allowable

junction temperature. Package limitation current is 75A.

mΩ

RDS(on) Static Drain-to-Source On-Resistance

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Fig 4. Normalized On-Resistance

Vs. Temperature

Fig 2. Typical Output CharacteristicsFig 1. Typical Output Characteristics

Fig 3. Typical Transfer Characteristics

-60 -40 -20 020 40 60 80 100 120 140 160 180

0.0

0.5

1.0

1.5

2.0

2.5

T , Junction Temperature ( C)

R , Drain-to-Source On Resistance

(Normalized)

DS(on)

V =

I =

10V

160A

100

1000

0.1 1 10 100

20µs PULSE WIDTH

T = 25 C

J°

TOP

BOTTOM

VGS

15V

10V

8.0V

7.0V

6.0V

5.5V

5.0V

4.3V

V , Drain-to-Source Voltage (V)

I , Drain-to-Source Current (A)

4.3V

100

1000

0.1 1 10 100

20µs PULSE WIDTH

T = 175 C

J°

TOP

BOTTOM

VGS

15V

10V

8.0V

7.0V

6.0V

5.5V

5.0V

4.3V

V , Drain-to-Source Voltage (V)

I , Drain-to-Source Current (A)

4.3V

100

1000

4.0 5.0 6.0 7.0 8.0

V = 15V

20µs PULSE WIDTH

V , Gate-to-Source Voltage (V)

I , Drain-to-Source Current (A)

T = 25 C

J°

T = 175 C

J°

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Fig 8. Maximum Safe Operating Area

Fig 6. Typical Gate Charge Vs.

Gate-to-Source Voltage

Fig 5. Typical Capacitance Vs.

Drain-to-Source Voltage

Fig 7. Typical Source-Drain Diode

Forward Voltage

1 10 100

2000

4000

6000

8000

10000

V , Drain-to-Source Voltage (V)

C, Capacitance (pF)

0V,

f = 1MHz

+ C

C SHORTED

iss gs gd , ds

rss gd

oss ds gd

Ciss

Coss

Crss

0100 200 300 400 500

Q , Total Gate Charge (nC)

V , Gate-to-Source Voltage (V)

FOR TEST CIRCUIT

SEE FIGURE

I =

95A

V = 20V

V = 32V

100

1000

0.0 0.5 1.0 1.5 2.0 2.5 3.0

V ,Source-to-Drain Voltage (V)

I , Reverse Drain Current (A)

V = 0 V

T = 25 C

J°

T = 175 C

J°

100

1000

10000

1 10 100

OPERATION IN THIS AREA LIMITED

BY RDS(on)

Single Pulse

= 175 C

= 25 C

V , Drain-to-Source Voltage (V)

I , Drain Current (A)I , Drain Current (A)

10us

100us

1ms

10ms

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Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case

Fig 9. Maximum Drain Current Vs.

Case Temperature

VDS

90%

10%

VGS

d(on)

d(off)

VDS

Pulse Width ≤ 1 µs

Duty Factor ≤ 0.1 %

VGS

D.U.T.

10V

VDD

25 50 75 100 125 150 175

120

160

T , Case Temperature ( C)

I , Drain Current (A)

LIMITED BY PACKAGE

0.001

0.01

0.1

0.00001 0.0001 0.001 0.01 0.1 1

Notes:

1. Duty factor D = t / t

2. Peak T = P x Z + T

1 2

JDM thJC C

t , Rectangular Pulse Duration (sec)

Thermal Response (Z )

thJC

0.01

0.02

0.05

0.10

0.20

D = 0.50

SINGLE PULSE

(THERMAL RESPONSE)

IRL1404PbF

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Charge

D.U.T. V

3mA

.3µF

50KΩ

.2µF

12V

Current Regulator

Same Type as D.U.T.

Current Sampling Resistors

10 V

Fig 13b. Gate Charge Test Circuit

Fig 13a. Basic Gate Charge Waveform

Fig 12c. Maximum Avalanche Energy

Vs. Drain Current

Fig 12b. Unclamped Inductive Waveforms

Fig 12a. Unclamped Inductive Test Circuit

(BR)DSS

0.01

Ω

D.U.T

VDS

-V

DRIVER

15V

20V

25 50 75 100 125 150 175

300

600

900

1200

1500

Starting T , Junction Temperature( C)

E , Single Pulse Avalanche Energy (mJ)

TOP

BOTTOM

49A

101A

121A

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Peak Diode Recovery dv/dt Test Circuit

P.W. Period

di/dt

Diode Recovery

dv/dt

Ripple ≤5%

Body Diode Forward Drop

Re-Applied

Voltage

Reverse

Recovery

Current

Body Diode Forward

Current

=10V

Driver Gate Drive

D.U.T. I

Waveform

D.U.T. V

Waveform

Inductor Curent

D = P. W .

Period







VDD

• dv/dt controlled by RG

• ISD controlled by Duty Factor "D"

• D.U.T. - Device Under Test

D.U.T*Circuit Layout Considerations

• Low Stray Inductance

• Ground Plane

• Low Leakage Inductance

Current Transformer



* Reverse Polarity of D.U.T for P-Channel

VGS

[ ]

*** VGS = 5.0V for Logic Level and 3V Drive Devices

[ ] ***

Fig 14. For N-channel HEXFET® power MOSFETs

IRL1404PbF

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Data and specifications subject to change without notice.

This product has been designed and qualified for the Industrial market.

Qualification Standards can be found on IR’s Web site.

IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105

TAC Fax: (310) 252-7903

Visit us at www.irf.com for sales contact information.09/2010

TO-220AB Part Marking Information

TO-220AB Package Outline

Dimensions are shown in millimeters (inches)

LOT CODE 1789

EXAMPLE: T HIS IS AN IRF1010

Note: "P" in as sembly line position

indi cates "L ead - F r ee"

IN THE ASSEMBLY LINE "C"

AS S EMBL ED ON WW 19, 2000

INT ERNAT IONAL PART NUMBER

RECT IFIER

LOT CODE

ASSEMBLY

LOGO

YEAR 0 = 2000

DAT E CODE

WEEK 19

LINE C

Notes:

1. For an Automotive Qualified version of this part please seehttp://www.irf.com/product-info/auto/

2. For the most current drawing please refer to IR website at http://www.irf.com/package/