0.5
0.8
1
1.2
1.5
1.8
2
0 5 10 15 20 25 30 35
Input Voltage (V)
Ground Pin Current (µA)
TA = −40°C
TA = +25°C
TA = +85°C
TPS70912
G014
TPS709xx
EN
IN OUT
VIN VOUT
1 Fm2.2 Fm
GND
NC
Product
Folder
Sample &
Buy
Technical
Documents
Tools &
Software
Support &
Community
TPS709
SBVS186G –MARCH 2012–REVISED NOVEMBER 2015
TPS709 150-mA, 30-V, 1-µA I
Q
Voltage Regulators with Enable
1 Features 3 Description
The TPS709 series of linear regulators are ultralow,
1• Ultralow IQ: 1 μAquiescent current devices designed for power-
• Reverse Current Protection sensitive applications. A precision band-gap and error
• Low ISHUTDOWN: 150 nA amplifier provides 2% accuracy over temperature.
Quiescent current of only 1 µA makes these devices
• Input Voltage Range: 2.7 V to 30 V ideal solutions for battery-powered, always-on
• Supports 200-mA Peak Output systems that require very little idle-state power
• 2% Accuracy Over Temperature dissipation. These devices have thermal-shutdown,
current-limit, and reverse-current protections for
• Available in Fixed-Output Voltages: added safety.
1.2 V to 6.5 V
• Thermal Shutdown and Overcurrent Protection Shutdown mode is enabled by pulling the EN pin low.
The shutdown current in this mode goes down to 150
• Packages: SOT-23-5, WSON-6 nA, typical.
2 Applications The TPS709 series is available in WSON-6 and
SOT-23-5 packages.
• Zigbee™ Networks
• Home Automation Device Information(1)
• Metering PART NUMBER PACKAGE BODY SIZE (NOM)
• Weighing Scales SOT-23 (5) 2.90 mm × 1.60 mm
TPS709
• Portable Power Tools WSON (6) 2.00 mm × 2.00 mm
• Remote Control Devices (1) For all available packages, see the package option addendum
at the end of the datasheet.
• Wireless Handsets, Smart Phones, PDAs, WLAN,
and Other PC Add-On Cards
• White Goods
Typical Application Circuit GND Current vs VIN and Temperature
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
TPS709
SBVS186G –MARCH 2012–REVISED NOVEMBER 2015
www.ti.com
Table of Contents
1 Features.................................................................. 18 Application and Implementation ........................ 15
8.1 Application Information............................................ 15
2 Applications ........................................................... 18.2 Typical Application ................................................. 15
3 Description............................................................. 19 Power Supply Recommendations...................... 16
4 Revision History..................................................... 29.1 Power Dissipation ................................................... 16
5 Pin Configuration and Functions......................... 410 Layout................................................................... 17
6 Specifications......................................................... 510.1 Layout Guidelines ................................................. 17
6.1 Absolute Maximum Ratings ...................................... 510.2 Layout Example .................................................... 17
6.2 ESD Ratings.............................................................. 511 Device and Documentation Support................. 18
6.3 Recommended Operating Conditions....................... 511.1 Device Support...................................................... 18
6.4 Thermal Information.................................................. 511.2 Documentation Support ........................................ 18
6.5 Electrical Characteristics........................................... 611.3 Community Resources.......................................... 18
6.6 Typical Characteristics.............................................. 711.4 Trademarks........................................................... 19
7 Detailed Description............................................ 13 11.5 Electrostatic Discharge Caution............................ 19
7.1 Overview................................................................. 13 11.6 Glossary................................................................ 19
7.2 Functional Block Diagram....................................... 13 12 Mechanical, Packaging, and Orderable
7.3 Feature Description................................................. 13 Information........................................................... 19
7.4 Device Functional Modes........................................ 14
4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision F (December 2014) to Revision G Page
• Added DBV package for TPS709A to Pin Configurations and Functions section.................................................................. 4
• Added DBV package for TPS709B to Pin Configurations and Functions section.................................................................. 4
• Added TPS709A and TPS709B to Pin Functions table ......................................................................................................... 4
• Moved operating junction temperature from Electrical Characteristics to Recommended Operating Conditions ................. 5
Changes from Revision E (November 2013) to Revision F Page
• Changed title format to meet latest data sheet standards...................................................................................................... 1
• Added ESD Rating table, Feature Description section, Device Functional Modes,Application and Implementation
section, Power Supply Recommendations section, Layout section, Device and Documentation Support section, and
Mechanical, Packaging, and Orderable Information section.................................................................................................. 1
• Deleted SOT-223-4 package from document ........................................................................................................................ 1
• Deleted Low Dropout Features bullet .................................................................................................................................... 1
• Changed Packages Feature bullet: deleted SOT-223-4 and footnote .................................................................................. 1
• Deleted SOT-223-4 from last paragraph of Description section ........................................................................................... 1
• Deleted pinout graphics from page 1 .................................................................................................................................... 1
• Deleted DCY package and footnote from Pin Configurations section ................................................................................... 4
• Changed Pin Functions table: changed title and deleted DCY package................................................................................ 4
• Changed EN pin description in Pin Functions table .............................................................................................................. 4
• Deleted the word 'range' from the last 2 rows of the Absolute Maximum Ratings table........................................................ 5
• Deleted DCY column from Thermal Information table ........................................................................................................... 5
• Added description text to the enabled mode discussion in the Device Functional Modes section ..................................... 14
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SBVS186G –MARCH 2012–REVISED NOVEMBER 2015
Changes from Revision D (October 2013) to Revision E Page
• Changed DRV (SON-6) package status from Preview to Production Data............................................................................ 1
• Deleted SON-6 package from footnote 1 in Features section................................................................................................ 1
• Deleted DRV package from pinout diagram note................................................................................................................... 1
• Deleted DRV from pinout note in the Pin Configurations section........................................................................................... 4
Changes from Revision C (June 2013) to Revision D Page
• Changed device status from Production Data to Mixed Status.............................................................................................. 1
• Changed last Features bullet: added footnote and changed device order............................................................................. 1
• Added note to pinout diagrams............................................................................................................................................... 1
• Added product preview footnote to pin configurations ........................................................................................................... 4
Changes from Revision B (November 2012) to Revision C Page
• Added DCY (SOT-223) and DRV (SON) packages to data sheet......................................................................................... 1
• Changed IQfeature bullet value from 1.35 µA to 1 µA........................................................................................................... 1
• Changed quiescent current value in first paragraph of Description section from 1.35 µA to 1 µA ........................................ 1
• Changed text in second paragraph of Description section from "leakage" to "shutdown.".................................................... 1
• Added typical application circuit ............................................................................................................................................. 1
• Added DCY and DRV packages to Pin Configuration section .............................................................................................. 4
• Added DCY and DRV packages to Pin Descriptions table ................................................................................................... 4
• Added DRV and DCY packages to Thermal Information table.............................................................................................. 5
• Changed ground pin current typical values for IOUT = 0-mA test conditions........................................................................... 6
Changes from Revision A (October 2012) to Revision B Page
• Added Pin Configuration section............................................................................................................................................ 4
• Changed Line regulation and Load regulation parameters in Electrical Characteristics table............................................... 6
• Changed IGND parameter test conditions in Electrical Characteristics table........................................................................... 6
• Changed ISHUTDOWN parameter test conditions in Electrical Characteristics table.................................................................. 6
• Changed footnote 4 in Electrical Characteristics table........................................................................................................... 6
• Changed second paragraph of Dropout Voltage section ..................................................................................................... 13
Changes from Original (March 2012) to Revision A Page
• Changed device status from Product Preview to Production Data ........................................................................................ 1
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EN
NC
OUT
GND
IN
1
2
3
5
4
IN
NC
EN
6
5
4
OUT
NC
GND
1
2
3
GND
EN
NC
GND
IN
OUT
1
2
3
5
4
OUT
NC
IN
GND
EN
1
2
3
5
4
TPS709
SBVS186G –MARCH 2012–REVISED NOVEMBER 2015
www.ti.com
5 Pin Configuration and Functions
TPS709: DBV Package TPS709B: DBV Package
5-Pin SOT-23 5-Pin SOT-23
Top View Top View
TPS709A: DBV Package DRV Package
5-Pin SOT-23 6-Pin WSON
Top View Top View
Pin Functions
PIN
DRV DBV I/O DESCRIPTION
NAME TPS709 TPS709 TPS709A TPS709B
Enable pin. Drive this pin high to enable the device. Drive this pin low
to put the device into low current shutdown. This pin can be left
EN 4 3 5 5 I floating to enable the device. The maximum voltage must remain
below 6.5 V.
GND 3 2 2 1 — Ground
IN 6 1 3 2 I Unregulated input to the device
NC 2, 5 4 4 4 — No internal connection
Regulated output voltage. Connect a small 2.2-µF or greater ceramic
OUT 1 5 1 3 O capacitor from this pin to ground to assure stability.
The thermal pad is electrically connected to the GND node. Connect
Thermal pad — — — — this pad to the GND plane for improved thermal performance.
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SBVS186G –MARCH 2012–REVISED NOVEMBER 2015
6 Specifications
6.1 Absolute Maximum Ratings
specified at TJ= –40°C to 125°C (unless otherwise noted); all voltages are with respect to GND(1)
MIN MAX UNIT
VIN –0.3 32
Voltage VEN –0.3 7 V
VOUT –0.3 7
Maximum output current IOUT Internally limited
Output short-circuit duration Indefinite
Continuous total power dissipation PDISS See Thermal Information
Operating junction temperature, TJ–55 150 °C
Storage temperature, Tstg –55 150 °C
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended
Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
6.2 ESD Ratings VALUE UNIT
Human body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) ±2000
V(ESD) Electrostatic discharge V
Charged device model (CDM), per JEDEC specification JESD22-C101(2) ±500
(1) JEDEC document JEP155 states that 2-kV HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 500-V CDM allows safe manufacturing with a standard ESD control process.
6.3 Recommended Operating Conditions
over operating junction temperature range (unless otherwise noted) MIN NOM MAX UNIT
VIN Input voltage 2.7 30 V
VOUT Output voltage 1.2 6.5 V
VEN Enable voltage 0 6.5 V
TJOperating junction temperature –40 125 °C
6.4 Thermal Information TPS709
THERMAL METRIC(1) DBV DRV UNIT
5 PINS 6 PINS
RθJA Junction-to-ambient thermal resistance 212.1 73.1 °C/W
RθJC(top) Junction-to-case (top) thermal resistance 78.5 97.0 °C/W
RθJB Junction-to-board thermal resistance 39.5 42.6 °C/W
ψJT Junction-to-top characterization parameter 2.86 2.9 °C/W
ψJB Junction-to-board characterization parameter 38.7 42.9 °C/W
RθJC(bot) Junction-to-case (bottom) thermal resistance N/A 12.8 °C/W
(1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.
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6.5 Electrical Characteristics
At ambient temperature (TA) = –40°C to +85°C, VIN = VOUT(typ) + 1 V or 2.7 V (whichever is greater), IOUT = 1 mA, VEN = 2 V,
and CIN = COUT = 2.2-μF ceramic, unless otherwise noted. Typical values are at TA= 25°C.
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
VIN Input voltage range 2.7 30 V
VOUT Output voltage range 1.2 6.5 V
VOUT < 3.3 V –2% 2%
VOUT DC output accuracy VOUT ≥3.3 V –1% 1%
Line regulation (VOUT(nom) + 1 V, 2.7 V) ≤VIN ≤30 V 3 10
ΔVOUT mV
VIN = VOUT(typ) + 1.5 V or 3 V (whichever is
Load regulation 20 50
greater), 100 µA ≤IOUT ≤150 mA
TPS70933, IOUT = 50 mA 295 650
TPS70933, IOUT = 150 mA 960 1400
TPS70950, IOUT = 50 mA 245 500
VDO Dropout voltage(1)(2) mV
TPS70950, IOUT = 150 mA 690 1200
TPS70965, IOUT = 50 mA 180 500
TPS70965, IOUT = 150 mA 460 1000
I(CL) Output current limit(3) VOUT = 0.9 × VOUT(nom) 200 320 500 mA
IOUT = 0 mA, VOUT ≤3.3 V 1.3 2.05
IGND Ground pin current IOUT = 0 mA, VOUT > 3.3 V 1.4 2.25 µA
IOUT = 150 mA 350
ISHUTDOWN Shutdown current VEN ≤0.4 V, VIN = 2.7 V 150 nA
f = 10 Hz 80
PSRR Power-supply rejection ratio f = 100 Hz 62 dB
f = 1 kHz 52
BW = 10 Hz to 100 kHz, IOUT = 10 mA,
VnOutput noise voltage 190 μVRMS
VIN = 2.7 V, VOUT = 1.2 V
VOUT(nom) ≤3.3 V 200 600
tSTR Start-up time(4) µs
VOUT(nom) > 3.3 V 500 1500
Enable pin high (enabled) 0.9
VEN(HI) V
Enable pin high (disabled) 0 0.4
IEN EN pin current EN = 1.0 V, VIN = 5.5 V 300 nA
Reverse current VOUT = 3 V, VIN = VEN = 0 V 10
(flowing out of IN pin)
I(REV) nA
Reverse current VOUT = 3 V, VIN = VEN = 0 V 100
(flowing into OUT pin) Shutdown, temperature increasing 158
Thermal shutdown
tSD °C
temperature Reset, temperature decreasing 140
(1) VDO is measured with VIN = 0.98 × VOUT(nom).
(2) Dropout is only valid when VOUT ≥2.8 V because of the minimum input voltage limits.
(3) Measured with VIN = VOUT + 3 V for VOUT ≤2.5 V. Measured with VIN = VOUT + 2.5 V for VOUT > 2.5 V.
(4) Startup time = time from EN assertion to 0.95 × VOUT(nom) and load = 47 Ω.
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3.275
3.28
3.285
3.29
3.295
3.3
3.305
0 20 40 60 80 100 120 140 160
Output Current (mA)
Output Voltage (V)
TJ = −40°C
TJ = +25°C
TJ = +85°C
TJ = +125°C
TPS70933
G005
6.46
6.465
6.47
6.475
6.48
6.485
6.49
6.495
6.5
6.505
0 20 40 60 80 100 120 140 160
Output Current (mA)
Output Voltage (V)
TJ = −40°C
TJ = +25°C
TJ = +85°C
TJ = +125°C
TPS70965
G006
6.49
6.495
6.5
6.505
6.51
5 10 15 20 25 30
Input Voltage (V)
Output Voltage (V)
TJ = −40°C
TJ = +25°C
TJ = +85°C
TJ = +125°C
TPS70965
G003
1.18
1.185
1.19
1.195
1.2
1.205
0 20 40 60 80 100 120 140 160
Output Current (mA)
Output Voltage (V)
TJ = −40°C
TJ = +25°C
TJ = +85°C
TJ = +125°C
TPS70912
G004
1.195
1.2
1.205
0 5 10 15 20 25 30
Input Voltage (V)
Output Voltage (V)
TJ = −40°C
TJ = +25°C
TJ = +85°C
TJ = +125°C
TPS70912
G001
3.29
3.295
3.3
3.305
3.31
0 5 10 15 20 25 30
Input Voltage (V)
Output Voltage (V)
TJ = −40°C
TJ = +25°C
TJ = +85°C
TJ = +125°C
TPS70933
G002
TPS709
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SBVS186G –MARCH 2012–REVISED NOVEMBER 2015
6.6 Typical Characteristics
Over operating temperature range (TJ= –40°C to 125°C), IOUT = 10 mA, VEN = 2 V, COUT = 2.2 μF, and VIN = VOUT(typ) + 1 V or
2.7 V (whichever is greater), unless otherwise noted. Typical values are at TJ= 25°C.
Figure 1. 1.2-V Line Regulation vs VIN and Temperature Figure 2. 3.3-V Line Regulation vs VIN and Temperature
Figure 3. 6.5-V Line Regulation vs VIN and Temperature Figure 4. 1.2-V Load Regulation vs IOUT and Temperature
Figure 5. 3.3-V Load Regulation vs IOUT and Temperature Figure 6. 6.5-V Load Regulation vs IOUT and Temperature
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200
250
300
350
400
450
500
3 3.5 4 4.5 5 5.5 6 6.5 7
Input Voltage (V)
Current Limit (mA)
TJ = −40°C
TJ = +25°C
TJ = +85°C
TJ = +125°C
TPS70912
G011
300
350
400
450
500
5 5.5 6 6.5 7 7.5 8 8.5
Input Voltage (V)
Current Limit (mA)
TJ = −40°C
TJ = +25°C
TJ = +85°C
TJ = +125°C
TPS70933
G012
0
200
400
600
800
1000
1200
1400
1600
2.5 3.5 4.5 5.5 6.5
Input Voltage (V)
Dropout Voltage (mV)
TJ = −40°C
TJ = +25°C
TJ = +85°C
TJ = +125°C
TPS70965
IOUT = 150 mA
G009
0
200
400
600
800
1000
1200
1400
1600
0 20 40 60 80 100 120 140 160
Output Current (mA)
Dropout Voltage (mV)
TJ = −40°C
TJ = +25°C
TJ = +85°C
TJ = +125°C
TPS70965
G010
1.18
1.185
1.19
1.195
1.2
1.205
−50 −35 −20 −5 10 25 40 55 70 85 100 115 130
Junction Temperature (°C)
Output Voltage (V)
IOUT = 10 mA
IOUT = 150 mA
TPS70912
G007
6.465
6.47
6.475
6.48
6.485
6.49
6.495
6.5
6.505
−50 −35 −20 −5 10 25 40 55 70 85 100 115 130
Junction Temperature (°C)
Output Voltage (V)
IOUT = 10 mA
IOUT = 150 mA
TPS70965
G008
TPS709
SBVS186G –MARCH 2012–REVISED NOVEMBER 2015
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Typical Characteristics (continued)
Over operating temperature range (TJ= –40°C to 125°C), IOUT = 10 mA, VEN = 2 V, COUT = 2.2 μF, and VIN = VOUT(typ) + 1 V or
2.7 V (whichever is greater), unless otherwise noted. Typical values are at TJ= 25°C.
Figure 7. VOUT vs Temperature Figure 8. VOUT vs Temperature
Figure 9. Dropout Voltage vs VIN and Temperature Figure 10. Dropout Voltage vs IOUT and Temperature
Figure 11. 1.2-V Current Limit vs VIN and Temperature Figure 12. 3.3-V Current Limit vs VIN and Temperature
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0
0.1
0.2
0.3
0.4
0 5 10 15 20 25 30 35
Input Voltage (V)
Ground Pin Current (µA)
TA = −40°C
TA = +25°C
TA = +85°C
Shutdown Current
TPS70912
G016
0
20
40
60
80
100
10 100 1k 10k 100k 1M 10M
Frequency (Hz)
PSRR (dB)
VOUT = 2.8 V
VIN = 3.8 V
COUT = 2.2 µF
G017
0.5
0.75
1
1.25
1.5
1.75
2
2.25
2.5
0 5 10 15 20 25 30 35
Input Voltage (V)
Ground Pin Current (µA)
TA = −40°C
TA = +25°C
TA = +85°C
TPS70933
EN = open
G035
0
100
200
300
400
500
600
0 20 40 60 80 100 120 140 160
Output Current (mA)
Ground Pin Current (µA)
TA = −40°C
TA = +25°C
TA = +85°C
TPS70912
G015
300
350
400
450
500
8 8.5 9 9.5 10 10.5 11 11.5 12
Input Voltage (V)
Current Limit (mA)
TJ = −40°C
TJ = +25°C
TJ = +85°C
TJ = +125°C
TPS70965
G013
0.5
0.8
1
1.2
1.5
1.8
2
0 5 10 15 20 25 30 35
Input Voltage (V)
Ground Pin Current (µA)
TA = −40°C
TA = +25°C
TA = +85°C
TPS70912
G014
TPS709
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SBVS186G –MARCH 2012–REVISED NOVEMBER 2015
Typical Characteristics (continued)
Over operating temperature range (TJ= –40°C to 125°C), IOUT = 10 mA, VEN = 2 V, COUT = 2.2 μF, and VIN = VOUT(typ) + 1 V or
2.7 V (whichever is greater), unless otherwise noted. Typical values are at TJ= 25°C.
Figure 13. 6.5-V Current Limit vs VIN and Temperature Figure 14. GND Current vs VIN and Temperature
Figure 15. GND Current vs VIN and Temperature Figure 16. GND Current vs IOUT and Temperature
Figure 17. Shutdown Current vs VIN and Temperature Figure 18. Power-Supply Rejection Ratio vs Frequency
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Channel 4
(50 mA / div)
Channel 2
(200 mV / div)
Time (10 ms / div)
Channel 2 = V
Channel 4 = I
V = 2.7 V
OUT
OUT
IN
G022
Channel 4
(100 mA / div)
Channel 2
(200 mV / div)
Time (100 s / div)m
Channel 2 = V
4 = I
V = 2.7 V
OUT
OUT
IN
Channel
G023
Channel 4
(50 mA / div)
Channel 2
(200 mV / div)
Time (100 s / div)m
Channel 2 = V
Channel 4 = I
V = 2.7 V
OUT
OUT
IN
G020
Channel 4
(100 mA / div)
Channel 2
(200 mV / div)
Time (500 s / div)m
Channel 2 = V
Channel 4 = I
V = 2.7 V
OUT
OUT
IN
G021
0
1
2
3
4
5
6
7
10 100 1k 10k 100k
Frequency (Hz)
Voltage ( µV / Hz )
VOUT = 2.8 V
G018
100
110
120
130
140
−50 −35 −20 −5 10 25 40 55 70 85 100 115 130
Temperature (°C)
Time (µs)
TPS70912
G019
TPS709
SBVS186G –MARCH 2012–REVISED NOVEMBER 2015
www.ti.com
Typical Characteristics (continued)
Over operating temperature range (TJ= –40°C to 125°C), IOUT = 10 mA, VEN = 2 V, COUT = 2.2 μF, and VIN = VOUT(typ) + 1 V or
2.7 V (whichever is greater), unless otherwise noted. Typical values are at TJ= 25°C.
Figure 19. Noise Figure 20. Start-Up Time vs Temperature
Figure 21. TPS70912 Load Transient (0 mA to 50 mA) Figure 22. TPS70912 Load Transient (1 mA to 150 mA)
Figure 23. TPS70912 Load Transient (50 mA to 0 mA) Figure 24. TPS70912 Load Transient (50 mA to 150 mA)
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Channel 4
(2 V / div)
Channel 2
(50 mV / div)
Time (50 s / div)m
G028
Channel 2 = V
4 = V
I = 10 mA
OUT
IN
OUT
Channel
Channel 4
(2 V / div)
Channel 2
(50 mV / div)
Time (50 s / div)m
G029
Channel 2 = V
4 = V
I = 50 mA
OUT
IN
OUT
Channel
Channel 4
(50 mA / div)
Channel 2
(200 mV / div)
Time (10 ms / div)
Channel 2 = V
Channel 4 = I
V = 4.3 V
OUT
OUT
IN
G026
Channel 4
(50 mA / div)
Channel 2
(200 mV / div)
Time (500 s / div)m
Channel 2 = V
Channel 4 = I
V = 4.3 V
OUT
OUT
IN
G027
Channel 4
(50 mA / div)
Channel 2
(200 mV / div)
Time (100 s / div)m
Channel 2 = V
Channel 4 = I
V = 4.3 V
OUT
OUT
IN
G024
Channel 4
(100 mA / div)
Channel 2
(200 mV / div)
Time (500 s / div)m
Channel 2 = V
Channel 4 = I
V = 4.3 V
OUT
OUT
IN
G025
TPS709
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SBVS186G –MARCH 2012–REVISED NOVEMBER 2015
Typical Characteristics (continued)
Over operating temperature range (TJ= –40°C to 125°C), IOUT = 10 mA, VEN = 2 V, COUT = 2.2 μF, and VIN = VOUT(typ) + 1 V or
2.7 V (whichever is greater), unless otherwise noted. Typical values are at TJ= 25°C.
Figure 25. TPS70933 Load Transient (0 mA to 50 mA) Figure 26. TPS70933 Load Transient (1 mA to 150 mA)
Figure 27. TPS70933 Load Transient (50 mA to 0 mA) Figure 28. TPS70933 Load Transient (50 mA to 150 mA)
Figure 29. TPS70912 Line Transient (2.7 V to 3.7 V) Figure 30. TPS70912 Line Transient (2.7 V to 3.7 V)
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Channel 2
(1 V / div)
Channel 1
(1 V / div)
Time (500 ms / div)
G034
Channel 1 = V
2 = V
I = 150 mA
TPS70933
IN
OUT
Channel OUT
Channel 2
(1 V / div)
Channel 1
(500 mV / div)
Time (50 s / div)m
G032
Channel 1 = EN
2 = V
V = 4.3 V
C = 2.2 F
TPS70933
Channel OUT
IN
OUT m
Channel 2
(1 V / div)
Channel 1
(1 V / div)
Time (500 ms / div)
G033
Channel 1 = V
2 = V
I = 3 mA
TPS70933
IN
OUT
Channel OUT
Channel 4
(2 V / div)
Channel 2
(50 mV / div)
Time (50 s / div)m
G030
Channel 2 = V
4 = V
I = 10 mA
OUT
IN
OUT
Channel
Channel 4
(2 V / div)
Channel 2
(50 mV / div)
Time (50 s / div)m
G031
Channel 2 = V
4 = V
I = 50 mA
OUT
IN
OUT
Channel
TPS709
SBVS186G –MARCH 2012–REVISED NOVEMBER 2015
www.ti.com
Typical Characteristics (continued)
Over operating temperature range (TJ= –40°C to 125°C), IOUT = 10 mA, VEN = 2 V, COUT = 2.2 μF, and VIN = VOUT(typ) + 1 V or
2.7 V (whichever is greater), unless otherwise noted. Typical values are at TJ= 25°C.
Figure 31. TPS70933 Line Transient (4.3 V to 5.3 V) Figure 32. TPS70933 Line Transient (4.3 V to 5.3 V)
Figure 33. Power-Up with Enable Figure 34. Power-Up and Power-Down Response
Figure 35. Power-Up and Power-Down Response
12 Submit Documentation Feedback Copyright © 2012–2015, Texas Instruments Incorporated
Product Folder Links: TPS709
Thermal
Shutdown
Current
Limit
Bandgap
IN
EN
OUT
Logic
GND
Device
TPS709
www.ti.com
SBVS186G –MARCH 2012–REVISED NOVEMBER 2015
7 Detailed Description
7.1 Overview
The TPS709 series of devices are ultralow quiescent current, low-dropout (LDO) linear regulators. The TPS709
offers reverse current protection to block any discharge current from the output into the input. The TPS709 also
features current limit and thermal shutdown for reliable operation.
7.2 Functional Block Diagram
7.3 Feature Description
7.3.1 Internal Current Limit
The TPS709 internal current limit helps protect the regulator during fault conditions. During current limit, the
output sources a fixed amount of current that is largely independent of output voltage. In such a case, the output
voltage is not regulated, and can be measured as (VOUT = ILIMIT × RLOAD). The PMOS pass transistor dissipates
[(VIN – VOUT) × ILIMIT] until a thermal shutdown is triggered and the device turns off. When cool, the device is
turned on by the internal thermal shutdown circuit. If the fault condition continues, the device cycles between
current limit and thermal shutdown; see the Thermal Protection section for more details.
The TPS709 is characterized over the recommended operating output current range up to 150 mA. The internal
current limit begins to limit the output current at a minimum of 200 mA of output current. The TPS709 continues
to operate for output currents between 150 mA and 200 mA but some data sheet parameters may not be met.
7.3.2 Dropout Voltage
The TPS709 use a PMOS pass transistor to achieve low dropout voltage. When (VIN – VOUT) is less than the
dropout voltage (VDO), the PMOS pass device is in the linear region of operation and the input-to-output
resistance is the RDS(ON) of the PMOS pass element. VDO approximately scales with the output current because
the PMOS device functions like a resistor in dropout.
The ground pin current of many linear voltage regulators increases substantially when the device is operated in
dropout. This increase in ground pin current while operating in dropout can be several orders of magnitude larger
than when the device is not in dropout. The TPS709 employs a special control loop that limits the increase in
ground pin current while operating in dropout. This functionality allows for the most efficient operation while in
dropout conditions that can greatly increase battery run times.
Copyright © 2012–2015, Texas Instruments Incorporated Submit Documentation Feedback 13
Product Folder Links: TPS709
TPS709
SBVS186G –MARCH 2012–REVISED NOVEMBER 2015
www.ti.com
Feature Description (continued)
7.3.3 Undervoltage Lockout (UVLO)
The TPS709 uses an undervoltage lockout (UVLO) circuit to keep the output shut off until the internal circuitry
operates properly.
7.3.4 Reverse-Current Protection
The TPS709 has integrated reverse-current protection. Reverse-current protection prevents the flow of current
from the OUT pin to the IN pin when output voltage is higher than input voltage. The reverse-current protection
circuitry places the power path in high impedance when the output voltage is higher than the input voltage. This
setting reduces leakage current from the output to the input to 10 nA, typical. The reverse current protection is
always active regardless of the enable pin logic state or if the OUT pin voltage is greater than 1.8 V. Reverse
current can flow if the output voltage is less than 1.8 V and if input voltage is less than the output voltage.
If voltage is applied to the input pin, then the maximum voltage that can be applied to the OUT pin is the lower of
three times the nominal output voltage or 6.5 V. For example, if the 1.2-V output voltage version is used, then the
maximum reverse bias voltage that can be applied to the OUT pin is 3.6 V. If the 5.0-V output voltage version is
used, then the maximum reverse bias voltage that can be applied to the OUT pin is 6.5 V.
7.4 Device Functional Modes
The TPS709 has the following functional modes:
1. Enabled: When the enable pin (EN) goes above 0.9 V, the device is enabled. EN is pulled high by a 300-nA
current source; therefore, EN can be left floating to enable the device. Do not connect EN to VIN. The EN pin
is clamped by a 6.5-V Zener diode. Do not exceed the 7-V absolute maximum rating on the enable pin or
excessive current flowing into the Zener clamp will destroy the device.
2. Disabled: When EN goes below 0.4 V, the device is disabled. During this time, OUT is high impedance and
the current into IN (I(SHUTDOWN)) is typically 150 nA.
14 Submit Documentation Feedback Copyright © 2012–2015, Texas Instruments Incorporated
Product Folder Links: TPS709
TPS70933
EN
IN OUT
VIN VOUT
1 Fm2.2 Fm
GND
NC
TPS709
www.ti.com
SBVS186G –MARCH 2012–REVISED NOVEMBER 2015
8 Application and Implementation
NOTE
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
8.1 Application Information
The TPS709 is a series of devices that belong to a new family of next-generation voltage regulators. These
devices consume low quiescent current and deliver excellent line and load transient performance. This
performance, combined with low noise and very good PSRR with little (VIN – VOUT) headroom, makes these
devices ideal for RF portable applications, current limit, and thermal protection. The TPS709 is specified from
–40°C to +125°C.
8.1.1 Input and Output Capacitor
The TPS709 devices are stable with output capacitors with an effective capacitance of 2.0 μF or greater for
output voltages below 1.5 V. For output voltages equal or greater than 1.5 V, the minimum effective capacitance
for stability is 1.5 µF. The maximum capacitance for stability is 47 µF. The equivalent series resistance (ESR) of
the output capacitor must be between 0 Ωand 0.2 Ωfor stability.
The effective capacitance is the minimum capacitance value of a capacitor after taking into account variations
resulting from tolerances, temperature, and dc bias effects. X5R- and X7R-type ceramic capacitors are
recommended because these capacitors have minimal variation in value and ESR over temperature.
Although an input capacitor is not required for stability, good analog design practice is to connect a 0.1-µF to
2.2-µF capacitor from IN to GND. This capacitor counteracts reactive input sources and improves transient
response, input ripple, and PSRR. An input capacitor is necessary if line transients greater than 10 V in
magnitude are anticipated.
8.1.2 Transient Response
As with any regulator, increasing the output capacitor size reduces over- and undershoot magnitude, but
increases transient response duration.
8.2 Typical Application
Figure 36. Wide Input, 3.3-V, Low-IQRail
8.2.1 Design Requirements
Table 1 summarizes the design requirements for Figure 36.
Table 1. Design Requirements for a Wide Input, 3.3-V, Low-IQRail Application
PARAMETER DESIGN SPECIFICATION
VIN 5 V to 20 V
VOUT 3.3 V
I(IN) (no load) < 5 µA
IOUT (max) 150 mA
Copyright © 2012–2015, Texas Instruments Incorporated Submit Documentation Feedback 15
Product Folder Links: TPS709
Channel 4
(50 mA / div)
Channel 2
(200 mV / div)
Time (500 s / div)m
Channel 2 = V
Channel 4 = I
V = 4.3 V
OUT
OUT
IN
G027
Channel 2
(1 V / div)
Channel 1
(500 mV / div)
Time (50 s / div)m
G032
Channel 1 = EN
2 = V
V = 4.3 V
C = 2.2 F
TPS70933
Channel OUT
IN
OUT m
TPS709
SBVS186G –MARCH 2012–REVISED NOVEMBER 2015
www.ti.com
8.2.2 Detailed Design Procedure
Select a 2.2-µF, 10-V X7R output capacitor to satisfy the minimum output capacitance requirement with a 3.3-V
dc bias.
Select a 1.0-µF, 25-V X7R input capacitor to provide input noise filtering and eliminate high-frequency voltage
transients.
8.2.3 Application Curves
Figure 37. TPS70933 Load Transient (50 mA to 150 mA) Figure 38. Power-Up with Enable
9 Power Supply Recommendations
This device is designed to operate with an input supply range of 2.7 V to 30 V. If the input supply is noisy,
additional input capacitors with low ESR can help improve output noise performance.
9.1 Power Dissipation
The ability to remove heat from the die is different for each package type, presenting different considerations in
the printed circuit board (PCB) layout. The PCB area around the device that is free of other components moves
the heat from the device to ambient air. Performance data for JEDEC low and high-K boards are given in the
Thermal Information table. Using heavier copper increases the effectiveness in removing heat from the device.
The addition of plated through-holes to heat-dissipating layers also improves the heatsink effectiveness.
Power dissipation depends on input voltage and load conditions. Power dissipation (PDISS) is equal to the product
of the output current and the voltage drop across the output pass element, as shown in Equation 1:
PDISS = (VIN – VOUT)×IOUT (1)
16 Submit Documentation Feedback Copyright © 2012–2015, Texas Instruments Incorporated
Product Folder Links: TPS709
COUT
VOUT
VIN
GND PLANE
CIN
Represents via used for
application specific connections
1
2
34
5
TPS709
www.ti.com
SBVS186G –MARCH 2012–REVISED NOVEMBER 2015
10 Layout
10.1 Layout Guidelines
Place input and output capacitors as close to the device pins as possible. To improve ac performance (such as
PSRR, output noise, and transient response), TI recommends that the board be designed with separate ground
planes for VIN and VOUT, with the ground plane connected only at the GND pin of the device. In addition, the
ground connection for the output capacitor must be connected directly to the device GND pin.
10.1.1 Thermal Protection
Thermal protection disables the output when the junction temperature rises to approximately 165°C, allowing the
device to cool. When the junction temperature cools to approximately 145°C, the output circuitry is again
enabled. Depending on power dissipation, thermal resistance, and ambient temperature, the thermal protection
circuit can cycle on and off. This cycling limits the dissipation of the regulator, protecting it from damage as a
result of overheating.
Any tendency to activate the thermal protection circuit indicates excessive power dissipation or an inadequate
heatsink. For reliable operation, limit junction temperature to 125°C, maximum. To estimate the margin of safety
in a complete design (including heatsink), increase the ambient temperature until the thermal protection is
triggered; use worst-case loads and signal conditions. For good reliability, thermal protection must trigger at least
35°C above the maximum expected ambient condition of the particular application. This configuration produces a
worst-case junction temperature of 125°C at the highest expected ambient temperature and worst-case load.
The TPS709 internal protection circuitry is designed to protect against overload conditions. This circuitry is not
intended to replace proper heatsinking. Continuously running the TPS709 into thermal shutdown degrades
device reliability.
10.2 Layout Example
Figure 39. Layout Example for DBV Package
Copyright © 2012–2015, Texas Instruments Incorporated Submit Documentation Feedback 17
Product Folder Links: TPS709
TPS709
SBVS186G –MARCH 2012–REVISED NOVEMBER 2015
www.ti.com
11 Device and Documentation Support
11.1 Device Support
11.1.1 Development Support
11.1.1.1 Evaluation Modules
An evaluation module (EVM) is available to assist in the initial circuit performance evaluation using the
TPS709xx. The TPS70933EVM-110 evaluation module (and related user guide) can be requested at the Texas
Instruments website through the product folders or purchased directly from the TI eStore.
11.1.1.2 Spice Models
Computer simulation of circuit performance using SPICE is often useful when analyzing the performance of
analog circuits and systems. A SPICE model for the TPS709 is available through the product folders under
Simulation Models.
11.1.2 Device Nomenclature
Table 2. Device Nomenclature(1)
PRODUCT VOUT
TPS709xx(x)yyyz XX(X) is the nominal output voltage. For output voltages with a resolution of 100 mV, two
digits are used in the ordering number; otherwise, three digits are used (for example, 28 =
2.8 V; 125 = 1.25 V).
YYY is the package designator.
Zis the tape and reel quantity (R = 3000, T = 250).
(1) For the most current package and ordering information see the Package Option Addendum at the end of this document, or see the TI
web site at www.ti.com.
11.2 Documentation Support
11.2.1 Related Documentation
• TPS70933EVM-110 Evaluation Module User Guide, SLVU689
11.3 Community Resources
The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective
contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of
Use.
TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration
among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help
solve problems with fellow engineers.
Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and
contact information for technical support.
18 Submit Documentation Feedback Copyright © 2012–2015, Texas Instruments Incorporated
Product Folder Links: TPS709
TPS709
www.ti.com
SBVS186G –MARCH 2012–REVISED NOVEMBER 2015
11.4 Trademarks
E2E is a trademark of Texas Instruments.
Zigbee is a trademark of ZigBee Alliance.
All other trademarks are the property of their respective owners.
11.5 Electrostatic Discharge Caution
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
11.6 Glossary
SLYZ022 —TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.
12 Mechanical, Packaging, and Orderable Information
The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
Copyright © 2012–2015, Texas Instruments Incorporated Submit Documentation Feedback 19
Product Folder Links: TPS709
PACKAGE OPTION ADDENDUM
www.ti.com 30-Aug-2018
Addendum-Page 1
PACKAGING INFORMATION
Orderable Device Status
(1)
Package Type Package
Drawing Pins Package
Qty Eco Plan
(2)
Lead/Ball Finish
(6)
MSL Peak Temp
(3)
Op Temp (°C) Device Marking
(4/5)
Samples
TPS70912DBVR ACTIVE SOT-23 DBV 5 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 SCX
TPS70912DBVT ACTIVE SOT-23 DBV 5 250 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 SCX
TPS70912DRVR ACTIVE WSON DRV 6 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 SCX
TPS70912DRVT ACTIVE WSON DRV 6 250 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 SCX
TPS709135DBVR ACTIVE SOT-23 DBV 5 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 SCY
TPS709135DBVT ACTIVE SOT-23 DBV 5 250 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 SCY
TPS70915DBVR ACTIVE SOT-23 DBV 5 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 SIM
TPS70915DBVT ACTIVE SOT-23 DBV 5 250 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 SIM
TPS70915DRVR ACTIVE WSON DRV 6 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 SIM
TPS70915DRVT ACTIVE WSON DRV 6 250 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 SIM
TPS70916DBVR ACTIVE SOT-23 DBV 5 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 SCZ
TPS70916DBVT ACTIVE SOT-23 DBV 5 250 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 SCZ
TPS70918DBVR ACTIVE SOT-23 DBV 5 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 SDA
TPS70918DBVT ACTIVE SOT-23 DBV 5 250 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 SDA
TPS70918DRVR ACTIVE WSON DRV 6 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 SDA
TPS70918DRVT ACTIVE WSON DRV 6 250 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 SDA
TPS70919DBVR ACTIVE SOT-23 DBV 5 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 SDB
PACKAGE OPTION ADDENDUM
www.ti.com 30-Aug-2018
Addendum-Page 2
Orderable Device Status
(1)
Package Type Package
Drawing Pins Package
Qty Eco Plan
(2)
Lead/Ball Finish
(6)
MSL Peak Temp
(3)
Op Temp (°C) Device Marking
(4/5)
Samples
TPS70919DBVT ACTIVE SOT-23 DBV 5 250 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 SDB
TPS70925DBVR ACTIVE SOT-23 DBV 5 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 SDC
TPS70925DBVT ACTIVE SOT-23 DBV 5 250 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 SDC
TPS70925DRVR ACTIVE WSON DRV 6 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 SDC
TPS70925DRVT ACTIVE WSON DRV 6 250 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 SDC
TPS70927DBVR ACTIVE SOT-23 DBV 5 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 SDD
TPS70927DBVT ACTIVE SOT-23 DBV 5 250 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 SDD
TPS70928DBVR ACTIVE SOT-23 DBV 5 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 SDE
TPS70928DBVT ACTIVE SOT-23 DBV 5 250 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 SDE
TPS70930DBVR ACTIVE SOT-23 DBV 5 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 SDF
TPS70930DBVT ACTIVE SOT-23 DBV 5 250 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 SDF
TPS70930DRVR ACTIVE WSON DRV 6 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 SDF
TPS70930DRVT ACTIVE WSON DRV 6 250 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 SDF
TPS70933DBVR ACTIVE SOT-23 DBV 5 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 SDG
TPS70933DBVT ACTIVE SOT-23 DBV 5 250 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 SDG
TPS70933DRVR ACTIVE WSON DRV 6 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 SDG
TPS70933DRVT ACTIVE WSON DRV 6 250 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 SDG
TPS70936DBVR ACTIVE SOT-23 DBV 5 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 SEJ
PACKAGE OPTION ADDENDUM
www.ti.com 30-Aug-2018
Addendum-Page 3
Orderable Device Status
(1)
Package Type Package
Drawing Pins Package
Qty Eco Plan
(2)
Lead/Ball Finish
(6)
MSL Peak Temp
(3)
Op Temp (°C) Device Marking
(4/5)
Samples
TPS70936DBVT ACTIVE SOT-23 DBV 5 250 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 SEJ
TPS70938DBVR ACTIVE SOT-23 DBV 5 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 SIC
TPS70938DBVT ACTIVE SOT-23 DBV 5 250 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 SIC
TPS70939DBVR ACTIVE SOT-23 DBV 5 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 SID
TPS70939DBVT ACTIVE SOT-23 DBV 5 250 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 SID
TPS70950DBVR ACTIVE SOT-23 DBV 5 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 SDH
TPS70950DBVT ACTIVE SOT-23 DBV 5 250 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 SDH
TPS70950DRVR ACTIVE WSON DRV 6 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 SDH
TPS70950DRVT ACTIVE WSON DRV 6 250 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 SDH
TPS70960DBVR ACTIVE SOT-23 DBV 5 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 SIT
TPS70960DBVT ACTIVE SOT-23 DBV 5 250 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 SIT
TPS709A30DBVR ACTIVE SOT-23 DBV 5 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 11RF
TPS709A30DBVT ACTIVE SOT-23 DBV 5 250 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 11RF
TPS709A33DBVR ACTIVE SOT-23 DBV 5 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 11SF
TPS709A33DBVT ACTIVE SOT-23 DBV 5 250 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 11SF
TPS709B33DBVR ACTIVE SOT-23 DBV 5 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 13C7
TPS709B33DBVT ACTIVE SOT-23 DBV 5 250 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 13C7
TPS709B50DBVR ACTIVE SOT-23 DBV 5 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 13D7
PACKAGE OPTION ADDENDUM
www.ti.com 30-Aug-2018
Addendum-Page 4
Orderable Device Status
(1)
Package Type Package
Drawing Pins Package
Qty Eco Plan
(2)
Lead/Ball Finish
(6)
MSL Peak Temp
(3)
Op Temp (°C) Device Marking
(4/5)
Samples
TPS709B50DBVT ACTIVE SOT-23 DBV 5 250 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 13D7
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish
value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
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In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
OTHER QUALIFIED VERSIONS OF TPS709 :
•Automotive: TPS709-Q1
PACKAGE OPTION ADDENDUM
www.ti.com 30-Aug-2018
Addendum-Page 5
NOTE: Qualified Version Definitions:
•Automotive - Q100 devices qualified for high-reliability automotive applications targeting zero defects
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device Package
Type Package
Drawing Pins SPQ Reel
Diameter
(mm)
Reel
Width
W1 (mm)
A0
(mm) B0
(mm) K0
(mm) P1
(mm) W
(mm) Pin1
Quadrant
TPS70912DBVR SOT-23 DBV 5 3000 178.0 9.0 3.3 3.2 1.4 4.0 8.0 Q3
TPS70912DBVT SOT-23 DBV 5 250 178.0 9.0 3.23 3.17 1.37 4.0 8.0 Q3
TPS70912DRVR WSON DRV 6 3000 180.0 8.4 2.3 2.3 1.15 4.0 8.0 Q2
TPS70912DRVT WSON DRV 6 250 180.0 8.4 2.3 2.3 1.15 4.0 8.0 Q2
TPS709135DBVR SOT-23 DBV 5 3000 178.0 9.0 3.23 3.17 1.37 4.0 8.0 Q3
TPS709135DBVT SOT-23 DBV 5 250 178.0 9.0 3.23 3.17 1.37 4.0 8.0 Q3
TPS70915DBVR SOT-23 DBV 5 3000 178.0 9.0 3.23 3.17 1.37 4.0 8.0 Q3
TPS70915DBVT SOT-23 DBV 5 250 178.0 9.0 3.23 3.17 1.37 4.0 8.0 Q3
TPS70915DRVR WSON DRV 6 3000 179.0 8.4 2.2 2.2 1.2 4.0 8.0 Q2
TPS70915DRVR WSON DRV 6 3000 180.0 8.4 2.3 2.3 1.15 4.0 8.0 Q2
TPS70915DRVT WSON DRV 6 250 179.0 8.4 2.2 2.2 1.2 4.0 8.0 Q2
TPS70915DRVT WSON DRV 6 250 180.0 8.4 2.3 2.3 1.15 4.0 8.0 Q2
TPS70916DBVR SOT-23 DBV 5 3000 178.0 9.0 3.23 3.17 1.37 4.0 8.0 Q3
TPS70916DBVT SOT-23 DBV 5 250 178.0 9.0 3.23 3.17 1.37 4.0 8.0 Q3
TPS70918DBVR SOT-23 DBV 5 3000 178.0 9.0 3.23 3.17 1.37 4.0 8.0 Q3
TPS70918DBVT SOT-23 DBV 5 250 178.0 9.0 3.23 3.17 1.37 4.0 8.0 Q3
TPS70918DRVR WSON DRV 6 3000 180.0 8.4 2.3 2.3 1.15 4.0 8.0 Q2
TPS70918DRVT WSON DRV 6 250 180.0 8.4 2.3 2.3 1.15 4.0 8.0 Q2
PACKAGE MATERIALS INFORMATION
www.ti.com 21-Jan-2018
Pack Materials-Page 1
Device Package
Type Package
Drawing Pins SPQ Reel
Diameter
(mm)
Reel
Width
W1 (mm)
A0
(mm) B0
(mm) K0
(mm) P1
(mm) W
(mm) Pin1
Quadrant
TPS70919DBVR SOT-23 DBV 5 3000 178.0 9.0 3.23 3.17 1.37 4.0 8.0 Q3
TPS70919DBVT SOT-23 DBV 5 250 178.0 9.0 3.23 3.17 1.37 4.0 8.0 Q3
TPS70925DBVR SOT-23 DBV 5 3000 178.0 9.0 3.23 3.17 1.37 4.0 8.0 Q3
TPS70925DBVT SOT-23 DBV 5 250 178.0 9.0 3.3 3.2 1.4 4.0 8.0 Q3
TPS70925DRVR WSON DRV 6 3000 180.0 8.4 2.3 2.3 1.15 4.0 8.0 Q2
TPS70925DRVT WSON DRV 6 250 180.0 8.4 2.3 2.3 1.15 4.0 8.0 Q2
TPS70927DBVR SOT-23 DBV 5 3000 178.0 9.0 3.23 3.17 1.37 4.0 8.0 Q3
TPS70927DBVT SOT-23 DBV 5 250 178.0 9.0 3.23 3.17 1.37 4.0 8.0 Q3
TPS70928DBVR SOT-23 DBV 5 3000 178.0 9.0 3.23 3.17 1.37 4.0 8.0 Q3
TPS70928DBVT SOT-23 DBV 5 250 178.0 9.0 3.23 3.17 1.37 4.0 8.0 Q3
TPS70930DBVR SOT-23 DBV 5 3000 178.0 9.0 3.23 3.17 1.37 4.0 8.0 Q3
TPS70930DBVT SOT-23 DBV 5 250 178.0 9.0 3.23 3.17 1.37 4.0 8.0 Q3
TPS70930DRVR WSON DRV 6 3000 180.0 8.4 2.3 2.3 1.15 4.0 8.0 Q2
TPS70930DRVT WSON DRV 6 250 180.0 8.4 2.3 2.3 1.15 4.0 8.0 Q2
TPS70933DBVR SOT-23 DBV 5 3000 178.0 9.0 3.3 3.2 1.4 4.0 8.0 Q3
TPS70933DBVT SOT-23 DBV 5 250 178.0 9.0 3.23 3.17 1.37 4.0 8.0 Q3
TPS70933DRVR WSON DRV 6 3000 180.0 8.4 2.3 2.3 1.15 4.0 8.0 Q2
TPS70933DRVT WSON DRV 6 250 180.0 8.4 2.3 2.3 1.15 4.0 8.0 Q2
TPS70936DBVR SOT-23 DBV 5 3000 178.0 9.0 3.3 3.2 1.4 4.0 8.0 Q3
TPS70936DBVT SOT-23 DBV 5 250 178.0 9.0 3.23 3.17 1.37 4.0 8.0 Q3
TPS70938DBVR SOT-23 DBV 5 3000 178.0 9.0 3.23 3.17 1.37 4.0 8.0 Q3
TPS70938DBVT SOT-23 DBV 5 250 178.0 9.0 3.23 3.17 1.37 4.0 8.0 Q3
TPS70939DBVR SOT-23 DBV 5 3000 178.0 9.0 3.23 3.17 1.37 4.0 8.0 Q3
TPS70939DBVT SOT-23 DBV 5 250 178.0 9.0 3.23 3.17 1.37 4.0 8.0 Q3
TPS70950DBVR SOT-23 DBV 5 3000 178.0 9.0 3.23 3.17 1.37 4.0 8.0 Q3
TPS70950DBVT SOT-23 DBV 5 250 178.0 9.0 3.23 3.17 1.37 4.0 8.0 Q3
TPS70950DRVR WSON DRV 6 3000 180.0 8.4 2.3 2.3 1.15 4.0 8.0 Q2
TPS70950DRVT WSON DRV 6 250 180.0 8.4 2.3 2.3 1.15 4.0 8.0 Q2
TPS70960DBVR SOT-23 DBV 5 3000 178.0 9.0 3.23 3.17 1.37 4.0 8.0 Q3
TPS70960DBVT SOT-23 DBV 5 250 178.0 9.0 3.23 3.17 1.37 4.0 8.0 Q3
TPS709A30DBVR SOT-23 DBV 5 3000 178.0 9.0 3.23 3.17 1.37 4.0 8.0 Q3
TPS709A30DBVT SOT-23 DBV 5 250 178.0 9.0 3.23 3.17 1.37 4.0 8.0 Q3
TPS709A33DBVR SOT-23 DBV 5 3000 178.0 9.0 3.23 3.17 1.37 4.0 8.0 Q3
TPS709A33DBVT SOT-23 DBV 5 250 178.0 9.0 3.23 3.17 1.37 4.0 8.0 Q3
TPS709B33DBVR SOT-23 DBV 5 3000 178.0 9.0 3.23 3.17 1.37 4.0 8.0 Q3
TPS709B33DBVT SOT-23 DBV 5 250 178.0 9.0 3.23 3.17 1.37 4.0 8.0 Q3
TPS709B50DBVR SOT-23 DBV 5 3000 178.0 9.0 3.23 3.17 1.37 4.0 8.0 Q3
TPS709B50DBVT SOT-23 DBV 5 250 178.0 9.0 3.23 3.17 1.37 4.0 8.0 Q3
PACKAGE MATERIALS INFORMATION
www.ti.com 21-Jan-2018
Pack Materials-Page 2
*All dimensions are nominal
Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
TPS70912DBVR SOT-23 DBV 5 3000 180.0 180.0 18.0
TPS70912DBVT SOT-23 DBV 5 250 180.0 180.0 18.0
TPS70912DRVR WSON DRV 6 3000 210.0 185.0 35.0
TPS70912DRVT WSON DRV 6 250 210.0 185.0 35.0
TPS709135DBVR SOT-23 DBV 5 3000 180.0 180.0 18.0
TPS709135DBVT SOT-23 DBV 5 250 180.0 180.0 18.0
TPS70915DBVR SOT-23 DBV 5 3000 180.0 180.0 18.0
TPS70915DBVT SOT-23 DBV 5 250 180.0 180.0 18.0
TPS70915DRVR WSON DRV 6 3000 203.0 203.0 35.0
TPS70915DRVR WSON DRV 6 3000 210.0 185.0 35.0
TPS70915DRVT WSON DRV 6 250 203.0 203.0 35.0
TPS70915DRVT WSON DRV 6 250 210.0 185.0 35.0
TPS70916DBVR SOT-23 DBV 5 3000 180.0 180.0 18.0
TPS70916DBVT SOT-23 DBV 5 250 180.0 180.0 18.0
TPS70918DBVR SOT-23 DBV 5 3000 180.0 180.0 18.0
TPS70918DBVT SOT-23 DBV 5 250 180.0 180.0 18.0
TPS70918DRVR WSON DRV 6 3000 210.0 185.0 35.0
TPS70918DRVT WSON DRV 6 250 210.0 185.0 35.0
TPS70919DBVR SOT-23 DBV 5 3000 180.0 180.0 18.0
TPS70919DBVT SOT-23 DBV 5 250 180.0 180.0 18.0
PACKAGE MATERIALS INFORMATION
www.ti.com 21-Jan-2018
Pack Materials-Page 3
Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
TPS70925DBVR SOT-23 DBV 5 3000 180.0 180.0 18.0
TPS70925DBVT SOT-23 DBV 5 250 180.0 180.0 18.0
TPS70925DRVR WSON DRV 6 3000 210.0 185.0 35.0
TPS70925DRVT WSON DRV 6 250 210.0 185.0 35.0
TPS70927DBVR SOT-23 DBV 5 3000 180.0 180.0 18.0
TPS70927DBVT SOT-23 DBV 5 250 180.0 180.0 18.0
TPS70928DBVR SOT-23 DBV 5 3000 180.0 180.0 18.0
TPS70928DBVT SOT-23 DBV 5 250 180.0 180.0 18.0
TPS70930DBVR SOT-23 DBV 5 3000 180.0 180.0 18.0
TPS70930DBVT SOT-23 DBV 5 250 180.0 180.0 18.0
TPS70930DRVR WSON DRV 6 3000 210.0 185.0 35.0
TPS70930DRVT WSON DRV 6 250 210.0 185.0 35.0
TPS70933DBVR SOT-23 DBV 5 3000 180.0 180.0 18.0
TPS70933DBVT SOT-23 DBV 5 250 180.0 180.0 18.0
TPS70933DRVR WSON DRV 6 3000 210.0 185.0 35.0
TPS70933DRVT WSON DRV 6 250 210.0 185.0 35.0
TPS70936DBVR SOT-23 DBV 5 3000 180.0 180.0 18.0
TPS70936DBVT SOT-23 DBV 5 250 180.0 180.0 18.0
TPS70938DBVR SOT-23 DBV 5 3000 180.0 180.0 18.0
TPS70938DBVT SOT-23 DBV 5 250 180.0 180.0 18.0
TPS70939DBVR SOT-23 DBV 5 3000 180.0 180.0 18.0
TPS70939DBVT SOT-23 DBV 5 250 180.0 180.0 18.0
TPS70950DBVR SOT-23 DBV 5 3000 180.0 180.0 18.0
TPS70950DBVT SOT-23 DBV 5 250 180.0 180.0 18.0
TPS70950DRVR WSON DRV 6 3000 210.0 185.0 35.0
TPS70950DRVT WSON DRV 6 250 210.0 185.0 35.0
TPS70960DBVR SOT-23 DBV 5 3000 180.0 180.0 18.0
TPS70960DBVT SOT-23 DBV 5 250 180.0 180.0 18.0
TPS709A30DBVR SOT-23 DBV 5 3000 180.0 180.0 18.0
TPS709A30DBVT SOT-23 DBV 5 250 180.0 180.0 18.0
TPS709A33DBVR SOT-23 DBV 5 3000 180.0 180.0 18.0
TPS709A33DBVT SOT-23 DBV 5 250 180.0 180.0 18.0
TPS709B33DBVR SOT-23 DBV 5 3000 180.0 180.0 18.0
TPS709B33DBVT SOT-23 DBV 5 250 180.0 180.0 18.0
TPS709B50DBVR SOT-23 DBV 5 3000 180.0 180.0 18.0
TPS709B50DBVT SOT-23 DBV 5 250 180.0 180.0 18.0
PACKAGE MATERIALS INFORMATION
www.ti.com 21-Jan-2018
Pack Materials-Page 4
GENERIC PACKAGE VIEW
Images above are just a representation of the package family, actual package may vary.
Refer to the product data sheet for package details.
DRV 6 WSON - 0.8 mm max height
PLASTIC SMALL OUTLINE - NO LEAD
4206925/F
www.ti.com
PACKAGE OUTLINE
C
6X 0.35
0.25
1.6 0.1
6X 0.3
0.2
2X
1.3
1 0.1
4X 0.65
0.8
0.7
0.05
0.00
B2.1
1.9 A
2.1
1.9
(0.2) TYP
WSON - 0.8 mm max heightDRV0006A
PLASTIC SMALL OUTLINE - NO LEAD
4222173/B 04/2018
PIN 1 INDEX AREA
SEATING PLANE
0.08 C
1
34
6
(OPTIONAL)
PIN 1 ID 0.1 C A B
0.05 C
THERMAL PAD
EXPOSED
7
NOTES:
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. The package thermal pad must be soldered to the printed circuit board for thermal and mechanical performance.
SCALE 5.500
www.ti.com
EXAMPLE BOARD LAYOUT
0.07 MIN
ALL AROUND
0.07 MAX
ALL AROUND
(1)
4X (0.65)
(1.95)
6X (0.3)
6X (0.45)
(1.6)
(R0.05) TYP
( 0.2) VIA
TYP
(1.1)
WSON - 0.8 mm max heightDRV0006A
PLASTIC SMALL OUTLINE - NO LEAD
4222173/B 04/2018
SYMM
1
34
6
SYMM
LAND PATTERN EXAMPLE
SCALE:25X
7
NOTES: (continued)
4. This package is designed to be soldered to a thermal pad on the board. For more information, see Texas Instruments literature
number SLUA271 (www.ti.com/lit/slua271).
5. Vias are optional depending on application, refer to device data sheet. If some or all are implemented, recommended via locations are shown.
SOLDER MASK
OPENING
SOLDER MASK
METAL UNDER
SOLDER MASK
DEFINED
METAL
SOLDER MASK
OPENING
SOLDER MASK DETAILS
NON SOLDER MASK
DEFINED
(PREFERRED)
www.ti.com
EXAMPLE STENCIL DESIGN
6X (0.3)
6X (0.45)
4X (0.65) (0.7)
(1)
(1.95)
(R0.05) TYP
(0.45)
WSON - 0.8 mm max heightDRV0006A
PLASTIC SMALL OUTLINE - NO LEAD
4222173/B 04/2018
NOTES: (continued)
6. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
SOLDER PASTE EXAMPLE
BASED ON 0.125 mm THICK STENCIL
EXPOSED PAD #7
88% PRINTED SOLDER COVERAGE BY AREA UNDER PACKAGE
SCALE:30X
SYMM
1
34
6
SYMM
METAL
7
www.ti.com
PACKAGE OUTLINE
C
TYP
0.22
0.08
0.25
3.0
2.6
2X 0.95
1.9
1.45 MAX
TYP
0.15
0.00
5X 0.5
0.3
TYP
0.6
0.3
TYP
8
0
1.9
A
3.05
2.75
B
1.75
1.45
(1.1)
SOT-23 - 1.45 mm max heightDBV0005A
SMALL OUTLINE TRANSISTOR
4214839/C 04/2017
NOTES:
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. Refernce JEDEC MO-178.
0.2 C A B
1
34
5
2
INDEX AREA
PIN 1
GAGE PLANE
SEATING PLANE
0.1 C
SCALE 4.000
www.ti.com
EXAMPLE BOARD LAYOUT
0.07 MAX
ARROUND 0.07 MIN
ARROUND
5X (1.1)
5X (0.6)
(2.6)
(1.9)
2X (0.95)
(R0.05) TYP
4214839/C 04/2017
SOT-23 - 1.45 mm max heightDBV0005A
SMALL OUTLINE TRANSISTOR
NOTES: (continued)
4. Publication IPC-7351 may have alternate designs.
5. Solder mask tolerances between and around signal pads can vary based on board fabrication site.
SYMM
LAND PATTERN EXAMPLE
EXPOSED METAL SHOWN
SCALE:15X
PKG
1
34
5
2
SOLDER MASK
OPENING
METAL UNDER
SOLDER MASK
SOLDER MASK
DEFINED
EXPOSED METAL
METAL
SOLDER MASK
OPENING
NON SOLDER MASK
DEFINED
(PREFERRED)
SOLDER MASK DETAILS
EXPOSED METAL
www.ti.com
EXAMPLE STENCIL DESIGN
(2.6)
(1.9)
2X(0.95)
5X (1.1)
5X (0.6)
(R0.05) TYP
SOT-23 - 1.45 mm max heightDBV0005A
SMALL OUTLINE TRANSISTOR
4214839/C 04/2017
NOTES: (continued)
6. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
7. Board assembly site may have different recommendations for stencil design.
SOLDER PASTE EXAMPLE
BASED ON 0.125 mm THICK STENCIL
SCALE:15X
SYMM
PKG
1
34
5
2
www.ti.com
PACKAGE OUTLINE
C
TYP
0.22
0.08
0.25
3.0
2.6
2X 0.95
1.9
1.45 MAX
TYP
0.15
0.00
5X 0.5
0.3
TYP
0.6
0.3
TYP
8
0
1.9
A
3.05
2.75
B
1.75
1.45
(1.1)
SOT-23 - 1.45 mm max heightDBV0005A
SMALL OUTLINE TRANSISTOR
4214839/C 04/2017
NOTES:
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. Refernce JEDEC MO-178.
0.2 C A B
1
34
5
2
INDEX AREA
PIN 1
GAGE PLANE
SEATING PLANE
0.1 C
SCALE 4.000
www.ti.com
EXAMPLE BOARD LAYOUT
0.07 MAX
ARROUND 0.07 MIN
ARROUND
5X (1.1)
5X (0.6)
(2.6)
(1.9)
2X (0.95)
(R0.05) TYP
4214839/C 04/2017
SOT-23 - 1.45 mm max heightDBV0005A
SMALL OUTLINE TRANSISTOR
NOTES: (continued)
4. Publication IPC-7351 may have alternate designs.
5. Solder mask tolerances between and around signal pads can vary based on board fabrication site.
SYMM
LAND PATTERN EXAMPLE
EXPOSED METAL SHOWN
SCALE:15X
PKG
1
34
5
2
SOLDER MASK
OPENING
METAL UNDER
SOLDER MASK
SOLDER MASK
DEFINED
EXPOSED METAL
METAL
SOLDER MASK
OPENING
NON SOLDER MASK
DEFINED
(PREFERRED)
SOLDER MASK DETAILS
EXPOSED METAL
www.ti.com
EXAMPLE STENCIL DESIGN
(2.6)
(1.9)
2X(0.95)
5X (1.1)
5X (0.6)
(R0.05) TYP
SOT-23 - 1.45 mm max heightDBV0005A
SMALL OUTLINE TRANSISTOR
4214839/C 04/2017
NOTES: (continued)
6. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
7. Board assembly site may have different recommendations for stencil design.
SOLDER PASTE EXAMPLE
BASED ON 0.125 mm THICK STENCIL
SCALE:15X
SYMM
PKG
1
34
5
2
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Life-critical medical equipment is medical equipment where failure of such equipment would cause serious bodily injury or death (e.g., life
support, pacemakers, defibrillators, heart pumps, neurostimulators, and implantables). Such equipment includes, without limitation, all
medical devices identified by the U.S. Food and Drug Administration as Class III devices and equivalent classifications outside the U.S.
TI may expressly designate certain products as completing a particular qualification (e.g., Q100, Military Grade, or Enhanced Product).
Designers agree that it has the necessary expertise to select the product with the appropriate qualification designation for their applications
and that proper product selection is at Designers’ own risk. Designers are solely responsible for compliance with all legal and regulatory
requirements in connection with such selection.
Designer will fully indemnify TI and its representatives against any damages, costs, losses, and/or liabilities arising out of Designer’s non-
compliance with the terms and provisions of this Notice.
Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265
Copyright © 2018, Texas Instruments Incorporated
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Click to View Pricing, Inventory, Delivery & Lifecycle Information:
Texas Instruments:
TPS70912DBVT TPS70933DBVR TPS70925DBVR TPS70912DBVR TPS70950DBVR TPS70918DBVT
TPS70939DBVT TPS70930DBVT TPS70916DBVR TPS70928DBVR TPS70936DBVT TPS70930DBVR
TPS709135DBVT TPS70933DBVT TPS70918DBVR TPS70927DBVT TPS70939DBVR TPS70916DBVT
TPS709135DBVR TPS70950DBVT TPS70925DBVT TPS70938DBVR TPS70936DBVR TPS70938DBVT
TPS70928DBVT TPS70927DBVR TPS70915DBVR TPS70915DBVT TPS70925DRVR TPS70912DRVR
TPS70930DRVT TPS70925DRVT TPS70930DRVR TPS70912DRVT TPS70933DRVR TPS70933DRVT
TPS70950DRVR TPS70950DRVT TPS70918DRVR TPS70918DRVT TPS70960DBVT TPS70915DRVT
TPS70960DBVR TPS70915DRVR TPS70919DBVR TPS70919DBVT TPS709A33DBVT TPS709A30DBVT
TPS709A30DBVR TPS709A33DBVR TPS709B50DBVT TPS709B33DBVT TPS709B33DBVR TPS709B50DBVR
