STW11NK100Z STW11NK100Z N-channel 1000V - 1.1 - 8.3A - TO-247 Zener - Protected SuperMESHTM PowerMOSFET General features Type VDSS (@Tjmax) STW11NK100Z 1000 V RDS(on) ID Pw < 1.38 8.3 A 230W Extremely high dv/dt capability 100% avalanche tested Gate charge minimized Very low intrinsic capacitances Very good manufacturing repeatibility TO-247 Description The SuperMESHTM series is obtained through an extreme optimization of ST's well established strip-based PowerMESHTM layout. In addition to pushing on-resistance significantly down, special care is taken to ensure a very good dv/dt capability for the most demanding applications. Such series complements ST full range of high voltage MOSFETs including revolutionary MDmeshTM products. Internal schematic diagram Applications Switching application Order codes Part number Marking Package Packaging STW11NK100Z W11NK100Z TO-247 Tube July 2006 Rev 2 1/14 www.st.com 14 Contents STW11NK100Z Contents 1 Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 2.1 Electrical characteristics (curves) ............................ 7 3 Test circuit Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . 10 4 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 5 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 2/14 STW11NK100Z 1 Electrical ratings Electrical ratings Table 1. Absolute maximum ratings Symbol Value Unit Drain-source voltage (VGS = 0) 1000 V Drain-gate voltage (RGS = 20K) 1000 V Gate-source voltage 30 V ID Drain current (continuous) at TC = 25C 8.3 A ID VDS VDGR VGS Parameter Drain current (continuous) at TC=100C 5.2 A IDM(1) Drain current (pulsed) 33.2 A PTOT Total dissipation at TC = 25C 230 W Derating Factor 1.85 W/C Gate source ESD(HBM-C=100pF, R=1,5K) 6000 V 4.5 V/ns -55 to 150 C VESD (G-S) dv/dt (2) TJ Tstg Peak diode recovery voltage slope Operating junction temperature Storage temperature 1. Pulse width limited by safe operating area 2. ISD 8.3 A, di/dt 200A/s, VDD V(BR)DSS, Tj TJMAX Table 2. Symbol Rthj-case Thermal data Parameter Thermal resistance junction-case Max Value Unit 0.54 C/W Rthj-a Thermal resistance junction-ambient Max 50 C/W Tl Maximum lead temperature for soldering purpose 300 C Table 3. Symbol Avalanche characteristics Parameter Value Unit IAR Avalanche current, repetitive or not-repetitive (pulse width limited by Tj Max) 8.3 A EAS Single pulse avalanche energy (starting Tj=25C, Id=Iar, Vdd=50V) 550 mJ 3/14 Electrical ratings Table 4. Symbol BVGSO STW11NK100Z Gate-source zener diode Parameter Test conditions Gate-source breakdown voltage Igs= 1mA (Open Drain) Min. Typ. 30 Max. Unit 0 V Protection features of gate-to-source zener diodes The built-in back-to-back Zener diodes have specifically been designed to enhance not only the device's ESD capability, but also to make them safely absorb possible voltage transients that may occasionally be applied from gate to source. In this respect the Zener voltage is appropriate to achieve an efficient and cost-effective intervention to protect the device's integrity. These integrated Zener diodes thus avoid the usage of external components. 4/14 STW11NK100Z 2 Electrical characteristics Electrical characteristics (TCASE=25C unless otherwise specified) Table 5. Symbol On/off states Parameter Test conditions Drain-source breakdown voltage ID = 1mA, VGS= 0 IDSS Zero gate voltage drain current (VGS = 0) VDS = Max rating, VDS = Max rating, Tc = 125C IGSS Gate body leakage current VGS = 20V (VGS = 0) V(BR)DSS VGS(th) Gate threshold voltage VDS = VGS, ID = 100A RDS(on) Static drain-source on resistance VGS = 10V, ID = 4.15 A Table 6. Symbol Min. Typ. Max. Unit 1000 3 V 1 50 A A 10 A 3.75 4.5 V 1.1 1.38 Typ. Max. Unit Dynamic Parameter Test conditions gfs (1) Forward transconductance VDS =15V, ID = 4.15A Ciss Coss Crss Input capacitance Output capacitance Reverse transfer capacitance Min. 9 S VDS =25V, f=1 MHz, VGS=0 3500 270 60 pF pF pF Equivalent output capacitance VGS=0, VDS =0V to 500V 170 pF td(on) tr td(off) tf Turn-on delay time Rise time Off-voltage rise time Fall time VDD=800 V, ID= 8A, RG=4.7, VGS=10V (see Figure 16) 27 18 98 55 ns ns ns ns Qg Qgs Qgd Total gate charge Gate-source charge Gate-drain charge VDD=800V, ID = 8A VGS =10V 113 18 60 Cosseq(2). 162 nC nC nC 1. Pulsed: pulse duration=300s, duty cycle 1.5% 2. Coss eq. is defined as a constant equivalent capacitance giving the same charging time as Coss when VDS increases from 0 to 80% VDSS 5/14 Electrical characteristics Table 7. Symbol ISD Source drain diode Parameter Min Typ. Max Unit Source-drain current 8.3 A Source-drain current (pulsed) 33.2 A (2) Forward on voltage ISD=8.3A, VGS=0 1.6 V Reverse recovery time Reverse recovery charge Reverse recovery current ISD=8.3, di/dt = 100A/s, VDD=80V, Tj=25C (see Figure 18) 560 4.48 16 ns C A Reverse recovery time Reverse recovery charge Reverse recovery current ISD=8A, di/dt = 100A/s, VDD=80V, Tj=150C (see Figure 18) 620 4.57 16 ns C A trr Qrr IRRM trr Qrr IRRM 1. Pulse width limited by safe operating area 2. Pulsed: pulse duration=300s, duty cycle 1.5% 6/14 Test conditions (1) ISDM VSD STW11NK100Z STW11NK100Z Electrical characteristics 2.1 Electrical characteristics (curves) Figure 1. Safe operating area Figure 2. Thermal impedance Figure 3. Output characterisics Figure 4. Transfer characteristics Figure 5. Transconductance Figure 6. Static drain-source on resistance 7/14 Electrical characteristics STW11NK100Z Figure 7. Gate charge vs gate-source voltage Figure 8. Figure 9. Normalized gate threshold voltage vs temperature Figure 11. Source-drain diode forward characteristics 8/14 Capacitance variations Figure 10. Normalized on resistance vs temperature Figure 12. Normalized BVDSS vs temperature STW11NK100Z Electrical characteristics Figure 13. Maximum avalanche energy vs temperature 9/14 Test circuit Package mechanical data 3 STW11NK100Z Test circuit Package mechanical data Figure 14. Unclamped Inductive load test circuit Figure 15. Unclamped Inductive waveform Figure 16. Switching times test circuit for resistive load Figure 17. Gate charge test circuit Figure 18. Test circuit for inductive load switching and diode recovery times 10/14 STW11NK100Z 4 Package mechanical data Package mechanical data In order to meet environmental requirements, ST offers these devices in ECOPACK(R) packages. These packages have a Lead-free second level interconnect . The category of second level interconnect is marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. ECOPACK is an ST trademark. ECOPACK specifications are available at: www.st.com 11/14 Package mechanical data STW11NK100Z TO-247 MECHANICAL DATA DIM. mm. MIN. inch MAX. MIN. TYP. MAX. A 4.85 5.15 0.19 0.20 A1 2.20 2.60 0.086 0.102 b 1.0 1.40 0.039 0.055 b1 2.0 2.40 0.079 0.094 0.134 b2 3.0 3.40 0.118 c 0.40 0.80 0.015 0.03 D 19.85 20.15 0.781 0.793 E 15.45 15.75 0.608 e 5.45 0.620 0.214 L 14.20 14.80 0.560 L1 3.70 4.30 0.14 L2 18.50 0.582 0.17 0.728 oP 3.55 3.65 0.140 0.143 oR 4.50 5.50 0.177 0.216 S 12/14 TYP 5.50 0.216 STW11NK100Z 5 Revision history Revision history Table 8. Revision history Date Revision Changes 21-Jun-2004 1 Preliminary version 31-Jul-2006 2 New template, no content change. 13/14 STW11NK100Z Please Read Carefully: Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries ("ST") reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST's terms and conditions of sale. Purchasers are solely responsible for the choice, selection and use of the ST products and services described herein, and ST assumes no liability whatsoever relating to the choice, selection or use of the ST products and services described herein. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted under this document. 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