July 2006 Rev 2 1/14
14
STW11NK100Z
STW11NK100Z
N-channel 1000V - 1.1Ω - 8.3A - TO-247
Zener - Protected SuperMESH™ PowerMOSFET
General features
■Extremely high dv/dt capability
■100% avalanche tested
■Gate charge minimized
■Very low intrinsic capacitances
■Very good manufacturing repeatibility
Description
The SuperMESH™ series is obtained through an
extreme optimization of ST’s well established
strip-based PowerMESH™ layout. In addition to
pushing on-resistance significantly down, special
care is taken to ensure a very good dv/dt
capability for the most demanding applications.
Such series complements ST full range of high
voltage MOSFETs including revolutionary
MDmesh™ products.
Applications
■Switching application
Internal schematic diagram
Type VDSS
(@Tjmax) RDS(on) IDPw
STW11NK100Z 1000 V < 1.38 Ω8.3 A 230W
TO-247
www.st.com
Order codes
Part number Marking Package Packaging
STW11NK100Z W11NK100Z TO-247 Tube
Contents STW11NK100Z
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Contents
1 Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
2 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
2.1 Electrical characteristics (curves) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
3 Test circuit Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . 10
4 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
5 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
STW11NK100Z Electrical ratings
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1 Electrical ratings
Table 1. Absolute maximum ratings
Symbol Parameter Value Unit
VDS Drain-source voltage (VGS = 0) 1000 V
VDGR Drain-gate voltage (RGS = 20KΩ) 1000 V
VGS Gate-source voltage ± 30 V
IDDrain current (continuous) at TC = 25°C 8.3 A
IDDrain current (continuous) at TC=100°C 5.2 A
IDM(1)
1. Pulse width limited by safe operating area
Drain current (pulsed) 33.2 A
PTOT Total dissipation at TC = 25°C 230 W
Derating Factor 1.85 W/°C
VESD (G-S) Gate source ESD(HBM-C=100pF, R=1,5KΩ) 6000 V
dv/dt(2)
2. ISD ≤ 8.3 A, di/dt ≤ 200A/µs, VDD ≤ V(BR)DSS, Tj ≤ TJMAX
Peak diode recovery voltage slope 4.5 V/ns
TJ
Tstg
Operating junction temperature
Storage temperature -55 to 150 °C
Table 2. Thermal data
Symbol Parameter Value Unit
Rthj-case Thermal resistance junction-case Max 0.54 °C/W
Rthj-a Thermal resistance junction-ambient Max 50 °C/W
Tl
Maximum lead temperature for soldering
purpose 300 °C
Table 3. Avalanche characteristics
Symbol Parameter Value Unit
IAR
Avalanche current, repetitive or not-repetitive
(pulse width limited by Tj Max) 8.3 A
EAS
Single pulse avalanche energy
(starting Tj=25°C, Id=Iar, Vdd=50V) 550 mJ
Electrical ratings STW11NK100Z
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Protection features of gate-to-source zener diodes
The built-in back-to-back Zener diodes have specifically been designed to enhance not only
the device’s ESD capability, but also to make them safely absorb possible voltage transients
that may occasionally be applied from gate to source. In this respect the Zener voltage is
appropriate to achieve an efficient and cost-effective intervention to protect the device’s
integrity. These integrated Zener diodes thus avoid the usage of external components.
Table 4. Gate-source zener diode
Symbol Parameter Test conditions Min. Typ. Max. Unit
BVGSO Gate-source breakdown voltage Igs=± 1mA (Open Drain) 30 0 V
STW11NK100Z Electrical characteristics
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2 Electrical characteristics
(TCASE=25°C unless otherwise specified)
Table 5. On/off states
Symbol Parameter Test conditions Min. Typ. Max. Unit
V(BR)DSS
Drain-source breakdown
voltage ID = 1mA, VGS= 0 1000 V
IDSS
Zero gate voltage drain
current (VGS = 0)
VDS = Max rating,
VDS = Max rating,
Tc = 125°C
1
50
µA
µA
IGSS
Gate body leakage current
(VGS = 0) VGS = ± 20V ±10 µA
VGS(th) Gate threshold voltage VDS = VGS, ID = 100µA 3 3.75 4.5 V
RDS(on)
Static drain-source on
resistance VGS = 10V, ID = 4.15 A 1.1 1.38 Ω
Table 6. Dynamic
Symbol Parameter Test conditions Min. Typ. Max. Unit
gfs (1)
1. Pulsed: pulse duration=300µs, duty cycle 1.5%
Forward transconductance VDS =15V, ID = 4.15A 9 S
Ciss
Coss
Crss
Input capacitance
Output capacitance
Reverse transfer
capacitance
VDS =25V, f=1 MHz, VGS=0
3500
270
60
pF
pF
pF
Cosseq(2).
2. Coss eq. is defined as a constant equivalent capacitance giving the same charging time as Coss when VDS
increases from 0 to 80% VDSS
Equivalent output
capacitance VGS=0, VDS =0V to 500V 170 pF
td(on)
tr
td(off)
tf
Turn-on delay time
Rise time
Off-voltage rise time
Fall time
VDD=800 V, ID= 8A,
RG=4.7Ω, VGS=10V
(see Figure 16)
27
18
98
55
ns
ns
ns
ns
Qg
Qgs
Qgd
Total gate charge
Gate-source charge
Gate-drain charge
VDD=800V, ID = 8A
VGS =10V
113
18
60
162 nC
nC
nC
Electrical characteristics STW11NK100Z
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Table 7. Source drain diode
Symbol Parameter Test conditions Min Typ. Max Unit
ISD Source-drain current 8.3 A
ISDM(1)
1. Pulse width limited by safe operating area
Source-drain current (pulsed) 33.2 A
VSD(2)
2. Pulsed: pulse duration=300µs, duty cycle 1.5%
Forward on voltage ISD=8.3A, VGS=0 1.6 V
trr
Qrr
IRRM
Reverse recovery time
Reverse recovery charge
Reverse recovery current
ISD=8.3,
di/dt = 100A/µs,
VDD=80V, Tj=25°C
(see Figure 18)
560
4.48
16
ns
µC
A
trr
Qrr
IRRM
Reverse recovery time
Reverse recovery charge
Reverse recovery current
ISD=8A,
di/dt = 100A/µs,
VDD=80V, Tj=150°C
(see Figure 18)
620
4.57
16
ns
µC
A
STW11NK100Z Electrical characteristics
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2.1 Electrical characteristics (curves)
Figure 1. Safe operating area Figure 2. Thermal impedance
Figure 3. Output characterisics Figure 4. Transfer characteristics
Figure 5. Transconductance Figure 6. Static drain-source on resistance
Electrical characteristics STW11NK100Z
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Figure 7. Gate charge vs gate-source voltage Figure 8. Capacitance variations
Figure 9. Normalized gate threshold voltage
vs temperature
Figure 10. Normalized on resistance vs
temperature
Figure 11. Source-drain diode forward
characteristics
Figure 12. Normalized BVDSS vs temperature
STW11NK100Z Electrical characteristics
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Figure 13. Maximum avalanche
energy vs temperature
Test circuit Package mechanical data STW11NK100Z
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3 Test circuit Package mechanical data
Figure 14. Unclamped Inductive load test
circuit
Figure 15. Unclamped Inductive waveform
Figure 16. Switching times test circuit for
resistive load
Figure 17. Gate charge test circuit
Figure 18. Test circuit for inductive load
switching and diode recovery times
STW11NK100Z Package mechanical data
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4 Package mechanical data
In order to meet environmental requirements, ST offers these devices in ECOPACK®
packages. These packages have a Lead-free second level interconnect . The category of
second level interconnect is marked on the package and on the inner box label, in
compliance with JEDEC Standard JESD97. The maximum ratings related to soldering
conditions are also marked on the inner box label. ECOPACK is an ST trademark.
ECOPACK specifications are available at: www.st.com
Package mechanical data STW11NK100Z
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DIM.
mm. inch
MIN. TYP MAX. MIN. TYP. MAX.
A 4.85 5.15 0.19 0.20
A1 2.20 2.60 0.086 0.102
b 1.0 1.40 0.039 0.055
b1 2.0 2.40 0.079 0.094
b2 3.0 3.40 0.118 0.134
c 0.40 0.80 0.015 0.03
D 19.85 20.15 0.781 0.793
E 15.45 15.75 0.608 0.620
e5.45 0.214
L 14.20 14.80 0.560 0.582
L1 3.70 4.30 0.14 0.17
L2 18.50 0.728
øP 3.55 3.65 0.140 0.143
øR 4.50 5.50 0.177 0.216
S5.50 0.216
TO-247 MECHANICAL DATA
STW11NK100Z Revision history
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5 Revision history
Table 8. Revision history
Date Revision Changes
21-Jun-2004 1Preliminary version
31-Jul-2006 2New template, no content change.
STW11NK100Z
14/14
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