1
LTC3780
3780f
High Efficiency, Synchronous,
4-Switch Buck-Boost Controller
■
Single Inductor Architecture Allows V
IN
Above,
Below or Equal to V
OUT
■
Wide V
IN
Range: 4V to 36V Operation
■
Synchronous Rectification: Up to 98% Efficiency
■
Current Mode Control
■
±1% Output Voltage Accuracy: 0.8V < V
OUT
< 30V
■
Phase-Lockable Fixed Frequency: 200kHz to 400kHz
■
Power Good Output Voltage Monitor
■
Internal LDO for MOSFET Supply
■
Quad N-Channel MOSFET Synchronous Drive
■
V
OUT
Disconnected from V
IN
During Shutdown
■
Adjustable Soft-Start Current Ramping
■
Foldback Output Current Limiting
■
Selectable Low Current Modes
■
Output Overvoltage Protection
■
Available in 24-Lead SSOP and Exposed Pad
(5mm × 5mm) 32-Lead QFN Packages
■
Automotive Systems
■
Telecom Systems
■
DC Power Distribution Systems
■
High Power Battery-Operated Devices
■
Industrial Control
High Efficiency Buck-Boost Converter
DESCRIPTIO
U
FEATURES
APPLICATIO S
U
TYPICAL APPLICATIO
U
+
VIN
TG2
0.1µF 0.1µF
BOOST2
SW2
BG2
TG1
BOOST1
SW1
BG1
PLLIN
RUN
VOSENSE
ITH
SS
SGND FCB
0.010Ω
4.7µF
2200pF
1µF
CER
100µF
16V
CER
ON/OFF
0.1µF
1000pF
2µH
20k
PGOOD
LTC3780
INTVCC
SENSE+SENSE–PGND
7.5k
3780 TA01
105k
1%
22µF
50V
CER
VIN
4V TO 36V
VOUT
12V
5A
The LTC
®
3780 is a high performance buck-boost switch-
ing regulator controller that operates from input voltages
above, below or equal to the output voltage. The constant
frequency current mode architecture allows a phase-
lockable frequency of up to 400kHz. With a wide 4V to 30V
(36V maximum) input and output range and seamless
transfers between operating modes, the LTC3780 is ideal
for automotive, telecom and battery-powered systems.
The operating mode of the controller is determined through
the FCB pin. For boost operation, the FCB mode pin can
select among Burst Mode
®
operation, Discontinuous mode
and Forced Continuous mode. During buck operation, the
FCB mode pin can select among Skip-Cycle mode, Discon-
tinuous mode and Forced Continuous mode. Burst Mode
operation and Skip-Cycle mode provide high efficiency
operation at light loads while Forced Continuous mode
and Discontinuous mode operate at a constant frequency.
Fault protection is provided by an output overvoltage
comparator and internal foldback current limiting. A Power
Good output pin indicates when the output is within 7.5%
of its designed set point.
Efficiency and Power Loss
VOUT = 12V, ILOAD = 5A
VIN (V)
0
EFFICIENCY (%)
POWER LOSS (W)
90
95
100
15 25
3780 TA01b
85
80
510 20 30 35
75
70
8
9
10
7
6
5
4
3
2
1
0
, LTC and LT are registered trademarks of Linear Technology Corporation.
Burst Mode is a registered trademark of Linear Technology Corporation.
All other trademarks are the property of their respective owners.
Protected by U.S. Patents, including 5481178, 6304066, 5929620, 5408150, 6580258,
patent pending on current mode architecture and protection
2
LTC3780
3780f
Input Supply Voltage (V
IN
)........................ –0.3V to 36V
Topside Driver Voltages
(BOOST1, BOOST2) .................................. –0.3V to 42V
Switch Voltage (SW1, SW2) ........................ –5V to 36V
INTV
CC
, EXTV
CC
, RUN, SS, (BOOST – SW1),
(BOOST2 – SW2), PGOOD.......................... –0.3V to 7V
PLLIN Voltage.......................................... –0.3V to 5.5V
PLLFLTR Voltage ...................................... –0.3V to 2.7V
FCB, STBYMD Voltages ....................... –0.3V to INTV
CC
I
TH
, V
OSENSE
Voltages .............................. –0.3V to 2.4V
ABSOLUTE MAXIMUM RATINGS
W
WW
U
Peak Output Current <10ms (TG1, TG2, BG1, BG2) .. 3A
INTV
CC
Peak Output Current ................................ 40mA
Operating Temperature Range (Note 7)
LTC3780E ........................................... – 40°C to 85°C
LTC3780I............................................ – 40°C to 85°C
Junction Temperature (Note 2)............................ 125°C
Storage Temperature Range .................. –65°C to 125°C
Lead Temperature (Soldering, 10 sec)
SSOP Only ........................................................ 300°C
(Note 1)
ORDER PART
NUMBER
LTC3780EG
LTC3780IG
T
JMAX
= 125°C, θ
JA
= 130°C/W
PACKAGE/ORDER INFORMATION
W
UU
Consult LTC Marketing for parts specified with wider operating temperature ranges.
1
2
3
4
5
6
7
8
9
10
11
12
TOP VIEW
G PACKAGE
24-LEAD PLASTIC SSOP
24
23
22
21
20
19
18
17
16
15
14
13
PGOOD
SS
SENSE
+
SENSE
–
I
TH
V
OSENSE
SGND
RUN
FCB
PLLFLTR
PLLIN
STBYMD
BOOST1
TG1
SW1
V
IN
EXTV
CC
INTV
CC
BG1
PGND
BG2
SW2
TG2
BOOST2
ORDER PART
NUMBER
LTC3780EUH
LTC3780IUH
32 31 30 29 28 27 26 25
9 10 11 12
TOP VIEW
33
UH PACKAGE
32-LEAD (5mm × 5mm) PLASTIC QFN
13 14 15 16
17
18
19
20
21
22
23
24
8
7
6
5
4
3
2
1SENSE
+
SENSE
–
I
TH
V
OSENSE
SGND
RUN
FCB
PLLFTR
SW1
V
IN
EXTV
CC
INTV
CC
BG1
PGND
BG2
SW2
NC
SS
PGOOD
NC
NC
BOOST1
TG1
NC
NC
PLLIN
STBYMD
NC
NC
BOOST2
TG2
NC
T
JMAX
= 125°C, θ
JA
= 34°C/W
EXPOSED PAD (PIN 33) IS SGND
(MUST BE SOLDERED TO PCB)
UH PART
MARKING
3780
3780I
The ● indicates specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VIN = 15V unless otherwise noted.
ELECTRICAL CHARACTERISTICS
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
Main Control Loop
V
OSENSE
Feedback Reference Voltage I
TH
= 1.2V (Note 3) ●0.792 0.800 0.808 V
I
VOSENSE
Feedback Pin Input Current (Note 3) –5 –50 nA
V
LOADREG
Output Voltage Load Regulation (Note 3)
∆I
TH
= 1.2V to 0.7V ● 0.1 0.5 %
∆I
TH
= 1.2V to 1.8V ●–0.1 –0.5 %
3
LTC3780
3780f
V
REF(LINEREG)
Reference Voltage Line Regulation V
IN
= 4V to 30V, I
TH
= 1.2V (Note 3) 0.002 0.02 %/V
g
m(EA)
Error Amplifier Transconductance I
TH
= 1.2V, Sink/Source = 3µA (Note 3) 0.32 mS
g
m(GBW)
Error Amplifier GBW 0.6 MHz
I
Q
Input DC Supply Current (Note 4)
Normal 2400 µA
Standby V
RUN
= 0V, V
STBYMD
> 2V 1500 µA
Shutdown Supply Current V
RUN
= 0V, V
STBYMD
= Open 55 70 µA
V
FCB
Forced Continuous Threshold 0.76 0.800 0.84 V
I
FCB
Forced Continuous Pin Current V
FCB
= 0.85V –0.30 –0.18 –0.1 µA
V
BINHIBIT
Burst Inhibit (Constant Frequency) Measured at FCB Pin 5.3 5.5 V
Threshold
UVLO Undervoltage Reset V
IN
Falling ●3.8 4 V
V
OVL
Feedback Overvoltage Lockout Measured at V
OSENSE
Pin 0.84 0.86 0.88 V
I
SENSE
Sense Pins Total Source Current V
SENSE–
= V
SENSE+
= 0V –380 µA
V
STBYMD(START)
Start-Up Threshold V
STBYMD
Rising 0.4 0.7 V
V
STBYMD(KA)
Keep-Alive Power-On Threshold V
STBYMD
Rising, V
RUN
= 0V 1.25 V
DF MAX, BOOST Maximum Duty Factor % Switch C On 99 %
DF MAX, BUCK Maximum Duty Factor % Switch A On (in Dropout) 99 %
V
RUN(ON)
RUN Pin On Threshold V
RUN
Rising 1 1.5 2 V
I
SS
Soft-Start Charge Current V
RUN
= 2V 0.5 1.2 µA
V
SENSE(MAX)
Maximum Current Sense Threshold Boost: V
OSENSE
= V
REF
– 50mV ●160 185 mV
Buck: V
OSENSE
= V
REF
– 50mV ●–95 –130 –150 mV
V
SENSE(MIN,BUCK)
Minimum Current Sense Threshold Discontinuous Mode –6 mV
TG1, TG2 t
r
TG Rise Time C
LOAD
= 3300pF (Note 5) 50 ns
TG1, TG2 t
f
TG Fall Time C
LOAD
= 3300pF (Note 5) 45 ns
BG1, BG2 t
r
BG Rise Time C
LOAD
= 3300pF (Note 5) 45 ns
BG1, BG2 t
f
BG Fall Time C
LOAD
= 3300pF (Note 5) 55 ns
TG1/BG1 t
1D
TG1 Off to BG1 On Delay, C
LOAD
= 3300pF Each Driver 80 ns
Switch C On Delay
BG1/TG1 t
2D
BG1 Off to TG1 On Delay, C
LOAD
= 3300pF Each Driver 80 ns
Synchronous Switch D On Delay
TG2/BG2 t
3D
TG2 Off to BG2 On Delay, C
LOAD
= 3300pF Each Driver 80 ns
Synchronous Switch B On Delay
BG2/TG2 t
4D
BG2 Off to TG2 On Delay, C
LOAD
= 3300pF Each Driver 80 ns
Switch A On Delay
Mode BG1 Off to BG2 On Delay, C
LOAD
= 3300pF Each Driver 90 ns
Transition 1 Switch A On Delay
Mode BG2 Off to BG1 On Delay, C
LOAD
= 3300pF Each Driver 90 ns
Transition 2 Synchronous Switch D On Delay
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
The ● indicates specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VIN = 15V unless otherwise noted.
ELECTRICAL CHARACTERISTICS
4
LTC3780
3780f
The ● indicates specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VIN = 15V unless otherwise noted.
ELECTRICAL CHARACTERISTICS
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
Note 1: Absolute Maximum Ratings are those values beyond which the life
of a device may be impaired.
Note 2: T
J
for the QFN package is calculated from the temperature T
A
and
power dissipation P
D
according to the following formula:
T
J
= T
A
+ (P
D
•
34°C/W)
Note 3: The IC is tested in a feedback loop that servos V
ITH
to a specified
voltage and measures the resultant V
OSENSE
.
Note 4: Dynamic supply current is higher due to the gate charge being
delivered at the switching frequency.
Note 5: Rise and fall times are measured using 10% and 90% levels. Delay
times are measured using 50% levels.
Note 6: The minimum on-time condition is specified for an inductor peak-
to-peak ripple current ≥ 40% of I
MAX
(see minimum on-time
considerations in the Applications Information section).
Note 7: The LTC3780E is guaranteed to meet performance specifications
from 0°C to 85°C. Performance over the –40°C to 85°C operating
temperature range is assured by design, characterization and correlation
with statistical process controls. The LTC3780I is guaranteed and tested
over the – 40°C to 85°C operating temperature range.
t
ON(MIN,BOOST)
Minimum On-Time for Main Switch in Switch C (Note 6) 200 240 ns
Boost Operation
t
ON(MIN,BUCK)
Minimum On-Time for Synchronous Switch B (Note 6) 180 220 ns
Switch in Buck Operation
Internal V
CC
Regulator
V
INTVCC
Internal V
CC
Voltage 7V < V
IN
< 30V, V
EXTVCC
= 5V ●5.7 6 6.3 V
∆V
LDO(LOADREG)
Internal V
CC
Load Regulation I
CC
= 0mA to 20mA, V
EXTVCC
= 5V 0.2 2 %
V
EXTVCC
EXTV
CC
Switchover Voltage I
CC
= 20mA, V
EXTVCC
Rising ●5.4 5.7 V
∆V
EXTVCC(HYS)
EXTV
CC
Switchover Hysteresis 200 mV
∆V
EXTVCC
EXTV
CC
Switch Drop Voltage I
CC
= 20mA, V
EXTVCC
= 6V 150 300 mV
Oscillator and Phase-Locked Loop
f
NOM
Nominal Frequency V
PLLFLTR
= 1.2V 260 300 330 kHz
f
LOW
Lowest Frequency V
PLLFLTR
= 0V 170 200 220 kHz
f
HIGH
Highest Frequency V
PLLFLTR
= 2.4V 340 400 440 kHz
R
PLLIN
PLLIN Input Resistance 50 kΩ
I
PLLLPF
Phase Detector Output Current f
PLLIN
< f
OSC
–15 µA
f
PLLIN
> f
OSC
15 µA
PGOOD Output
∆V
FBH
PGOOD Upper Threshold V
OSENSE
Rising 5.5 7.5 10 %
∆V
FBL
PGOOD Lower Threshold V
OSENSE
Falling –5.5 –7.5 –10 %
∆V
FB(HYST)
PGOOD Hysteresis V
OSENSE
Returning 2.5 %
V
PGL
PGOOD Low Voltage I
PGOOD
= 2mA 0.1 0.3 V
I
PGOOD
PGOOD Leakage Current V
PGOOD
= 5V ±1µA
5
LTC3780
3780f
TYPICAL PERFOR A CE CHARACTERISTICS
UW
Efficiency vs Output Current
(Boost Operation) Efficiency vs Output Current
Efficiency vs Output Current
(Buck Operation)
Supply Current vs Input Voltage Internal 6V LDO Line Regulation EXTVCC Voltage Drop
INTVCC and EXTVCC Switch
Voltage vs Temperature Load Regulation
I
LOAD
(A)
0.01
40
EFFICIENCY (%)
80
90
100
0.1 1 10
3780 G01
70
60
50
BURST
DCM
CCM
V
IN
= 6V
V
OUT
= 12V
I
LOAD
(A)
0.01
40
EFFICIENCY (%)
80
90
100
0.1 1 10
3780 G02
70
60
50
BURST
DCM CCM
V
IN
= 12V
V
OUT
= 12V
ILOAD (A)
0.01
40
EFFICIENCY (%)
80
90
100
0.1 1 10
3780 G03
70
60
50
SC
DCM
CCM
VIN = 18V
VOUT = 12V
INPUT VOLTAGE (V)
05
0
SUPPLY CURRENT (µA)
1000
2500
10 20 25
3780 G04
500
2000
1500
15 30 35
V
FCB
= 0V
STANDBY
SHUTDOWN
INPUT VOLTAGE (V)
0
INTVCC VOLTAGE (V)
5.5
6.0
6.5
15 25
3780 G05
5.0
4.5
510 20 30 35
4.0
3.5
CURRENT (mA)
1
0
EXTV
CC
VOLTAGE DROP (mV)
20
40
60
80
100
120
10 20 30 40
3780 G06
50
TEMPERATURE (°C)
–50
5.55
INTV
CC
AND EXTV
CC
SWITCH VOLTAGE (V)
5.60
5.70
5.75
5.80
6.05
5.90
050 75
3780 G07
5.65
5.95
6.00
5.85
–25 25 100 125
INTV
CC
VOLTAGE
EXTV
CC
SWITCHOVER THRESHOLD
EXTVCC Switch Resistance
vs Temperature
TEMPERATURE (°C)
–50 –25
0
EXTVCC SWITCH RESISTANCE (Ω)
2
5
050 75
3780 G08
1
4
3
25 100 125
LOAD CURRENT (A)
0
NORMALIZED V
OUT
(%)
–0.2
–0.1
0
4
3780 G09
–0.3
–0.4
–0.5 1235
V
IN
= 18V
FCB = 0V
V
OUT
= 12V
V
IN
= 12V
V
IN
= 6V
TA = 25°C unless otherwise noted.
6
LTC3780
3780f
Discontinuous Current Mode
(DCM, VIN = 6V, VOUT = 12V)
Continuous Current Mode
(CCM, VIN = 12V, VOUT = 12V)
SW2
10V/DIV
SW1
10V/DIV
VOUT
100mV/DIV
5µs/DIVVIN = 6V
VOUT = 12V
3780 G10
IL
2A/DIV
SW2
10V/DIV
SW1
10V/DIV
V
OUT
100mV/DIV
5µs/DIVV
IN
= 12V
V
OUT
= 12V
3780 G11
I
L
2A/DIV
SW2
10V/DIV
SW1
10V/DIV
V
OUT
100mV/DIV
5µs/DIVV
IN
= 18V
V
OUT
= 12V
3780 G12
I
L
2A/DIV
Continuous Current Mode
(CCM, VIN = 18V, VOUT = 12V)
Burst Mode Operation
(VIN = 6V, VOUT = 12V)
SW2
10V/DIV
SW1
10V/DIV
V
OUT
500mV/DIV
25µs/DIVV
IN
= 6V
V
OUT
= 12V
3780 G13
I
L
2A/DIV
Burst Mode Operation
(VIN = 12V, VOUT = 12V)
Skip Cycle Mode
(VIN = 18V, VOUT = 12V)
SW2
10V/DIV
SW1
10V/DIV
V
OUT
200mV/DIV
10µs/DIVV
IN
= 12V
V
OUT
= 12V
3780 G14
I
L
2A/DIV
SW2
10V/DIV
SW1
10V/DIV
V
OUT
100mV/DIV
2.5µs/DIVV
IN
= 18V
V
OUT
= 12V
3780 G15
I
L
1A/DIV
Discontinuous Current Mode
(DCM, VIN = 6V, VOUT = 12V)
Discontinuous Current Mode
(DCM, VIN = 12V, VOUT = 12V)
SW2
10V/DIV
SW1
10V/DIV
VOUT
100mV/DIV
5µs/DIVVIN = 6V
VOUT = 12V
3780 G16
IL
1A/DIV
SW2
10V/DIV
SW1
10V/DIV
V
OUT
100mV/DIV
5µs/DIVV
IN
= 12V
V
OUT
= 12V
3780 G17
I
L
2A/DIV
Discontinuous Current Mode
(DCM, VIN = 18V, VOUT = 12V)
SW2
10V/DIV
SW1
10V/DIV
V
OUT
100mV/DIV
2.5µs/DIVV
IN
= 18V
V
OUT
= 12V
3780 G18
I
L
1A/DIV
TYPICAL PERFOR A CE CHARACTERISTICS
UW
TA = 25°C unless otherwise noted.
7
LTC3780
3780f
Oscillator Frequency
vs Temperature
TEMPERATURE (°C)
–50
0
FREQUENCY (kHz)
50
150
200
250
50
450
3780 G19
100
0
–25 75 100
25 125
300
350
400 V
PLLFLTR
= 2.4V
V
PLLFLTR
= 1.2V
V
PLLFLTR
= 0V
TEMPERATURE (°C)
–50 –25
3.0
UNDERVOLTAGE RESET (V)
3.4
4.0
050 75
3780 G20
3.2
3.8
3.6
25 100 125
DUTY FACTOR (%)
–80
I
SENSE+
(mV)
–60
–40
–20
80 60 40 20
3780 G21
0100
Undervoltage Reset
vs Temperature
Minimum Current Sense
Threshold vs Duty Factor (Buck)
Maximum Current Sense
Threshold vs Duty Factor (Boost)
Minimum Current Sense
Threshold vs Temperature
DUTY FACTOR (%)
0
I
SENSE+
(mV)
140
160
80
3780 G22
120
100 20 40 60 100
180
Maximum Current Sense
Threshold vs Duty Factor (Buck)
DUTY FACTOR (%)
110
I
SNESE+
(mV)
120
130
140
20 40 60 80
3780 G23
1000
TEMPERATURE (°C)
–50
50
100
200
25 75
3780 G24
0
–50
–25 0 50 100 125
–100
–150
150
MAXIMUM I
SNESE+
THRESHOLD (mV)
BOOST
BUCK
Peak Current Threshold
vs VITH (Boost)
Valley Current Threshold
vs VITH (Buck)
VITH (V)
0
–100
ISENSE+ (mV)
–50
0
50
100
200
0.4 0.8 1.2 1.6
3780 G25
1.8 2.4
150
VITH (V)
0
–150
ISENSE+ (mV)
–100
–50
0
50
100
0.4 0.8 1.2 1.6
3780 G26
2.0 2.4
TYPICAL PERFOR A CE CHARACTERISTICS
UW
TA = 25°C unless otherwise noted.
8
LTC3780
3780f
Load Step
Line Transient Line Transient
V
OUT
500mV/DIV
200µs/DIVV
IN
= 18V
V
OUT
= 12V
LOAD STEP: 0A TO 5A
CONTINUOUS MODE
3780 G27
I
L
5A/DIV
VOUT
500mV/DIV
200µs/DIVVIN = 12V
VOUT = 12V
LOAD STEP: 0A TO 5A
CONTINUOUS MODE
3780 G28
IL
5A/DIV
VOUT
500mV/DIV
200µs/DIVVIN = 6V
VOUT = 12V
LOAD STEP: 0A TO 5A
CONTINUOUS MODE
3780 G29
IL
5A/DIV
Load Step Load Step
V
OUT
500mV/DIV
V
IN
10V/DIV
500µs/DIVV
OUT
= 12V
I
LOAD
= 1A
V
IN
STEP: 7V TO 20V
CONTINUOUS MODE
3780 G30
I
L
1A/DIV
VOUT
500mV/DIV
VIN
10V/DIV
500µs/DIVVOUT = 12V
ILOAD = 1A
VIN STEP: 20V TO 7V
CONTINUOUS MODE
3780 G31
IL
1A/DIV
UU
U
PI FU CTIO S
(SSOP/QFN)
PGOOD (Pin 1/Pin 30): Open-Drain Logic Output. PGOOD
is pulled to ground when the output voltage is not within
±7.5% of the regulation point.
SS (Pin 2/Pin 31): Soft-start reduces the input power
sources’ surge currents by gradually increasing the
controller’s current limit. A minimum value of 6.8nF is
recommended on this pin.
SENSE
+
(Pin 3/Pin 1): The (+) Input to the Current Sense
and Reverse Current Detect Comparators. The I
TH
pin
voltage and built-in offsets between SENSE
–
and SENSE
+
pins, in conjunction with R
SENSE
, set the current trip
threshold.
SENSE
–
(Pin 4/Pin 2): The (–) Input to the Current Sense
and Reverse Current Detect Comparators.
I
TH
(Pin 5/Pin 3): Current Control Threshold and Error Am-
plifier Compensation Point. The current comparator thresh-
old increases with this control voltage. The voltage ranges
from 0V to 2.4V.
TYPICAL PERFOR A CE CHARACTERISTICS
UW
TA = 25°C unless otherwise noted.
9
LTC3780
3780f
UU
U
PI FU CTIO S
V
OSENSE
(Pin 6/Pin 4): Error Amplifier Feedback Input. This
pin connects the error amplifier input to an external resis-
tor divider from V
OUT
.
SGND (Pin 7/Pin 5): Signal Ground. All small-signal com-
ponents and compensation components should connect to
this ground, which should be connected to PGND at a single
point.
RUN (Pin 8/Pin 6): Run Control Input. Forcing the RUN pin
below 1.5V causes the IC to shut down the switching regu-
lator circuitry. There is a 100k resistor between the RUN pin
and SGND in the IC. Do not apply >6V to this pin.
FCB (Pin 9/Pin 7): Forced Continuous Control Input. The
voltage applied to this pin sets the operating mode of the
controller. When the applied voltage is less than 0.8V, the
forced continuous current mode is active. When this pin
is allowed to float, the burst mode is active in boost
operation and the skip cycle mode is active in buck
operation. When the pin is tied to INTV
CC
, the constant
frequency discontinuous current mode is active in buck or
boost operation.
PLLFLTR (Pin 10/Pin 8): The Phase-Locked Loop’s Low-
pass Filter is Tied to This Pin. Alternatively, this pin can be
driven with an AC or DC voltage source to vary the frequency
of the internal oscillator.
PLLIN (Pin 11/Pin 10): External Synchronization Input to
Phase Detector. This pin is internally terminated to SGND
with 50kΩ. The phase-locked loop will force the rising
bottom gate signal of the controller to be synchronized with
the rising edge of the PLLIN signal.
STBYMD (Pin 12/Pin 11): LDO Control Pin. Determines
whether the internal LDO remains active when the control-
ler is shut down. See Operation section for details. If the
STBYMD pin is pulled to ground, the SS pin is internally
pulled to ground, preventing start-up and thereby provid-
ing a single control pin for turning off the controller.
Decouple this pin with 0.1µF if not tied to a DC potential.
(SSOP/QFN)
BOOST2, BOOST1 (Pins 13, 24/Pins 14, 27): Boosted
Floating Driver Supply. The (+) terminal of the bootstrap ca-
pacitor C
A
and C
B
(Figure 11) connects here. The BOOST2
pin swings from a diode voltage below INTV
CC
up to V
IN
+
INTV
CC.
The BOOST1 pin swings from a diode voltage below
INTV
CC
up to V
OUT
+ INTV
CC
.
TG2, TG1 (Pins 14, 23/Pins 15, 26): Top Gate Drive. Drives
the top N-channel MOSFET with a voltage swing equal to
INTV
CC
superimposed on the switch node voltage SW.
SW2, SW1 (Pins 15, 22/Pins 17, 24): Switch Node. The
(–) terminal of the bootstrap capacitor C
A
and C
B
(Figure 11)
connects here. The SW2 pin swings from a Schottky diode
(external) voltage drop below ground up to V
IN
. The SW1
pin swings from a Schottky diode (external) voltage drop
below ground up to V
OUT
.
BG2, BG1 (Pins 16, 18/Pins 18, 20): Bottom Gate Drive.
Drives the gate of the bottom N-channel MOSFET between
ground and INTV
CC
.
PGND (Pin 17/Pin 19): Power Ground. Connect this pin
closely to the source of the bottom N-channel MOSFET, the
(–) terminal of CV
CC
and the (–) terminal of C
IN
(Figure 11).
INTV
CC
(Pin 19/Pin 21): Internal 6V Regulator Output. The
driver and control circuits are powered from this voltage.
Decouple this pin to ground with a minimum of 4.7µF low
ESR tantalum or ceramic capacitor.
EXTV
CC
(Pin 20/Pin 22): External V
CC
Input. When EXTV
CC
exceeds 5.7V, an internal switch connects this pin to INTV
CC
and shuts down the internal regulator so that the controller
and gate drive power is drawn from EXTV
CC
. Do not exceed
7V at this pin and ensure that EXTV
CC
< V
IN
.
V
IN
(Pin 21/Pin 23): Main Input Supply. Decouple this pin
to SGND with an RC filter (1Ω, 0.1µF).
Exposed Pad (Pin 33, QFN Only): This pin is SGND and
must be soldered to PCB ground.
10
LTC3780
3780f
BLOCK DIAGRA
W
–
+
–
+
BOOST2
INTV
CC
V
IN
TG2
BG2
BG1
R
SENSE
PGND
FCB
FCB
INTV
CC
INTV
CC
INTV
CC
I
LIM
SW2
SW1
TG1
BOOST1
V
OSENSE
I
TH
V
FB
0.86V
V
OUT
0.80V
3780 BD
OV
EA
SHDN
RST
4(V
FB
)
RUN/
SS
BUCK
LOGIC
BOOST
LOGIC
SENSE
+
SENSE
–
–
+
I
REV
–
+
I
CMP
SLOPE
1.2V
4(V
FB
)
SS
1.2µA
100k
RUN
FCB
STBYMD
–
+
5.7V
6V
V
IN
V
IN
V
REF
INTERNAL
SUPPLY
EXTV
CC
INTV
CC
SGND
+
6V
LDO
REG
–
+
–
+
–
+
CLK
0.86V
0.74V
V
OSENSE
R
LP
C
LP
OSCILLATOR
PHASE DET
PLLFLTR
PLLIN
50k
F
IN
PGOOD
11
LTC3780
3780f
OPERATIO
U
MAIN CONTROL LOOP
The LTC3780 is a current mode controller that provides an
output voltage above, equal to or below the input voltage.
The LTC proprietary topology and control architecture
employs a current-sensing resistor in Buck or Boost modes.
The sensed inductor current is controlled by the voltage on
the I
TH
pin, which is the output of the amplifier EA. The
V
OSENSE
pin receives the voltage feedback signal, which is
compared to the internal reference voltage by the EA.
The top MOSFET drivers are biased from floating booststrap
capacitors C
A
and C
B
(Figure 11), which are normally
recharged through an external diode when the top MOSFET
is turned off. Schottky diodes across the synchronous
switch D and synchronous switch B are not required, but
provide a lower drop during the dead time. The addition of
the Schottky diodes will typically improve peak efficiency
by 1% to 2% at 400kHz.
The main control loop is shut down by pulling the RUN pin
low. When the RUN pin voltage is higher than 1.5V, an
internal 1.2µA current source charges soft-start capacitor
C
SS
at the SS pin. The I
TH
voltage is then clamped to the
SS voltage while C
SS
is slowly charged during start-up.
This “soft-start” clamping prevents abrupt current from
being drawn from the input power supply.
POWER SWITCH CONTROL
Figure 1 shows a simplified diagram of how the four power
switches are connected to the inductor, V
IN
, V
OUT
and
GND. Figure 2 shows the regions of operation for the
LTC3780 as a function of duty cycle D. The power switches
are properly controlled so the transfer between modes is
continuous. When V
IN
approaches V
OUT
, the Buck-Boost
region is reached; the mode-to-mode transition time is
typically 200ns.
Buck Region (V
IN
> V
OUT
)
Switch D is always on and Switch C is always off during
this mode. At the start of every cycle, Synchronous Switch
B is turned on first. Inductor current is sensed when
Synchronous Switch B is turned on. After the sensed
inductor current falls below the reference voltage, which is
proportional to V
ITH
, Synchronous Switch B is turned off
TG2
BG2
TG1
BG1
R
SENSE
3780 F01
A
B
D
C
L
SW2 SW1
V
IN
V
OUT
Figure 1. Simplified Diagram of the Output Switches
A ON, B OFF
PWM C, D SWITCHES
D ON, C OFF
PWM A, B SWITCHES
FOUR SWITCH PWM
98%
D
MAX
BOOST
3%
D
MIN
BUCK
D
MIN
BOOST
D
MAX
BUCK
BOOST REGION
BUCK REGION
BUCK/BOOST REGION
3780 F02
Figure 2. Operating Mode vs Duty Cycle
12
LTC3780
3780f
and Switch A is turned on for the remainder of the cycle.
Switches A and B will alternate, behaving like a typical
synchronous buck regulator. The duty cycle of switch A
increases until the maximum duty cycle of the converter in
Buck mode reaches D
MAX_BUCK
, given by:
D
MAX_BUCK
= (1 – D
BUCK-BOOST
) • 100%
where D
BUCK-BOOST
= duty cycle of the Buck-Boost switch
range:
D
BUCK-BOOST
= (200ns • f) • 100%
and f is the operating frequency in Hz.
Figure 3 shows typical Buck mode waveforms. If V
IN
approaches V
OUT
, the Buck-Boost region is reached.
Boost Region (V
IN
< V
OUT
)
Switch A is always on and Synchronous Switch B is always
off in Boost mode. Every cycle, Switch C is turned on first.
Inductor current is sensed when Synchronous Switch C is
turned on. After the sensed inductor current exceeds the
reference voltage which is proportional to V
ITH
, Switch C
is turned off and Synchronous Switch D is turned on for
the remainder of the cycle. Switches C and D will alternate,
behaving like a typical synchronous boost regulator.
OPERATIO
U
SWITCH A
CLOCK
SWITCH B
SWITCH C
SWITCH D
I
L
3780 F04a
(4a) Buck-Boost Mode (VIN ≥ VOUT)
SWITCH A
CLOCK
SWITCH B
SWITCH C
SWITCH D
I
L
3780 F04b
(4b) Buck-Boost Mode (VIN ≤ VOUT)
Figure 4. Buck-Boost Mode
SWITCH A
CLOCK
SWITCH B
SWITCH C
SWITCH D
I
0V
2.4V
3780 F03
Figure 3. Buck Mode (VIN > VOUT)
Buck-Boost (V
IN
≅ V
OUT
)
When V
IN
is close to V
OUT
, the controller is in Buck-Boost
mode. Figure 4 shows typical waveforms in this mode.
Every cycle, if the controller starts with Switches B and D
turned on, Switches A and C are then turned on. Finally,
Switches A and D are turned on for the remainder of the
time. If the controller starts with Switches A and C turned
on, Switches B and D are then turned on. Finally, Switches
A and D are turned on for the remainder of the time.
13
LTC3780
3780f
The duty cycle of Switch C decreases until the minimum
duty cycle of the converter in Buck mode reaches
D
MIN_BOOST
, given by:
D
MIN_BOOST
= (D
BUCK-BOOST
) • 100%
where D
BUCK-BOOST
is the duty cycle of the Buck-Boost
switch range:
D
BUCK-BOOST
= (200ns • f) • 100%
and f is the operating frequency in Hz.
Figure 5 shows typical boost mode waveforms. If V
IN
approaches V
OUT
, the Buck-Boost region is reached.
When the FCB pin voltage is lower than 0.8V, the control-
ler behaves as a continuous, PWM current mode syn-
chronous switching regulator. In Boost mode, Switch A is
always on. Switch C and Synchronous Switch D are
alternately turned on to maintain the output voltage
inde
pendent of direction of inductor current. Every ten
cycles, Switch A is forced off for about 300ns to allow C
A
to recharge. In Buck mode, Synchronous Switch D is
always on. Switch A and Synchronous Switch B are
alternately turned on to maintain the output voltage inde-
pendent of direction of inductor current. Every ten cycles,
Synchronous Switch D is forced off for about 300ns to
allow C
B
to recharge. This is the least efficient operating
mode at light load, but may be desirable in certain appli-
cations. In this mode, the output can source or sink
current. The sunk current will be forced back into the main
power supply potentially boosting the input supply to
dangerous voltage levels—BEWARE!
When the FCB pin voltage is below V
INTVCC
– 1V, but
greater than 0.8V, the controller enters Burst Mode opera-
tion in Boost operation or enters Skip-Cycle mode in Buck
operation. During Boost operation, Burst Mode operation
sets a minimum output current level before inhibiting the
switch C and turns off Synchronous Switch D when the
inductor current goes negative. This combination of re-
quirements will, at low currents, force the I
TH
pin below a
voltage threshold that will temporarily inhibit turn-on of
power switches C and D until the output voltage drops.
There is 100mV of hysteresis in the burst comparator tied
to the I
TH
pin. This hysteresis produces output signals to
the MOSFETs C and D that turn them on for several cycles,
followed by a variable “sleep” interval depending upon the
load current. The maximum output voltage ripple is limited
to 3% of the nominal DC output voltage as determined by
a resistive feedback divider. During buck operation, Skip-
Cycle mode sets a minimum positive inductor current
level. When inductor current is lower than this level,
Synchronous Switch B is kept off. In every cycle, the body
OPERATIO
U
SWITCH A
CLOCK
SWITCH B
SWITCH C
SWITCH D
I
0V
2.4V
3780 F05
Figure 5. Boost Mode (VIN < VOUT)
LOW CURRENT OPERATION
The FCB pin is a multifunction pin providing two functions:
1) to provide regulation for a secondary winding by
temporarily forcing continuous PWM operation in Buck
mode and 2) to select among three modes for both buck
and boost operations by accepting a logic input. Figure 6
shows the different modes.
FCB PIN BUCK MODE BOOST MODE
0V to 0.75V Force Continuous Mode Force Continuous Mode
0.85V to 5V Skip-Cycle Mode Burst Mode Operation
>5.3V DCM with Constant Freq DCM with Constant Freq
Figure 6. Different Operating Modes
14
LTC3780
3780f
diode of Synchronous Switch B or the Schottky diode,
which is in parallel in with Synchronous Switch B, is used
to discharge inductor current. As a result, some cycles will
be skipped when the output load current drops below 1%
of the maximum designed load in order to maintain the
output voltage.
When the FCB pin voltage is tied to the INTV
CC
pin, the
controller enters constant frequency Discontinuous Cur-
rent mode (DCM). For Boost operation, Synchronous
Switch D is held off whenever the I
TH
pin is below a
threshold voltage. In every cycle, Switch C is used to
charge inductor current. After the output voltage is high
enough, the controller will enter continuous current Buck
mode for one cycle to discharge inductor current. In the
following cycle, the controller will resume DCM Boost
operation. For Buck operation, constant frequency Dis-
continuous Current mode sets a minimum negative induc-
tor current level. Synchronous Switch B is turned off
whenever inductor current is lower than this level. At very
light loads, this constant frequency operation is not as
efficient as Burst Mode operation or Skip-Cycle, but does
provide lower noise, constant frequency operation.
FREQUENCY SYNCHRONIZATION AND
FREQUENCY SETUP
The phase-locked loop allows the internal oscillator to be
synchronized to an external source via the PLLIN pin. The
phase detector output at the PLLFLTR pin is also the DC
frequency control input of the oscillator. The frequency
ranges from 200kHz to 400kHz, corresponding to a DC
voltage input from 0V to 2.4V at PLLFLTR. When locked,
the PLL aligns the turn on of the top MOSFET to the rising
edge of the synchronizing signal. When PLLIN is left open,
the PLLFLTR pin goes low, forcing the oscillator to its
minimum frequency.
OPERATIO
U
INTV
CC
/EXTV
CC
POWER
Power for all power MOSFET drivers and most internal
circuitry is derived from the INTV
CC
pin. When the EXTV
CC
pin is left open, an internal 6V low dropout linear regulator
supplies INTV
CC
power. If EXTV
CC
is taken above 5.7V, the
6V regulator is turned off and an internal switch is turned
on, connecting EXTV
CC
to INTV
CC
. This allows the INTV
CC
power to be derived from a high efficiency external source.
POWER GOOD (PGOOD) PIN
The PGOOD pin is connected to an open drain of an internal
MOSFET. The MOSFET turns on and pulls the pin low when
the output is not within ±7.5% of the nominal output level
as determined by the resistive feedback divider. When the
output meets the ±7.5% requirement, the MOSFET is
turned off and the pin is allowed to be pulled up by an
external resistor to a source of up to 7V.
FOLDBACK CURRENT
Foldback current limiting is activated when the output
voltage falls below 70% of its nominal level, reducing power
waste. During start-up, foldback current limiting is disabled.
INPUT UNDERVOLTAGE RESET
The SS capacitor will be reset if the input voltage is allowed
to fall below approximately 4V. The SS capacitor will
attempt to charge through a normal soft-start ramp after
the input voltage rises above 4V.
15
LTC3780
3780f
OPERATIO
U
OUTPUT OVERVOLTAGE PROTECTION
An overvoltage comparator guards against transient over-
shoots (>7.5%) as well as other more serious conditions
that may overvoltage the output. In this case, Synchro-
nous Switch B and Synchronous Switch D are turned on
until the overvoltage condition is cleared or the maximum
negative current limit is reached. When inductor current is
lower than the maximum negative current limit, Synchro-
nous Switch B and Synchronous Switch D are turned off,
and Switch A and Switch C are turned on until the inductor
current reaches another negative current limit. If the
comparator still detects an overvoltage condition, Switch
A and Switch C are turned off, and Synchronous Switch B
and Synchronous Switch D are turned on again.
SHORT-CIRCUIT PROTECTION AND CURRENT LIMIT
Switch A on-time is limited by output voltage. When
output voltage is reduced and is lower than its nominal
level, Switch A on-time will be reduced.
In every Boost mode cycle, current is limited by a voltage
reference, which is proportional to the I
TH
pin voltage. The
maximum sensed current is limited to 160mV. In every
Buck mode cycle, the maximum sensed current is limited
to 130mV.
STANDBY MODE PIN
The STBYMD pin is a three-state input that controls
circuitry within the IC as follows: When the STBYMD pin
is held at ground, the SS pin is pulled to ground. When the
pin is left open, the internal SS current source charges the
SS capacitor, allowing turn-on of the controller and acti-
vating necessary internal biasing. When the STBYMD pin
is taken above 2V, the internal linear regulator is turned on
independent of the state on the RUN and SS pins, provid-
ing an output power source for “wake-up” circuitry.
Decouple the pin with a small capacitor (0.1µF) to ground
if the pin is not connected to a DC potential.
16
LTC3780
3780f
APPLICATIO S I FOR ATIO
WUUU
Figure 11 is a basic LTC3780 application circuit. External
component selection is driven by the load requirement,
and begins with the selection of R
SENSE
and the inductor
value. Next, the power MOSFETs are selected. Finally, C
IN
and C
OUT
are selected. This circuit can be configured for
operation up to an input voltage of 36V.
R
SENSE
Selection and Maximum Output Current
R
SENSE
is chosen based on the required output current.
The current comparator threshold sets the peak of the
inductor current in Boost mode and the maximum induc-
tor valley current in Buck mode. In Boost mode, the
maximum average load current is:
ImV V
RV
I
OUT MAX BOOST IN
SENSE OUT
L
(, )
•
•–=∆160
2
where ∆I
L
is peak-to-peak inductor ripple current. In Buck
mode,
the maximum average load current is:
ImV
R
I
OUT MAX BUCK SENSE
L
(, )
=+
∆130
2
Figure 7 shows how the load current (I
MAXLOAD
• R
SENSE
)
varies with input and output voltage
Allowing a margin for variations in LTC3780 and external
component values yields:
RmV V
IVI
SENSE IN
OUT MAX BOOST OUT L BOOST
=+∆
2 160
2
••
••
(, ) ( )
Selection of Operation Frequency
The LTC3780 uses a constant frequency architecture and
has an internal voltage controlled oscillator. The switching
frequency is determined by the internal oscillator capaci-
tor. This internal capacitor is charged by a fixed current
plus an additional current that is proportional to the
voltage applied to the PLLFLTR pin. The frequency of this
oscillator can be varied over a 2-to-1 range. The PLLFLTR
pin can be grounded to lower the frequency to 200kHz or
tied to 2.4V to yield approximately 400kHz. When PLLIN is
left open, the PLLFLTR pin goes low, forcing the oscillator
to minimum frequency.
A graph for the voltage applied to the PLLFLTR pin vs
frequency is given in Figure 8. As the operating frequency
is increased the gate charge losses will be higher, reducing
efficiency. The maximum switching frequency is approxi-
mately 400kHz.
V
IN
/V
OUT
(V)
0.1
100
I
MAX(LOAD)
• R
SENSE
(mV)
110
120
130
140
160
110
3780 F07
150
Figure 7. Load Current vs VIN/VOUT
PLLFLTR PIN VOLTAGE (V)
0
0
OPERATING FREQUENCY (kHz)
50
150
200
250
122.5
450
3780 F08
100
0.5 1.5
300
350
400
Figure 8. Frequency vs PLLFLTR Pin Voltage
17
LTC3780
3780f
APPLICATIO S I FOR ATIO
WUUU
Inductor Selection
The operating frequency and inductor selection are inter-
related in that higher operating frequencies allow the use
of smaller inductor and capacitor values. The inductor
value has a direct effect on ripple current. The inductor
current ripple ∆I
L
is typically set to 20% to 40% of the
maximum inductor current. For a given ripple the induc-
tance terms are as follows:
LVVV
I Ripple V H
LVV V
I Ripple V H
BOOST
IN MIN OUT IN MIN
OUT MAX OUT
BUCK
OUT IN MAX OUT
OUT MAX IN MAX
>
()
>
()
() ()
()
()
() ()
•– •
••%•
,
•–•
••%•
2
2
100
100
ƒ
ƒ
where:
f is operating frequency, Hz
% Ripple is allowable inductor current ripple, %
V
IN(MIN)
is minimum input voltage, V
V
IN(MAX)
is maximum input voltage, V
V
OUT
is output voltage, V
I
OUT(MAX)
is maximum output load current
For high efficiency, choose an inductor with low core loss,
such as ferrite and molypermalloy (from Magnetics, Inc.).
Also, the inductor should have low DC resistance to reduce
the I
2
R losses, and must be able to handle the peak
inductor current without saturating. To minimize radiated
noise, use a toroid, pot core or shielded bobbin inductor.
C
IN
and C
OUT
Selection
In Boost mode, input current is continuous. In Buck mode,
input current is discontinuous. In Buck mode, the selec-
tion of input capacitor C
IN
is driven by the need to filter the
input square wave current. Use a low ESR capacitor sized
to handle the maximum RMS current. For Buck operation,
the input RMS current is given by:
II V
V
V
V
RMS OUT MAX OUT
IN
IN
OUT
≈()
•• –1
This formula has a maximum at VIN = 2VOUT, where
IRMS = IOUT(MAX)/2. This simple worst-case condition is
commonly used for design because even significant
deviations do not offer much relief. Note that ripple
current ratings from capacitor manufacturers are often
based on only 2000 hours of life which makes it advisable
to derate the capacitor.
In Boost mode, the discontinuous current shifts from the
input to the output, so C
OUT
must be capable of reducing
the output voltage ripple. The effects of ESR (equivalent
series resistance) and the bulk capacitance must be con-
sidered when choosing the right capacitor for a given
output ripple voltage. The steady ripple due to charging
and discharging the bulk capacitance is given by:
Ripple Boost Cap IVV
CVf V
OUT MAX OUT IN MIN
OUT OUT
(,) •–
••
() ()
=
()
Ripple Buck Cap IVV
CV fV
OUT MAX IN MAX OUT
OUT IN MAX
(,) •–
••
() ()
()
=
()
where C
OUT
is the output filter capacitor.
The steady ripple due to the voltage drop across the ESR
is given by:
∆V
BOOST,ESR
= I
L(MAX,BOOST)
• ESR
∆V
BUCK,ESR
= I
L(MAX,BUCK)
• ESR
Multiple capacitors placed in parallel may be needed to
meet the ESR and RMS current handling requirements.
Dry tantalum, special polymer, aluminum electrolytic and
ceramic capacitors are all available in surface mount
packages. Ceramic capacitors have excellent low ESR
characteristics but can have a high voltage coefficient.
Capacitors are now available with low ESR and high ripple
current ratings such as OS-CON and POSCAP.
Power MOSFET Selection and
Efficiency Considerations
The LTC3780 requires four external N-channel power
MOSFETs, two for the top switches (Switch A and D,
shown in Figure 1) and two for the bottom switches
18
LTC3780
3780f
APPLICATIO S I FOR ATIO
WUUU
(Switch B and C shown in Figure 1). Important parameters
for the power MOSFETs are the breakdown voltage V
BR,DSS
,
threshold voltage V
GS,TH
, on-resistance R
DS(ON)
, reverse
transfer capacitance C
RSS
and maximum current I
DS(MAX)
.
The drive voltage is set by the 6V INTV
CC
supply. Conse-
quently, logic-level threshold MOSFETs must be used in
LTC3780 applications. If the input voltage is expected to
drop below 5V, then the sub-logic threshold MOSFETs
should be considered.
In order to select the power MOSFETs, the power dissi-
pated by the device must be known. For Switch A, the
maximum power dissipation happens in Boost mode,
when it remains on all the time. Its maximum power
dissipation at maximum output current is given by:
PV
VIR
A BOOST OUT
IN OUT MAX T DS ON,()()
•••=⎛
⎝
⎜⎞
⎠
⎟
2
ρ
where ρ
T
is a normalization factor (unity at 25°C) account-
ing for the significant variation in on-resistance with
temperature, typically about 0.4%/°C as shown in Fig-
ure 9. For a maximum junction temperature of 125°C,
using a value ρ
T
= 1.5 is reasonable.
Switch B operates in Buck mode as the synchronous
rectifier. Its power dissipation at maximum output current
is given by:
PVV
VIR
BBUCK IN OUT
IN OUT MAX T DS ON,()()
–•••=2ρ
Switch C operates in Boost mode as the control switch. Its
power dissipation at maximum current is given by:
PVVV
VIR
kV I
VCf
CBOOST OUT IN OUT
IN
OUT MAX T DS ON
OUT OUT MAX
IN RSS
,()()
()
–•••
•• ••
=
()
+
2
2
3
ρ
where C
RSS
is usually specified by the MOSFET manufac-
turers. The constant k, which accounts for the loss caused
by reverse recovery current, is inversely proportional to
the gate drive current and has an empirical value of 1.7.
For Switch D, the maximum power dissipation happens in
Boost mode, when its duty cycle is higher than 50%. Its
maximum power dissipation at maximum output current
is given by:
PV
V
V
VIR
DBUCK IN
OUT
OUT
IN OUT MAX T DS ON,()()
•• ••=⎛
⎝
⎜⎞
⎠
⎟
2
ρ
For the same output voltage and current, Switch A has the
highest power dissipation and Switch B has the lowest
power dissipation unless a short occurs at the output.
From a known power dissipated in the power MOSFET, its
junction temperature can be obtained using the following
formula:
T
J
= T
A
+ P • R
TH(JA)
JUNCTION TEMPERATURE (°C)
–50
ρ
T
NORMALIZED ON-RESISTANCE (Ω)
1.0
1.5
150
3780 F09
0.5
0050 100
2.0
Figure 9. Normalized RDS(ON) vs Temperature
19
LTC3780
3780f
APPLICATIO S I FOR ATIO
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The R
TH(JA)
to be used in the equation normally includes
the R
TH(JC)
for the device plus the thermal resistance from
the case to the ambient temperature (R
TH(JC)
). This value
of T
J
can then be compared to the original, assumed value
used in the iterative calculation process.
Schottky Diode (D1, D2) Selection
and Light Load Operation
The Schottky diodes D1 and D2 shown in Figure 1 conduct
during the dead time between the conduction of the power
MOSFET switches. They are intended to prevent the body
diode of Synchronous Switches B and D from turning on
and storing charge during the dead time. In particular, D2
significantly reduces reverse recovery current between
Switch D turn-off and Switch C turn-on, which improves
converter efficiency and reduces Switch C voltage stress.
In order for the diode to be effective, the inductance
between it and the synchronous switch must be as small
as possible, mandating that these components be placed
adjacently.
In Buck mode, when the FCB pin voltage is 0.85 < V
FCB
<
5V, the converter operates in Skip-Cycle mode. In this
mode, Synchronous Switch B remains off until the induc-
tor peak current exceeds one-fifth of its maximum peak
current. As a result, D1 should be rated for about one-half
to one-third of the full load current.
In Boost mode, when the FCB pin voltage is higher than
5.3V, the converter operates in Discontinuous Current
mode. In this mode, Synchronous Switch D remains off
until the inductor peak current exceeds one-fifth of its
maximum peak current. As a result, D2 should be rated for
about one-third to one-fourth of the full load current.
In Buck mode, when the FCB pin voltage is higher than
5.3V, the converter operates in constant frequency Dis-
continuous Current mode. In this mode, Synchronous
Switch B remains on until the inductor valley current is
lower than the sense voltage representing the minimum
negative inductor current level (V
SENSE
= –5mV). Both
Switch A and B are off until next clock signal.
In Boost mode, when the FCB pin voltage is 0.85 < V
FCB
<
5.3V, the converter operates in Burst Mode operation. In
this mode, the controller clamps the peak inductor current
to approximately 20% of the maximum inductor current.
The output voltage ripple can increase during Burst Mode
operation.
INTV
CC
Regulator
An internal P-channel low dropout regulator produces 6V
at the INTVCC pin from the VIN supply pin. INTVCC powers
the drivers and internal circuitry within the LTC3780. The
INTVCC pin regulator can supply a peak current of 40mA
and must be bypassed to ground with a minimum of 4.7µF
tantalum, 10µF special polymer or low ESR type electro-
lytic capacitor. A 1µF ceramic capacitor placed directly
adjacent to the INTVCC and PGND IC pins is highly
recommended. Good bypassing is necessary to supply
the high transient current required by MOSFET gate
drivers.
Higher input voltage applications in which large MOSFETs
are being driven at high frequencies may cause the
maximum junction temperature rating for the LTC3780 to
be exceeded. The system supply current is normally
dominated by the gate charge current. Additional external
loading of the INTVCC also needs to be taken into account
for the power dissipation calculations. The total INTVCC
current can be supplied by either the 6V internal linear
regulator or by the EXTVCC input pin. When the voltage
applied to the EXTVCC pin is less than 5.7V, all of the
INTVCC current is supplied by the internal 6V linear
regulator. Power dissipation for the IC in this case is
VIN • IINTVCC, and overall efficiency is lowered. The junc-
tion temperature can be estimated by using the equations
given in Note 2 of the Electrical Characteristics. For
example, LTC3780 VIN current is limited to less than
24mA from a 24V supply when not using the EXTVCC pin
as:
T
J
= 70°C + 24mV • 24V • 95°C/W = 125°C
Use of the EXTV
CC
input pin reduces the junction tempera-
ture to:
T
J
= 70°C + 24mV • 6V • 95°C/W = 84°C
To prevent maximum junction temperature from being
exceeded, the input supply current must be checked
operating in continuous mode at maximum V
IN
.
20
LTC3780
3780f
APPLICATIO S I FOR ATIO
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EXTV
CC
Connection
The LTC3780 contains an internal P-channel MOSFET
switch connected between the EXTV
CC
and INTV
CC
pins.
When the voltage applied to EXTV
CC
rises above 5.7V, the
internal regulator is turned off and a switch connects the
EXTV
CC
pin to the INTV
CC
pin thereby supplying internal
power. The switch remains closed as long as the voltage
applied to EXTV
CC
remains above 5.5V. This allows the
MOSFET driver and control power to be derived from the
output when (5.7V < V
OUT
< 7V) and from the internal
regulator when the output is out of regulation (start-up,
short-circuit). If more current is required through the
EXTV
CC
switch than is specified, an external Schottky
diode can be interposed between the EXTV
CC
and INTV
CC
pins. Ensure that EXTV
CC
≤ V
IN
.
The following list summarizes the three possible connec-
tions for EXTV
CC
:
1. EXTV
CC
left open (or grounded). This will cause INTV
CC
to be powered from the internal 6V regulator at the cost
of a small efficiency penalty.
2. EXTV
CC
connected directly to V
OUT
(5.7V < V
OUT
< 7V).
This is the normal connection for a 6V regulator and
provides the highest efficiency.
3. EXTV
CC
connected to an external supply. If an external
supply is available in the 5.5V to 7V range, it may be
used to power EXTV
CC
provided it is compatible with
the MOSFET gate drive requirements.
Output Voltage
The LTC3780 output voltage is set by an external feedback
resistive divider carefully placed across the output capaci-
tor. The resultant feedback signal is compared with the
internal precision 0.800V voltage reference by the error
amplifier. The output voltage is given by the equation:
VV
R
R
OUT =+
⎛
⎝
⎜⎞
⎠
⎟
08 1 2
1
.•
Topside MOSFET Driver Supply (C
A
, D
A
, C
B
, D
B
)
Referring to Figure 11, the external bootstrap capacitors
C
A
and C
B
connected to the BOOST1 and BOOST2 pins
supply the gate drive voltage for the topside MOSFET
Switches A and D. When the top MOSFET Switch A turns
on, the switch node SW2 rises to V
IN
and the BOOST2 pin
rises to approximately V
IN
+ INTVcc. When the bottom
MOSFET Switch B turns on, the switch node SW2 drops to
low and the boost capacitor C
B
is charged through D
B
from
INTV
CC
. When the top MOSFET Switch D turns on, the
switch node SW1 rises to V
OUT
and the BOOST1 pin rises
to approximately V
OUT
+ INTV
CC
. When the bottom MOS-
FET Switch C turns on, the switch node SW1 drops to low
and the boost capacitor C
A
is charged through D
A
from
INTV
CC
. The boost capacitors C
A
and C
B
need to store
about 100 times the gate charge required by the top
MOSFET Switch A and D. In most applications a 0.1µF to
0.47µF, X5R or X7R dielectric capacitor is adequate.
Run Function
The RUN pin provides simple ON/OFF control for the
LTC3780. Driving the RUN pin above 1.5V permits the
controller to start operating. Pulling RUN below 1.5V puts
the LTC3780 into low current shutdown. Do not apply
more than 6V to the RUN pin.
Soft-Start Function
Soft-start reduces the input power sources’ surge cur-
rents by gradually increasing the controller’s current limit
(proportional to an internally buffered and clamped equiva-
lent of V
ITH
).
An internal 1.2µA current source charges up the C
SS
capacitor. As the voltage on SS increases from 0V to 2.4V,
the internal current limit rises from 0V/R
SENSE
to
150mV/R
SENSE
. The output current limit ramps up slowly,
taking 1.5s/µF to reach full current. The output current
thus ramps up slowly, eliminating the starting surge
current required from the input power supply.
TV
ACsFC
IRMP SS SS
=µ=µ
()
24
12 15
.
.•./•
Do not apply more than 6V to the SS pin.
21
LTC3780
3780f
The Standby Mode (STBYMD) Pin Function
The Standby mode (STBYMD) pin provides several choices
for start-up and standby operational modes. If the pin is
pulled to ground, the SS pin is internally pulled to ground,
preventing start-up and thereby providing a single control
pin for turning off the controller. If the pin is left open or
decoupled with a capacitor to ground, the SS pin is
internally provided with a starting current, permitting
external control for turning on the controller. If the pin is
connected to a voltage greater than 1.25V, the internal
regulator (INTV
CC
) will be on even when the controller is
shut down (RUN pin voltage < 1.5V). In this mode, the
onboard 6V linear regulator can provide power to keep-
alive functions such as a keyboard controller.
FCB Pin Regulates Secondary Winding in Buck Mode
In Buck mode, the FCB pin can be used to regulate a
secondary winding or as a logic level input. Continuous
operation is forced when the FCB pin drops below 0.8V.
During continuous mode, current flows continuously in
the transformer primary. The secondary winding(s) draw
current only when Switch B and Switch D are on in Buck
mode. When primary load currents are low and/or the
V
IN
/V
OUT
ratio is low, the Synchronous Switch B may not
be on for a sufficient amount of time to transfer power
from the output capacitor to the secondary load. Forced
continuous operation will support secondary windings if
there is sufficient synchronous switch duty factor. Thus,
the FCB input pin removes the requirement that power
must be drawn from the auxiliary windings. With the loop
in continuous mode, the auxiliary outputs may nominally
be loaded without regard to the primary output load.
The secondary output voltage V
SEC
is normally set as
shown in Figure 10 by turns ratio N of the transformer:
V
SEC
≈ (N + 1) • V
OUT
However, if the controller goes into Burst Mode operation
and halts switching due to a light primary load current,
then V
SEC
will drop. An external resistive divider from V
SEC
to the FCB pin sets a minimum voltage V
SEC(MIN)
:
VR
R
SEC MIN()
.•≈+
⎛
⎝
⎜⎞
⎠
⎟
08 1 6
5
If the V
SEC
drops below this level, the FCB voltage forces
temporary continuous switching operation until V
SEC
is
again above its minimum.
In order to prevent erratic operation if no external connec-
tions are made to FCB pin, the FCB pin has a 0.18µA
internal current source pulling the pin high. Include this
current when choosing resistor values R5 and R6.
Fault Conditions: Current Limit and Current Foldback
The maximum inductor current is inherently limited in a
current mode controller by the maximum sense voltage. In
Boost mode, maximum sense voltage and the sense
resistance determines the maximum allowed inductor
peak current, which is:
ImV
R
L MAX BOOST SENSE
(, )
=160
APPLICATIO S I FOR ATIO
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A
TG2
BG2
SW1
TG1 C
OUT
R6
R5 BG1
R
SENSE
3780 F10
SW2
LTC3780
FCB
SGND
V
IN
V
SEC
T1
1:N
V
OUT
B
D
C
•
•
Figure 10. Secondary Output Loop
22
LTC3780
3780f
In Buck mode, maximum sense voltage and the sense
resistance determines the maximum allowed inductor
valley current, which is:
ImV
R
L MAX BUCK SENSE
(, )
=130
To further limit current in the event of a short circuit to
ground, the LTC3780 includes foldback current limiting. If
the output falls by more than 30%, then the maximum
sense voltage is progressively lowered to about one third
of its full value.
Fault Conditions: Overvoltage Protection
A comparator monitors the output for overvoltage condi-
tions. The comparator (OV) detects overvoltage faults
greater than 7.5% above the nominal output voltage.
When the condition is sensed, Switches A and C are turned
off, and Switches B and D are turned on until the overvolt-
age condition is cleared. During an overvoltage condition,
a negative current limit (V
SENSE
= –60mV) is set to limit
negative inductor current. When the sensed current in-
ductor current is lower than –60mV, Switch A and C are
turned on, and Switch B and D are turned off until the
sensed current is higher than –20mV. If the output is still
in overvoltage condition, Switch A and C are turned off,
and Switch B and D are turned on again.
Efficiency Considerations
The percent efficiency of a switching regulator is equal to
the output power divided by the input power times 100%.
It is often useful to analyze individual losses to determine
what is limiting the efficiency and which change would
produce the most improvement. Although all dissipative
elements in circuit produce losses, four main sources
account for most of the losses in LTC3780 circuits:
1. DC I
2
R losses. These arise from the resistances of the
MOSFETs, sensing resistor, inductor and PC board
traces and cause the efficiency to drop at high output
currents.
2. Transition loss. This loss arises from the brief amount
of time Switch A or Switch C spends in the saturated
region during switch node transitions. It depends upon
the input voltage, load current, driver strength and
MOSFET capacitance, among other factors. The loss is
significant at input voltages above 20V and can be
estimated from:
Transition Loss ≈ 1.7A
–1
• V
IN2
• I
OUT
• C
RSS
• f
where CR
SS
is the reverse transfer capacitance.
3. INTV
CC
current. This is the sum of the MOSFET driver
and control currents. This loss can be reduced by
supplying INTV
CC
current through the EXTV
CC
pin from
a high efficiency source, such as an output derived
boost network or alternate supply if available.
4. C
IN
and C
OUT
loss. The input capacitor has the difficult
job of filtering the large RMS input current to the regu-
lator in Buck mode. The output capacitor has the more
difficult job of filtering the large RMS output current in
Boost mode. Both C
IN
and C
OUT
are required to have low
ESR to minimize the AC I
2
R loss and sufficient capaci-
tance to prevent the RMS current from causing addi-
tional upstream losses in fuses or batteries.
5. Other losses. Schottky diode D1 and D2 are responsible
for conduction losses during dead time and light load
conduction periods. Inductor core loss occurs pre-
dominately at light loads. Switch C causes reverse
recovery current loss in Boost mode.
When making adjustments to improve efficiency, the input
current is the best indicator of changes in efficiency. If you
make a change and the input current decreases, then the
efficiency has increased. If there is no change in input
current, then there is no change in efficiency.
Design Example
As a design example, assume V
IN
= 5V to 18V (12V nomi-
nal), V
OUT
= 12V (5%), I
OUT(MAX)
= 5A and f = 400kHz.
APPLICATIO S I FOR ATIO
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23
LTC3780
3780f
Tie the PLLFLTR pin to INTV
CC
for 400kHz operation. The
inductance value is chosen first based on a 30% ripple
current assumption. In Buck mode, the ripple current is:
∆=⎛
⎝
⎜⎞
⎠
⎟
IV
fL
V
V
L BUCK OUT OUT
IN
,••–1
The highest value of ripple current occurs at the maximum
input voltage. In Boost mode, the ripple current is:
∆=⎛
⎝
⎜⎞
⎠
⎟
IV
fL
V
V
L BOOST IN IN
OUT
,
••–1
The highest value of ripple current occurs at V
IN
= V
OUT
/2.
A 6.8µH inductor will produce 13% ripple in Boost mode
(V
IN
= 6V) and 29% ripple in Buck mode (V
IN
= 18V).
The R
SENSE
resistor value can be calculated by using the
maximum current sense voltage specification with some
accommodation for tolerances.
RmV V
IIV
SENSE IN
OUT MAX BOOST L BOOST OUT
=+∆
()
2 160
2
••
••
(, ) ,
Select an R
SENSE
of 10mΩ.
Output voltage is 12V. Select R1 as 20k. R2 is:
RVR
R
OUT
21
08 1=•
.–
Select R2 as 280k. Both R1 and R2 should have a tolerance
of no more than 1%.
Next, choose the MOSFET switches. A suitable choice is
the Siliconix Si4840 (R
DS(ON)
= 0.009Ω (at V
GS
= 6V), C
RSS
= 150pF, θ
JA
= 40°C/W).
The maximum power dissipation of Switch A occurs
in Boost mode when Switch A stays on all the time.
Assuming a junction temperature of T
J
= 150°C with
ρ
150°C
= 1.5, the power dissipation at V
IN
= 5V is:
PW
A BOOST,
••.•. .=⎛
⎝
⎜⎞
⎠
⎟=
12
55 1 5 0 009 1 94
2
APPLICATIO S I FOR ATIO
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Double-check the T
J
in the MOSFET with 70°C ambient
temperature:
T
J
= 70°C + 1.94W • 40°C/W = 147.6°C
The maximum power dissipation of Switch B occurs in
Buck mode. Assuming a junction temperature of T
J
= 80°C
with ρ
80°C
= 1.2, the power dissipation at V
IN
= 18V is:
PmW
BBUCK,–••.•.==
18 12
12 5 1 2 0 009 135
2
Double-check the T
J
in the MOSFET at 70°C ambient
temperature:
T
J
= 70°C + 0.135W • 40°C/W = 75.4°C
The maximum power dissipation of Switch C occurs in
Boost mode. Assuming a junction temperature of T
J
= 110°C
with ρ
110°C
= 1.4, the power dissipation at V
IN
= 5V is:
P
pk W
CBOOST,
–• ••.•.
••• • .
=
()
+=
12 5 12
55 1 4 0 009
212 5
5150 400 1 08
2
2
3
Double-check the T
J
in the MOSFET at 70°C ambient
temperature:
T
J
= 70°C + 1.08W • 40°C/W = 113°C
The maximum power dissipation of Switch D occurs in
Boost mode when its duty cycle is higher than 50%.
Assuming a junction temperature of T
J
= 100°C with
ρ
100°C
= 1.35, the power dissipation at V
IN
= 5V is:
PW
DBUCK,•••.•. .=⎛
⎝
⎜⎞
⎠
⎟=
5
12
12
55 1 35 0 009 0 73
2
Double-check the T
J
in the MOSFET at 70°C ambient
temperature:
T
J
= 70°C + 0.73W • 40°C/W = 99°C
C
IN
is chosen to filter the square current in Buck mode. In
this mode, the maximum input current peak is:
I
IN,PEAK(MAX,BUCK)
= 5 • (1 + 29%) = 6.5A
24
LTC3780
3780f
A low ESR (10mΩ) capacitor is selected. Input voltage
ripple is 65mV.
C
OUT
is chosen to filter the square current in Boost mode.
In this mode, the maximum output current peak is:
IA
OUT PEAK MAX BUCK,(, )
•• % .=+
()
=
12
55 1 13 13 6
A low ESR (5mΩ) capacitor is suggested. This capacitor
will limit output voltage ripple to 68mV.
PC Board Layout Checklist
The basic PC board layout requires a dedicated ground
plane layer. Also, for high current, a multilayer board
provides heat sinking for power components.
• The ground plane layer should not have any traces and
it should be as close as possible to the layer with power
MOSFETs.
• Place C
IN
, Switch A, Switch B and D2 in one compact
area. Place C
OUT
, Switch C, Switch D and D1 in one
compact area.
• Use immediate vias to connect the components (in-
cluding the LTC3780’s SGND and PGND pins) to the
ground plane. Use several large vias for each power
component.
• Use planes for V
IN
and V
OUT
to maintain good voltage
filtering and to keep power losses low.
• Flood all unused areas on all layers with copper. Flood-
ing with copper will reduce the temperature rise of
power components. Connect the copper areas to any
DC net (V
IN
or GND).
When laying out the printed circuit board, the following
checklist should be used to ensure proper operation of the
LTC3780. These items are also illustrated in Figure 11.
• Segregate the signal and power grounds. All small
signal components should return to the SGND pin at
one point which is then tied to the PGND pin close to the
sources of Switch B and Switch C.
• Place Switch B and Switch C as close to the controller
as possible, keeping the PGND, BG and SW traces
short.
• Keep the high dV/dT SW1, SW2, BOOST1, BOOST2, TG1
and TG2 nodes away from sensitive small-signal nodes.
• The path formed by Switch A, Switch B, D2 and the C
IN
capacitor should have short leads and PC trace lengths.
The path formed by Switch C, Switch D, D1 and the C
OUT
capacitor also should have short leads and PC trace
lengths.
• The output capacitor (–) terminals should be connected
as close as possible the (–) terminals of the input
capacitor.
• Connect the INTV
CC
decoupling capacitor C
VCC
closely
to the INTV
CC
and PGND pins.
• Connect the top driver boost capacitor C
A
closely to the
BOOST1 and SW1 pins. Connect the top driver boost
capacitor C
B
closely to the BOOST2 and SW2 pins.
• Connect the input capacitors C
IN
and output capacitors
C
OUT
close to the power MOSFETs. These capacitors
carry the MOSFET AC current in Boost and Buck mode.
• Connect V
OSENSE
pin resistive dividers to the (+) termi-
nals of C
OUT
and signal ground. A small V
OSENSE
decoupling capacitor should be as close as possible to
the LTC3780 SGND pin. The R2 connection should not
be along the high current or noise paths, such as the
input capacitors.
• Route SENSE
–
and SENSE
+
leads together with mini-
mum PC trace spacing. The filter capacitor between
SENSE
+
and SENSE
–
should be as close as possible to
the IC. Ensure accurate current sensing with Kelvin
connections at the SENSE resistor.
• Connect the I
TH
pin compensation network close to the
IC, between I
TH
and the signal ground pins. The capaci-
tor helps to filter the effects of PCB noise and output
voltage ripple voltage from the compensation loop.
APPLICATIO S I FOR ATIO
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25
LTC3780
3780f
APPLICATIO S I FOR ATIO
WUUU
• Connect the INTV
CC
decoupling capacitor close to the
IC, between the INTV
CC
and the power ground pins.
This capacitor carries the MOSFET drivers’ current
peaks. An additional 1µF ceramic capacitor placed
immediately next to the INTVcc and PGND pins can help
improve noise performance substantially.
LTC3780 D
A
C
F
C
OUT
V
OUT
V
IN
f
IN
C
C1
C
C2
C
SS
C
IN
3780 F11
C
A
V
PULLUP
C
B
B
D
C
L
D1
A
C
VCC
R
SENSE
D
B
R
IN
PGOOD
SS
SENSE
+
SENSE
–
I
TH
V
OSENSE
SGND
RUN
FCB
PLLFLTR
PLLIN
STBYMD
BOOST1
TG1
SW1
V
IN
EXTV
CC
INTV
CC
BG1
PGND
BG2
SW2
TG2
BOOST2
1
2
3
4
5
6
7
8
9
10
11
12
24
23
22
21
20
19
18
17
16
15
14
13
R1 R2
R
C
R
PU
D2
Figure 11. LTC3780 Layout Diagram
26
LTC3780
3780f
G Package
24-Lead Plastic SSOP (5.3mm)
(Reference LTC DWG # 05-08-1640)
G24 SSOP 0204
0.09 – 0.25
(.0035 – .010)
0° – 8°
0.55 – 0.95
(.022 – .037)
5.00 – 5.60**
(.197 – .221)
7.40 – 8.20
(.291 – .323)
12345678 9 10 11 12
7.90 – 8.50*
(.311 – .335)
2122 18 17 16 15 14 13
19202324
2.0
(.079)
MAX
0.05
(.002)
MIN
0.65
(.0256)
BSC 0.22 – 0.38
(.009 – .015)
TYP
MILLIMETERS
(INCHES)
DIMENSIONS DO NOT INCLUDE MOLD FLASH. MOLD FLASH
SHALL NOT EXCEED .152mm (.006") PER SIDE
DIMENSIONS DO NOT INCLUDE INTERLEAD FLASH. INTERLEAD
FLASH SHALL NOT EXCEED .254mm (.010") PER SIDE
*
**
NOTE:
1. CONTROLLING DIMENSION: MILLIMETERS
2. DIMENSIONS ARE IN
3. DRAWING NOT TO SCALE
0.42 ±0.03 0.65 BSC
5.3 – 5.7
7.8 – 8.2
RECOMMENDED SOLDER PAD LAYOUT
1.25 ±0.12
U
PACKAGE DESCRIPTIO
27
LTC3780
3780f
5.00 ± 0.10
(4 SIDES)
NOTE:
1. DRAWING PROPOSED TO BE A JEDEC PACKAGE OUTLINE
M0-220 VARIATION WHHD-(X) (TO BE APPROVED)
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
PIN 1
TOP MARK
(NOTE 6)
0.40 ± 0.10
31
1
2
32
BOTTOM VIEW—EXPOSED PAD
3.45 ± 0.10
(4-SIDES)
0.75 ± 0.05 R = 0.115
TYP
0.25 ± 0.05
(UH32) QFN 1004
0.50 BSC
0.200 REF
0.00 – 0.05
0.70 ±0.05
3.45 ±0.05
(4 SIDES)
4.10 ±0.05
5.50 ±0.05
0.25 ± 0.05
PACKAGE
OUTLINE
0.50 BSC
RECOMMENDED SOLDER PAD LAYOUT PIN 1 NOTCH R = 0.30 TYP
OR 0.35 × 45° CHAMFER
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.20mm ON ANY SIDE
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION
ON THE TOP AND BOTTOM OF PACKAGE
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-
tation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
U
PACKAGE DESCRIPTIO
UH Package
32-Lead Plastic QFN (5mm × 5mm)
(Reference LTC DWG # 05-08-1693)
28
LTC3780
3780f
© LINEAR TECHNOLOGY CORPORATION 2005
LT/TP 0305 500 • PRINTED IN THE USA
Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900
●
FAX: (408) 434-0507
●
www.linear.com
TYPICAL APPLICATIO
U
LTC3780 DA
1N5819HW
DB
1N5819HW
CF 0.1µF
COUT
200µF
VOUT
12V
5A
VIN
CC1
3300pF
CC2
47pF
CSS
6.8nF
CIN
47µF
3780 TA02
CA
0.22µF
VPULLUP
CB 0.22µF
B
Si7884DP
C
Si7884DP
D
Si7884DP
L
6.8µF
D1
B320A
D2
B320A
A
Si7884DP
CVCC 4.7µF
10mΩ
10Ω
PGOOD
SS
SENSE+
SENSE–
ITH
VOSENSE
SGND
RUN
FCB
PLLFLTR
PLLIN
STBYMD
BOOST1
TG1
SW1
VIN
EXTVCC
INTVCC
BG1
PGND
BG2
SW2
TG2
BOOST2
1
2
3
4
5
6
7
8
9
10
11
12
24
23
22
21
20
19
18
17
16
15
14
13
100Ω
100Ω
R1
20k R2 280k
ON/OFF
INTVCC
RC
5.6k
RPU
68pF
CSTBYMD
0.01µF
Figure 12. LTC3780 12V/3A, Buck-Boost Regulator
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