1235 Bordeaux Drive, Sunnyvale, CA 94089 Tel: 408-222-8888 www.supertex.com
TN2425
Features
Low threshold
High input impedance
Low input capacitance
Fast switching speeds
Low on-resistance
Free from secondary breakdown
Low input and output leakage
Applications
Logic level interfaces - ideal for TTL and CMOS
Solid state relays
Battery operated systems
Photo voltaic drives
Analog switches
General purpose line drivers
Telecom switches
General Description
This low threshold, enhancement-mode (normally-off)
transistor utilizes a vertical DMOS structure and Supertex’s
well-proven, silicon-gate manufacturing process. This
combination produces a device with the power handling
capabilities of bipolar transistors and the high input impedance
and positive temperature coefficient inherent in MOS devices.
Characteristic of all MOS structures, this device is free
from thermal runaway and thermally-induced secondary
breakdown.
Supertex’s vertical DMOS FETs are ideally suited to a wide
range of switching and amplifying applications where very
low threshold voltage, high breakdown voltage, high input
impedance, low input capacitance, and fast switching speeds
are desired.
N-Channel Enhancement-Mode
Vertical DMOS FET
Absolute Maximum Ratings
Parameter Value
Drain-to-source voltage BVDSS
Drain-to-gate voltage BVDGS
Gate-to-source voltage ±20V
Operating and storage temperature -55OC to +150OC
Soldering temperature* 300OC
Absolute Maximum Ratings are those values beyond which damage to the device
may occur. Functional operation under these conditions is not implied. Continuous
operation of the device at the absolute rating level may affect device reliability. All
voltages are referenced to device ground.
* Distance of 1.6mm from case for 10 seconds.
Ordering Information
Device
Package Option BVDSS/BVDGS
(V)
RDS(ON)
(max)
(Ω)
ID(ON)
(min)
(A)
TO-243AA (SOT-89)
TN2425 TN2425N8-G 250 3.5 1.5
-G indicates package is RoHS compliant (‘Green’)
Pin Configuration
TO-243AA (SOT-89) (N8)
Product Marking
TO-243AA (SOT-89) (N8)
TN4CW W = Code for Week Sealed
= “Green” Packaging
GATE
SOURCE
DRAIN
DRAIN
Package may or may not include the following marks: Si or
2
TN2425
1235 Bordeaux Drive, Sunnyvale, CA 94089 Tel: 408-222-8888 www.supertex.com
Electrical Characteristics (TA = 25OC unless otherwise specified)
Sym Parameter Min Typ Max Units Conditions
BVDSS Drain-to-source breakdown voltage 250 - - V VGS = 0V, ID = 250µA
VGS(th) Gate threshold voltage 0.8 - 2.5 V VGS = VDS, ID= 1.0mA
ΔVGS(th) Change in VGS(th) with temperature - - -5.5 mV/OC VGS = VDS, ID= 1.0mA
IGSS Gate body leakage - - 100 nA VGS = ± 20V, VDS = 0V
IDSS Zero gate voltage drain current
- - 10 µA VGS = 0V, VDS = Max Rating
- - 1.0 mA VDS = 0.8Max Rating,
VGS = 0V, TA = 125OC
ID(ON) On-state drain current 0.8 - - AVGS = 4.5V, VDS = 25V
1.5 - - VGS = 10V, VDS = 25V
RDS(ON) Static drain-to-source on-state resistance
- - 6.0
Ω
VGS = 3.0V, ID = 150mA
- - 5.0 VGS = 4.5V, ID = 250mA
- - 3.5 VGS = 10V, ID = 500mA
ΔRDS(ON) Change in RDS(ON) with temperature - - 1.7 %/OC VGS = 10V, ID = 500mA
GFS Forward transductance 500 - - mmho VDS = 25V, ID = 250mA
CISS Input capacitance - 105 200
pF
VGS = 0V,
VDS = 25V,
f = 1.0MHz
COSS Common source output capacitance - 25 100
CRSS Reverse transfer capacitance - 7.0 40
td(ON) Turn-on delay time - 5.0 15
ns
VDD = 25V,
ID = 500mA,
RGEN = 25Ω
trRise time - 10 25
td(OFF) Turn-off delay time - 25 35
tfFall time - 5.0 15
VSD Diode forward voltage drop - - 1.5 V VGS = 0V, ISD = 500mA
trr Reverse recovery time - 300 - ns VGS = 0V, ISD = 500mA
Notes:
All D.C. parameters 100% tested at 25OC unless otherwise stated. (Pulse test: 300µs pulse, 2% duty cycle.)
All A.C. parameters sample tested.
1.
2.
Notes:
† ID (continuous) is limited by max rated Tj .
‡ Mounted on FR5 Board, 25mm x 25mm x 1.57mm.
Thermal Characteristics
Package
ID
(continuous)
(mA)
ID
(pulsed)
(A)
Power Dissipation
@TA = 25OC
(W)
θjc
(OC/W)
θja
(OC/W)
IDR
(mA)
IDRM
(A)
TO-243AA (SOT-89) 480 1.9 1.615 78480 1.9
Switching Waveforms and Test Circuit
90%
10%
90% 90%
10%
10%
PULSE
GENERATOR
V
DD
R
L
OUTPUT
D.U.T.
t(ON)
td(ON)
t(OFF)
td(OFF) tF
tr
INPUT
INPUT
OUTPUT
10V
V
DD
R
GEN
0V
0V
3
TN2425
1235 Bordeaux Drive, Sunnyvale, CA 94089 Tel: 408-222-8888 www.supertex.com
Typical Performance Curves
0.0 0.5 1.0 1.5 2.0
0.0
0.2
0.4
0.6
0.8
1.0
ID (Amperes)
VDS (Volts)
VGS = 10V
Output Characteristics
6V
5V
4V
3V
2.5V
Saturation Characteristics
ID (Amperes)
VDS (Volts)
VGS = 10V
8V
6V
4V
3V
2.5V
GFS (siemens)
ID (Amperes)
Transconductance vs. Drain Current Power Dissipation vs. Ambient Temperature
PD (Watts)
TA (OC)
Maximum Rated Safe Operating Area
ID (amperes)
VDS (Volts)
Thermal Response Characteristics
Thermal Resistance (normalized)
tp (seconds)
0 10 20 30 40 50
0
1
2
3
4
5
8V
0246810
0.0
0.5
1.0
1.5
2.0
2.5
3.0
5V
0 25 50 75 100 125 150
0.0
0.5
1.0
1.5
2.0
1 100010010
10
1.0
0.1
0.01
0.001
TO-243AA (DC)
TO-243AA (pulsed)
1.0
0.8
0.6
0.4
0.2
0.001 100.01 0.1 1.0
TO-243AA
PD = 1.6W
TC = 25OC
0
VDS =15V
TA =125OC
TA =25OC
TA =-55OC
TO-243AA
TA =25OC
4
TN2425
1235 Bordeaux Drive, Sunnyvale, CA 94089 Tel: 408-222-8888 www.supertex.com
Typical Performance Curves (cont.)
RDS(ON) (ohms)
ID (Amperes)
On Resistance vs. Drain Current
VGS(TH) and RDS(ON) w/ Temperature
VGS(th) (normalized)
TJ (OC)
Transfer Characteristics
ID (Amperes)
VGS (Volts)
0 2 4 6 8 10
0.0
0.5
1.0
1.5
2.0
2.5
3.0
VDS = 25V
TA = 25OC
-50 0 50 100 150
0.4
0.6
0.8
1.0
1.2
1.4
1.6
1.8
2.0
0.6
0.9
1.2
1.5
1.8
RDS(ON) @ 10V, 0.5A
VGS(th) @ 1mA
0 10 20 30 40 50
0
50
100
150
200
CRSS
COSS
CISS
f = 1MHz
0.0 1.0 2.0 3.0 4.0 5.0
0
2
4
6
8
10
ID = 480mA
VDS = 10V
-50 0 50 100 150
0.8
0.9
1.0
1.1
1.2
BV @ 250µA
453pF
128pF
BVDSS (normalized)
BVDSS Variation with Temperature
Capacitance vs. Drain Source Voltage
C (picofarads)
VDS (Volts)
Gate Drive Dynamic Characteristics
QG (nanocoulombs)
VGS (volts)
012345
0
2
4
6
8
10
VGS = 4.5V
VGS = 10V
RDS(ON) (normalized)
TA = 125OC
TA = -55OC
VDS = 40V
TJ (OC)
Supertex inc. does not recommend the use of its products in life support applications, and will not knowingly sell them for use in such applications unless it receives an
adequate “product liability indemnification insurance agreement.” Supertex inc. does not assume responsibility for use of devices described, and limits its liability to the
replacement of the devices determined defective due to workmanship. No responsibility is assumed for possible omissions and inaccuracies. Circuitry and specifications
are subject to change without notice. For the latest product specifications refer to the Supertex inc. website: http//www.supertex.com.
©2009 All rights reserved. Unauthorized use or reproduction is prohibited.
1235 Bordeaux Drive, Sunnyvale, CA 94089
Tel: 408-222-8888
www.supertex.com
5
TN2425
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline
information go to http://www.supertex.com/packaging.html.)
Doc.# DSFP-TN2425
A051909
3-Lead TO-243AA (SOT-89) Package Outline (N8)
Symbol A b b1 C D D1 E E1 e e1 H L
Dimensions
(mm)
MIN 1.40 0.44 0.36 0.35 4.40 1.62 2.29 2.00
1.50
BSC
3.00
BSC
3.94 0.89
NOM - - - - - - - - - -
MAX 1.60 0.56 0.48 0.44 4.60 1.83 2.60 2.29 4.25 1.20
JEDEC Registration TO-243, Variation AA, Issue C, July 1986.
This dimension differs from the JEDEC drawing
Drawings not to scale.
Supertex Doc. #: DSPD-3TO243AAN8, Version E051509.
bb1