2015-2018 Microchip Technology Inc. Advanced DS60001371E-Page 1
IS1870/71
Features
• Bluetooth smart 4.2 Bluetooth Low Energy (BLE)
compliant
• 256 Kbytes embedded Flash memory
• UART/SPI/I2C interface supported
• Integrated crystal oscillator operates with 32 MHz
external crystal
• Temperature sensor supported
• 31 general purpose I/O (GPIO) pins for
IS1870 SoC and 15 GPIO pins for IS1871 SoC
• Supports 4-channel pulse-width modulation
(PWM) for IS1870 SoC and 1-channel PWM for
IS1871 SoC
• Supports 12-bit ADC (ENOB=10 or 8 bits) for bat-
tery and voltage detection
• 16-channel ADC for IS1870 SoC and 6-channel
ADC for IS1871 SoC are provided
• AES-CMAC hardware engine
• Beacon support
• Low power consumption
• Compact size:
- IS1871: 4 mm x 4 mm 32QFN package
- IS1870: 6 mm x 6 mm 48QFN package
Radio Frequency (RF)/Analog Features
• ISM band: 2.402 GHz to 2.480 GHz operation
• Channels: 0 to 39
• Rx sensitivity: -90 dBm in BLE mode
• Tx power: 0 dBm (typical)
• Received Signal Strength Indicator (RSSI) moni-
tor
Operating Conditions
• Operating voltage: 1.9V to 3.6V
• Operating temperature: -40°C to +85°C
Applications
• Internet of Things (IoT)
• Wearable, fitness, or healthcare
• Weighing scale
• Proximity/Find Me services
• Secure payment
• Digital beacons
• Consumer appliances or home automation
• Industrial
Packages
Type IS1870 IS1871
Pin count 48 32
I/O pins (up to) 31 15
Contact/lead pitch 0.4 0.4
Dimensions 6x6x0.9 4x4x0.9
Package QFN48 QFN32
Note: All dimensions are in millimeters (mm) unless specified.
Bluetooth® Low Energy (BLE) SoC
IS1870/71
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NOTES:
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IS1870/71
Table of Contents
1.0 Device Overview .............................................................................................................................................................................. 5
2.0 System Block Details ..................................................................................................................................................................... 13
3.0 Electrical Characteristics................................................................................................................................................................17
4.0 Package Information ...................................................................................................................................................................... 21
5.0 Reflow Profile and Storage Condition ............................................................................................................................................ 27
6.0 Ordering Guide .............................................................................................................................................................................. 31
Appendix A: Reference Circuit............................................................................................................................................................. 33
Appendix B: Layout Guidelines............................................................................................................................................................ 37
Appendix C: Revision History .............................................................................................................................................................. 39
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IS1870/71
DS60001371E-Page 4 Advanced 2015-2018 Microchip Technology Inc.
NOTES:
2015-2018 Microchip Technology Inc. Advanced DS60001371E-Page 5
IS1870/71
1.0 DEVICE OVERVIEW
The IS1870/71 SoC contains a 2.4 GHz transceiver, a
Power Management Unit (PMU), Microchip’s BLE soft-
ware stack, and an RF power amplifier.
The default factory configuration is designed to work
with a host MCU to provide the user with an embedded
BLE design setup for the IoT application domain.
The IS1870/71 SoC provides:
• Simple integration and programming
• Reduced development time
• Superior BLE solution with low-cost system
• Interoperability with Apple® iOS and Android™
OS
• Wide range of application support
With the default factory configuration, the IS1870/71
SoC supports Beacon technology, where the
automation of BLE connection/control and cloud
connectivity are common.
The IS1870/71 SoC is optimized to maintain a low
power wireless connection. The low power
consumption and flexible power management maxi-
mize the IS1870/71 SoC lifetime in battery operated
devices. A wide operating temperature range enables
its applications in indoor and outdoor environments
(industrial temperature range is -40°C to +85°C).
The small form factor package size of the IS1870/71
SoC is designed for wearable applications. The solu-
tion providers can minimize the module size to meet
the market requirements, which is commonly seen in
the IoT application domain.
To operate in the 2.4 GHz ISM band radio, the
IS1870/71 SoC is certified for the Bluetooth v4.2 core
specification, including support for the enhanced
throughput and the Federal Information Processing
Standard (FIPS) compliant encryption support for
secure data connections.
The IS1870/71 SoC integrates transceiver and base-
band functions to decrease external components.
Microchip provides free Bluetooth stack firmware to
build an embedded BLE solution, using the IS1870/71
SoC.
Note: Flexibility of the IS1870/71 SoC enables
the user to work in a host-less
implementation. In this configuration, the
user can embed a full application into the
IS1870/71 SoC. Contact your local
Microchip representative for further
guidance on obtaining this setup.
IS1870/71
DS60001371E-Page 6 Advanced 2015-2018 Microchip Technology Inc.
Figure 1-1 illustrates a typical block diagram of the
IS1870 SoC.
FIGURE 1-1: BLOCK DIAGRAM OF THE IS1870 SOC
Note 1: Users can enable other peripheral (SPI and I2C) functions of the IS1870/71 IC by changing the default
factory firmware. For more details, contact local Microchip representatives.
2: An external host MCU is required when using the default factory firmware.
2015-2018 Microchip Technology Inc. Advanced DS60001371E-Page 7
IS1870/71
Figure 1-2 illustrates a typical block diagram of the
IS1871 SoC-based system.
FIGURE 1-2: IS1871 SOC-BASED SYSTEM BLOCK DIAGRAM
Table 1-1 provides the key features of the IS1870/71
SoC.
Note 1: To make these peripherals available to a designer, contact your local Microchip representative.
Note 1: Users can enable other peripheral (SPI and I2C) functions of the IS1870/71 IC by changing the default
factory firmware. For more details, contact your local Microchip representatives.
2: An external host MCU is required when using the default factory firmware.
TABLE 1-1: KEY FEATURES
Features IS1870 IS1871
UART 1 1
GPIO 31 15
12-bit ADC channels 16 6
PWM 4 1
SPI (see Note 1)2 1
I2C (see Note 1)1 1
Pins 48 32
Size 6x6x0.9 mm 4x4x0.9 mm
Event counter 2 0
AES-CMAC H/W engine Yes Yes
2015-2018 Microchip Technology Inc. Advanced DS60001371E-Page 9
IS1870/71
FIGURE 1-4: IS1871 SOC PIN ASSIGNMENT
IS1870/71
DS60001371E-Page 10 Advanced 2015-2018 Microchip Technology Inc.
Table 1-2 provides the functions of the various pins in
the IS1870/71 SoC.
TABLE 1-2: IS1870/71 SOC PIN DESCRIPTION
IS1870
Pin No.
IS1871
Pin No. Pin Name Type Description
132 P1_0 DIO
AI
GPIO: P1_0
ADC input: AD8
TX_CLS1: Class 1 RF Tx Control
2—P1_1DIO
AI
DI
GPIO: P1_1
ADC input: AD9
SPI bus: MISO2: second SPI bus (Master Mode)
31P1_2DIO
AI
I/O
GPIO: P1_2
ADC input: AD10
I2C SCL
42P1_3DIO
AI
DIO
GPIO: P1_3
ADC input: AD11
I2C SDA
5—P1_4DIO
AI
DI
GPIO: P1_4
ADC input: AD12
Event Counter
6—P1_5DIO
AI
DI
GPIO: P1_5
ADC input: AD13
Event Counter
73P1_7DIO
AO
GPIO: P1_7
External 32.768 kHz Crystal Output: XO32K
84P1_6DIO
AI
GPIO: P1_6
External 32.768 kHz Crystal Input: XI32K
95HCI_TXDDO HCI UART TXD
10 6 HCI_RXD DI HCI UART RXD
11 —P3_0DIO GPIO: P3_0
12 7P3_1DIO
DO
GPIO: P3_1
SPI bus: NCS, SPI Flash: CSN
13 8P3_2DIO
DI
GPIO: P3_2
SPI bus: MISO, SPI Flash: SDO
14 9P3_3DIO
DO
GPIO: P3_3
SPI bus: MOSI, SPI Flash: SDI
15 10 P3_4 DIO
DO
GPIO: P3_4
SPI bus: SCLK, SPI Flash: SCK
16 —P3_5DIO
AI
GPIO: P3_5
LED1
17 11 P3_6 DIO
DO
DO
GPIO: P3_6
UART flow-control RTS
PWM0
18 12 RST_N DI External Reset
19 13 P0_0
DIO
AI
DI
GPIO: P0_0
ADC input: AD0
UART flow-control CTS
20 —P0_1DIO
AI
GPIO: P0_1
ADC input: AD1
Legend: A = Analog D = Digital I = Input O = Output P = Power
2015-2018 Microchip Technology Inc. Advanced DS60001371E-Page 11
IS1870/71
21 14 P0_2
DIO
AI
AI
GPIO: P0_2
ADC input: AD2
LED0
22 —P0_3DIO
AI
GPIO:P0_3
ADC input: AD3
23 —P0_4DIO
AI
GPIO:P0_4
ADC input: AD4
24 —P0_5DIO
AI
GPIO:P0_5
ADC input: AD5
25 —P0_6DIO
AI
GPIO:P0_6
ADC input: AD6
26 —P0_7DIO
AI
GPIO:P0_7
ADC input: AD7
27 15 BK_O P1.55V buck regulator output. For internal use, do not connect to
external devices)
28 16 BK_LX P1.55V buck regulator output. For internal use, do not connect to
external devices
29 17 BK_IN PBuck input. Voltage Range: 1.9V to 3.6V
30 18 VBAT PBattery input. Voltage Range: 1.9V to 3.6V. Connect to BK_IN
and a 10 μF decoupling capacitor, as illustrated in Figure A-1
and Figure A-3.
31 19 AVDD PInput of LDOs: CLDO, PALDO, and RFLDO
32 20 CLDO_O P1.2V CLDO Output: Core-logic and memories supply, connect to
1 μF (X5R/X7R) capacitor
33 21 ULPC_O P1.2V Programmable ULPC Output: Always On logic and reten-
tion memory supply (for internal use, do not connect to external
devices)
34 22 VREF P PMU band-gap reference voltage output for LDOs and buck (for
internal use, do not connect to external devices)
35 23 XO_N A 32 MHz crystal input negative
36 24 XO_P A 32 MHz crystal input positive
37 25 VCC_RF P Power input for VCO and RF (1.28V). Connect to 1 μF
(X5R/X7R) capacitor
38 26 Rx AI RF receive path
39 27 Tx AO RF transmit path
40 28 VCC_PA P Power supply for power amplifier (1.55V). Connect to 0.22 μF
X5R/X7R
41 29 P2_0 DIO
Mode Configuration
H: Application mode
L: Test mode
42 — P2_1 DIO
DO
GPIO: P2_1
PWM0
43 — P2_2 DIO
DO
GPIO: P2_2
PWM1
44 — P2_3 DIO
DO
GPIO: P2_3
PWM2
TABLE 1-2: IS1870/71 SOC PIN DESCRIPTION (CONTINUED)
IS1870
Pin No.
IS1871
Pin No. Pin Name Type Description
Legend: A = Analog D = Digital I = Input O = Output P = Power
IS1870/71
DS60001371E-Page 12 Advanced 2015-2018 Microchip Technology Inc.
45 30 P2_4 DIO GPIO: P2_4
TX_CLS1: Class 1 RF RX Control
46 — P2_5 DIO
AI
DO
GPIO: P2_5
ADC input: AD15
PWM3
47 — P2_6 DIO P26
48 31 P2_7
DIO
AI
DO
GPIO: P27
ADC input: AD14
SPI bus: NCS2, second SPI bus (Master mode)
TABLE 1-2: IS1870/71 SOC PIN DESCRIPTION (CONTINUED)
IS1870
Pin No.
IS1871
Pin No. Pin Name Type Description
Legend: A = Analog D = Digital I = Input O = Output P = Power
2015-2018 Microchip Technology Inc. Advanced DS60001371E-Page 13
IS1870/71
2.0 SYSTEM BLOCK DETAILS
2.1 System Block Descriptions
This section provides a description of the blocks used
in the IS1870/71 SoC.
2.1.1 PMU
The IS1870/71 SoC includes a DC-DC converter and
four LDOs. Microchip's BLE software stack is used for
controlling and operating these LDOs in various
modes, controlling the amount of time the peak current
is active, maximizing the battery life. The factory
firmware enables the designer to perform the
calibration for the internal LDOs to compensate for
variations in the board design and other
manufacturing-related artifacts.
Figure 2-1 illustrates the power tree diagram of the
IS1870/71 SoC.
FIGURE 2-1: IS1870/71 SOC POWER TREE DIAGRAM
2.1.2 ALWAYS ON LOGIC
Always On (AON) is the hardware-based state
machine, which is controlled by Microchip's Bluetooth
stack. Together, the software and hardware logic main-
tain the power-up, power-down, and low power
sequences of the IS1870/71 SoC, by providing optimal
device performance. It includes an RTC timer and I/O
detector to wake-up the system from Power-Saving
mode using time out or external general I/O transition.
This allows the SoC to run in Power-Saving mode while
maintaining an active connection with a peer device
and minimizing power consumption.
2.1.3 RF
This SoC is controlled by Microchip’s Bluetooth stack,
which contains an on-chip RF circuit, a controller, and
a modulator (Tx)/demodulator (Rx). The Tx is used to
control the synthesizer's phase and output power, and
modulate the data based on the BLE specifications.
The Rx is used to decode the Bluetooth signal and
optimize the performance, such as IQ-imbalance,
suppress DC, and flick noise. It is also used to
compensate the frequency drift and offset, and filter out
interference to maximize receiver sensitivity.
2.1.4 MCU
Microchip provides the BLE software stack, which runs
on the IS1870/71 SoC’s internal 8051 core. The stack
resides in a combination of ROM, RAM, and embedded
Flash. The software stack is responsible for scheduling
the BLE tasks and for processing the BLE protocol and
profiles.
IS1870/71
DS60001371E-Page 14 Advanced 2015-2018 Microchip Technology Inc.
2.2 System Block Specification
The following are the system block specifications.
2.2.1 RF
• Bluetooth BT4.2 LE compliant SoC
• Frequency: 2.402 GHz to 2.480 GHz
• Programmable transmit output power up to
+3 dBm maximum
• -25 dBm minimum Tx power to search nearby
devices
• -90 dBm typical receiver power sensitivity
• Digital RSSI indicator (-50 dBm to -90 dBm)
• -40°C to +85°C BLE RF certified
2.2.2 PMU
• Operating battery input voltage range: 1.9V to
3.6V
• 1.28V RFLDO: RF IP power supply
• 1.55V PALDO: RF Tx power amplify supply
• 1.2V CLDO: Core-logic and memories supply
• 1.55V DC-DC switching buck converter
• 1.2V programmable ULPC to supply AON-logic
and retention memory
• AON-logic to control power-up, power-down and
wake-up procedures
• Internal 32 kHz (±250 ppm) ultra-low power oscil-
lator
• Power-on Reset
2.2.3 MCU
• 8051 core with scalable clock
•ROM: 32 KB
• Main SRAM: 24 KB
• Embedded Flash: 256 KB for Device Firmware
Upgrade (DFU) and run-time data storage
2.2.4 PERIPHERALS
• Flexible GPIO pin configuration
• ADC:
- 0V to 3.6V, 12-bit SDM-ADC with 16-channel
(IS1870) or 6-Channel (IS1871) hybrid-I/O
(Multi-Function). It can be configured as ADC
or GPIO input
• Internal 1.9V to 3.6V battery voltage monitor
• Precision Temperature Sensor (PTS) for ambient
temperature detection
• 4 MHz clock-rate full duplex 4-wire master/slave
SPI with 256 bytes buffer DMA
• HCI over UART up to 921600 bps with flow-con-
trol
• Two wire serial interface (compatible to I2C)
• Three wire serial interface (compatible to SPI)
• GPIO pins with input internal pull up /Hi-Z select-
able
• 24-bit low-power Real Time Counter (RTC) for
background timer in Standby mode
• Watchdog timer
• Event Counter option (P1_4 and P1_5) provides
capture/counter function to external events for fre-
quency calculation. It provides 1K/32K/1M/16M
clock rate option to count the frequency range
from 60 Hz to 1 MHz. The continuous/one shot
count mode can be selected
• Specific GPIO pins (P1_6 and P1_7) support
external 32.768 kHz crystal option for RTC; how-
ever, the default from the factory is set to use the
internal 32 kHz ultra low-power oscillator
•PWM:
- 16-bit PWM design
- Four Individual frequency and individual duty
cycle channel outputs multiplexed with GPIO
pins (P2_1, P2_2, P2_3, and P2_5)
- Three clock source (32K, 1M and 16M)
selections to program frequency range from
0.488 Hz to 8 MHz
- Double buffers output compare registers and
top register to avoid glitch
- Two pair output configurable as inverse chan-
nel
Note: The system blocks which make up the
IS1870/71 SoC are listed below. However,
some of the blocks used in the IS1870/71
SoC are controlled by the default factory
firmware and are not available to the
designer.
Note: The Microchip provided BLE stack uses a
portion of the available memory listed
above. With the default factory firmware,
the amount of memory used is fixed and
the free memory is not available to the
designer. As it is expected, the application
will reside in the external host MCU. For
details on altering the default factory
setup, please contact your local Microchip
representative.
Note: This peripheral is not available with the
default factory firmware. For details on
altering this default factory setup, contact
your local Microchip representative.
Note: This peripheral is not available with the
default factory firmware. For details on
altering this default factory setup, please
contact your local Microchip
representative.
2015-2018 Microchip Technology Inc. Advanced DS60001371E-Page 15
IS1870/71
2.3 Host MCU Interface Over UART
Figure 2-2 illustrates IS1870/71 SoC application block
diagram. In the diagram the power supply (3.3V),
UART interface, and GPIO control and indication are
listed.
FIGURE 2-2: IS1870/71 SOC APPLICATION BLOCK DIAGRAM WITH MCU
Note 1: Ensure BAT_IN (I/O voltage) and MCU VDD voltage are compatible.
2: The control and indication ports are configurable in Microchip provided PC tool, referred to as the
UI tool, see the product webpage for additional information.
3: Default factory firmware configuration enables the designer to control GPIO functions, ADC, PTS, and
PWM peripherals. The I2C and SPI peripherals are not available with the default firmware. Contact your
local Microchip representative for more details.
4: The GPIO applications of the IS1871 SoC have a reduced pin count, and some of the GPIO pins are not
supported in the IS1871 SoC.
IS1870/71
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NOTES:
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IS1870/71
3.0 ELECTRICAL CHARACTERISTICS
This section provides an overview of the IS1870/71 SoC electrical characteristics. Additional information will be
provided in future revisions of this document.
Absolute maximum ratings for the IS1870/71 devices are listed below. Exposure to the maximum rating conditions for
extended periods may affect device reliability. Functional operation of the device at these or any other conditions, above
the parameters indicated in the operation listings of this specification, is not implied.
Absolute Maximum Ratings
(See Note)
Ambient temperature under bias with parts ending with 102 ................................................................... .-20°C to +70°C
Ambient temperature under bias with parts ending with 202 ................................................................... .-40°C to +85°C
Storage temperature .............................................................................................................................. -40°C to +125°C
Voltage on VDD with respect to VSS ......................................................................................................... -0.3V to +3.6V
Voltage on any pin with respect to VSS .......................................................................................... -0.3V to (VDD + 0.3V)
Maximum output current sunk by any I/O pin..........................................................................................................12 mA
Maximum output current sourced by any I/O pin....................................................................................................12 mA
ESD (according to machine model, JEDEC EIA/JESD22-A115-C)
Maximum output for all pins, excluding RF Tx pin .......... .......................................................................................±200V
Maximum output for all pins ....................................................................................................................................±150V
Maximum output (human-body model)......................................................................................................................±2 kV
Maximum output (charge-device model).................................................................................................................±150V
Note: Stresses listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This
is a stress rating only. The functional operation of the device at those or any other conditions, and those
indicated in the operation listings of this specification, is not implied. Exposure to maximum rating condi-
tions for extended periods may affect device reliability.
IS1870/71
DS60001371E-Page 18 Advanced 2015-2018 Microchip Technology Inc.
Table 3-1 provides the recommended operating conditions
of the IS1870/71 SoC.
Note 1: The current measurements are characterized across a sample of the BM70/71 module at room temperature
(+25°C), unless otherwise noted.
2: For more details on “Reduced current consumption” or “Shutdown” low power modes, refer to the “BM70/71
Bluetooth® Low Energy Module User's Guide” (DS50002542). This rating is part of the characterization of
the default factory firmware.
3: ADC performance characterized with V1.06 production firmware across a set of IC's are not tested during
production.
4: Calculated DNL/INL values are determined using “Best Fit” method.
TABLE 3-1: RECOMMENDED OPERATING CONDITIONS
Symbol Min. Typ. Max.
PMU
VDD (VBAT, BK_IN, AVDD) 1.9V 3.0V 3.6V
RST_N 1.9V 3.0V 3.6V
Other I/O 1.9V — 3.6V
GPIO
VIH (Input High Voltage) 0.7 VDD —VDD
VIL (Input Low Voltage) VSS — 0.3 VDD
VOH (Output High Voltage) (High drive, 12 mA) 0.8 VDD —VDD
VOL (Output Low Voltage) (High drive, 12 mA) VSS — 0.2 VDD
Pull up Resistance 34 kOhm 48 kOhm 74 kOhm
Pull down Resistance 29 kOhm 47 kOhm 86 kOhm
Supply Current (see Note 1)
Tx mode peak current at VDD=3V,
Tx=0 dBm, Buck mode
— 10 mA at +25°C 13 mA at
+70°C/+85°C
Rx mode peak current at VDD=3V, Buck mode — 10 mA at +25°C 13 mA at
+70°C/+85°C
“Reduced current consumption” low power mode cur-
rent (see Note 2)
— 60 μA at +25°C —
“Shutdown” low power mode current (see Note 2) 1.0 μA — 2.9 μA
Analog-to-Digital Converter (ADC) for IS1870/71-202
Full scale (BAT_IN) 0V 3.0V 3.6V
Full scale (AD0 to AD15) 0V — 3.6V
Operating Temperature Range -40°C 25°C 85°C
Operating current — — 500 μA
DNL (ENOB 10-bit, ADC in 32 KHz Mode)
(see Note 3 and 4)
-1 — +1.5
INL (ENOB 10-bit, ADC in 32 KHz Mode)
(see Note 3 and 4)
-2 LSB — +2 LSB
Precise Temperature Sensor (PTS) for IS1870/71-202
Detect range -40°C — +85°C
Digital Output 1387 — 2448
Resolution — 12-bit/°C —
Accuracy -3°C — +3°C
2015-2018 Microchip Technology Inc. Advanced DS60001371E-Page 19
IS1870/71
Table 3-2 provides the RF specifications of the
IS1870/71 SoC.
Note 1: Tested with a known pattern of ‘00001111’b being transmitted.
TABLE 3-2: RF SPECIFICATIONS
Parameter Min. Typ. Max.
Transmitter
Frequency 2402 MHz — 2480 MHz
Output Power — 0 dBm —
RF Power Control Range -25 dBm — 3 dBm
In-band Spurious (N±2) — -38.5 dBm —
In-band Spurious (N±3) — -43.25 dBm —
Modulation Characteristic - Frequency
Deviation (see Note 1)
—247 kHz—
Receiver
Frequency 2402 MHz — 2480 MHz
Sensitivity Level (Interference active) — -90 dBm —
Interference Perfor-
mance
Co-channel — 17 dB —
Adjacent
± 1 MHz
—0 dB—
Adjacent
± 2 MHz
—-25 dB—
Adjacent >=
± 3 MHz
—-32 dB—
Intermodulation Characteristic (n=3,4,5) — -37.5 dBm —
Maximum Usable Level 0 dBm
IS1870/71
DS60001371E-Page 20 Advanced 2015-2018 Microchip Technology Inc.
3.1 Current Consumption Details
3.1.1 Tx/Rx CURRENT CONSUMPTION
DETAILS
Figure 3-1 illustrates the average current consumption
of an advertising event during BLE operation of the
IS1870/71 SoC.
The peak current of the VBAT input is 12 mA and the
average current is around 230 μA. In this example the
advertising interval is 100 ms and current consumption
is measured at 3.3V VBAT input.
FIGURE 3-1: AVERAGE CURRENT CONSUMPTION DURING ADVERTISING
IS1870/71
DS60001371E-Page 22 Advanced 2015-2018 Microchip Technology Inc.
FIGURE 4-2: 48QFN, 6X6 MM FOOTPRINT INFORMATION (IS1870SF)
2015-2018 Microchip Technology Inc. Advanced DS60001371E-Page 23
IS1870/71
4.2 32QFN, 4x4 mm SoC Outline (IS1871SF)
FIGURE 4-3: 32QFN, 4X4 MM PACKAGE SIZE INFORMATION (IS1871SF)
IS1870/71
DS60001371E-Page 24 Advanced 2015-2018 Microchip Technology Inc.
FIGURE 4-4: 32QFN FOOTPRINT INFORMATION (IS1871SF)
2015-2018 Microchip Technology Inc. Advanced DS60001371E-Page 25
IS1870/71
FIGURE 4-5: PACKAGE MARKING INFORMATION
IS1870/71
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NOTES:
2015-2018 Microchip Technology Inc. Advanced DS60001371E-Page 27
IS1870/71
5.0 REFLOW PROFILE AND
STORAGE CONDITION
Figure 5-1 and Figure 5-2 illustrate the reflow profiles
and stencil information of the IS1870/71 SoC.
5.1 Stencil of SMT Assembly
Suggestion
5.1.1 STENCIL TYPE AND THICKNESS
• Laser cutting
• Stainless steel
• Thickness: 0.5 mm pitch, thickness more than
0.15 mm
5.1.2 APERTURE SIZE AND SHAPE FOR
TERMINAL PAD
• Aspect ratio (width/thickness) more than 1.5
• Aperture shape
- The stencil aperture is designed to match the
pad size on the PCB
- Oval-shape opening is used to get the opti-
mum paste release
- Rounded corners to minimize the clogging
- Positive taper walls (5° tapering) with the
bottom opening larger than the top opening
5.1.3 APERTURE DESIGN FOR THERMAL
PAD
• Small multiple openings are used instead of one
big opening, see Figure 5-1
• 60 to 80% solder paste coverage
• Rounded corners to minimize clogging
• Positive taper walls (5° tapering) with the bottom
opening larger than the top opening, see
Figure 5-2
FIGURE 5-1: REFLOW PROFILE
FIGURE 5-2: STENCIL TYPE
Do not recommend Recommend Recommend
Coverage 91% Coverage 77% Coverage 65%
IS1870/71
DS60001371E-Page 28 Advanced 2015-2018 Microchip Technology Inc.
5.2 Reflow Profile
Figure 5-3 illustrates the reflow profile and the following
are its specific features:
• Standard Condition: IPC/JEDEC J-STD-020
• Preheat: +150 ℃to +200 ℃for 60 to 120 seconds
• Average ramp-up rate (+217℃ to peak): +3℃/sec
max
• Temperature maintained above +217 ℃:
60 to 150 seconds
• Time within +5 ℃ of peak temperature:
30 to 40 seconds
• Peak temperature: +260 ℃ with 5/-0 ℃ tolerance
• Ramp-down rate (peak to +217℃): +6℃/sec. max
• Time within +25℃ to peak temperature: 8 minutes
max
• Cycle interval: 5 minutes
FIGURE 5-3: REFLOW PROFILE
2015-2018 Microchip Technology Inc. Advanced DS60001371E-Page 29
IS1870/71
5.3 Storage Condition
Users are required to follow these specific storage
conditions for the IS1870/71 SoC.
• The calculated shelf life in the sealed bag is
24 months at <+40 ℃ and <90% Relative
Humidity (RH)
• After the bag is opened, devices that are
subjected to reflow solder or other high
temperature process must be mounted within 168
hours of factory conditions, i.e <+30 ℃/60% RH
IS1870/71
DS60001371E-Page 30 Advanced 2015-2018 Microchip Technology Inc.
NOTES:
2015-2018 Microchip Technology Inc. Advanced DS60001371E-Page 31
IS1870/71
6.0 ORDERING GUIDE
Table 6-1 provides the ordering information for the
IS1870/71 SoC.
TABLE 6-1: ORDERING GUIDE
Note: The IS1870/71 SoC can be purchased through a Microchip representative.
Visit http://www.microchip.com/ for ordering information.
Device Bluetooth Version Operating
Temperature Range Package Part No.
IS1870SF-102 Bluetooth Low Energy
SoC, BLE 4.2 compliant
-20°C to +70°C 48-Lead QFN, 6x6x0.9 mm3,
0.4 mm pitch
IS1870SF-102
IS1871SF-102 Bluetooth Low Energy
SoC, BLE 4.2 compliant
-20°C to +70°C 32-Lead QFN, 4x4x0.9 mm3,
0.4 mm pitch
IS1871SF-102
IS1870SF-202 Bluetooth Low Energy
SoC, BLE 4.2 compliant
-40°C to +85°C 48-Lead QFN, 6x6x0.9 mm3,
0.4 mm pitch
IS1870SF-202
IS1871SF-202 Bluetooth Low Energy
SoC, BLE 4.2 compliant
-40°C to +85°C 32-Lead QFN, 4x4x0.9 mm3,
0.4 mm pitch
IS1871SF-202
IS1870/71
DS60001371E-Page 32 Advanced 2015-2018 Microchip Technology Inc.
NOTES:
2015-2018 Microchip Technology Inc. Advanced DS60001371E-Page 33
IS1870/71
APPENDIX A: REFERENCE CIRCUIT
Figure A-1 through Figure A-4 illustrate a typical application circuit of the
IS1870 and IS1871 SoC.
The application circuit lists the RF matching circuit, PMU power tree, LED
option, test points, and configuration table. The GPIOs can be configured to
general I/O functions or the function of ADC, PTS, PWM, and external
32.768 kHz crystal.
FIGURE A-1: IS1870 SOC APPLICATION CIRCUIT
Note 1: The C13, C14, L4, C12, C11, C10, C3, and C4 must be as close to the chip as possible.
2: The value of the antenna matching component depends on the user’s antenna and PCB layout.
IS1870/71
DS60001371E-Page 34 Advanced 2015-2018 Microchip Technology Inc.
FIGURE A-2: IS1870 SOC APPLICATION CIRCUIT (OPTIONAL)
2015-2018 Microchip Technology Inc. Advanced DS60001371E-Page 35
IS1870/71
FIGURE A-3: IS1871 SOC APPLICATION CIRCUIT
Note 1: The C13, C14, L4, C12, C11, C10, C3, and C4 must be as close to the chip as possible.
2: The value of the antenna matching component depends on the user’s antenna and PCB layout.
IS1870/71
DS60001371E-Page 36 Advanced 2015-2018 Microchip Technology Inc.
FIGURE A-4: IS1871 SOC APPLICATION CIRCUIT (OPTIONAL)
2015-2017 Microchip Technology Inc. Advanced DS60001371E-Page 37
IS1870/71
APPENDIX B: LAYOUT
GUIDELINES
B.1 RF Matching
The RF traces (Tx, Rx, and antenna path) on the PCB
antenna must match the 50 Ohm impedance. In
Figure A-1, value of L1, L3, C1, C2, and C5 are fixed.
The antenna matching components, C6, C7, and L2,
must be adjusted to match with the 50 Ohm 2.4 GHz
antenna.
B.2 PMU
The PMU section components, such as VBAT, BK_IN,
BK_O, BK_LX, AVDD, ULPC_O, CLDO_O, VREF must
be kept close to the IS1870/71 SoC. The L4 and C14 of
Buck section, illustrated in Figure A-1, must be
selected carefully. The capacitor C14 is either 4.7 μF/
6.3V, X5R, or X7R type. The inductor L4 must be a high
current (IDC>300 mA) and low DCR (<1 Ohm) type.
For additional information on the PCB antenna design
guidelines, contact your local Microchip sales office. A
list of Microchip sales offices is given on the back page
of this document.
B.3 Crystal
The XI 32 MHz crystal specification must be within the
±10 ppm range, see Figure A-1.
IS1870/71
DS60001371E-Page 38 Advanced 2015-2017 Microchip Technology Inc.
NOTES:
2015-2018 Microchip Technology Inc. Advanced DS60001371E-Page 39
IS1870/71
APPENDIX C: REVISION HISTORY
Revision A (October 2015)
This is the initial released version of this document.
Revision B (October 2015)
This revision includes the following changes as well as minor updates to text and formatting, which were incorporated
throughout the document.
Revision C (March 2016)
This revision includes the following changes and minor updates to text and formatting, which were incorporated through-
out the document.
Revision D (February 2017)
This revision includes the following changes and minor updates to text and formatting, which were incorporated
throughout the document.
Status Description
“Features” The section has been updated with new information.
“Packages” The section is updated with the package information.
1.0 “Device Overview” Updated Figure 1-1 and Figure 1-2.
Added Ta b l e 1 - 1
Status Description
“Features” The section is updated with new information.
1.0 “Device Overview” Updated Figure 1-1 and Figure 1-2.
Updated Ta b l e 1 -1 and Ta b l e 1 - 2 .
2.0 “System Block Details” Updated 2.2 “System Block Specification” and 2.3 “Host MCU Interface
Over UART” with new information.
3.0 “Electrical Characteristics” Updated 3.1.1 “Tx/Rx Current Consumption Details”.
Updated Figure 3-1 and Figure 3-1.
Updated Ta b l e 3 -1 and Ta b l e 3 - 2 .
5.3 “Storage Condition” Deleted Figure 5-4.
6.0 “Ordering Guide” Updated Ta b l e 6 -1
Appendix A: “Reference Circuit” Updated Figure A-1 and Figure A-3
Added Figure A-2 and Figure A-4
Appendix C: Bill of Material Deleted
Section Update Description
“Features” Updated this section.
“Packages” Updated the I/O pins details.
“Operating Conditions” Updated the operating temperature details.
1.0 “Device Overview” Updated Figure 1-1 and Figure 1-2.
2.0 “System Block Details” Updated Figure 2-2.
3.0 “Electrical Characteristics” Updated ambient temperature, maximum output (human-body
model) details and Ta b l e 3 - 1 .
Added Table 3 - 2.
6.0 “Ordering Guide” Updated Table 6-1
IS1870/71
DS60001371E-Page 40 Advanced 2015-2018 Microchip Technology Inc.
Revision E (February 2018)
This revision includes the following changes and minor updates to text and formatting, which were incorporated
throughout the document.
Section Update Description
1.0 “Device Overview” Updated Table 1-2.
3.0 “Electrical Characteristics” Updated Table 3-1.
2015-2017 Microchip Technology Inc. Advanced DS60001371E-Page 41
IS1870/71
THE MICROCHIP WEB SITE
Microchip provides online support via our WWW site at
www.microchip.com. This web site is used as a means
to make files and information easily available to
customers. Accessible by using your favorite Internet
browser, the web site contains the following
information:
•Product Support – Data sheets and errata,
application notes and sample programs, design
resources, user’s guides and hardware support
documents, latest software releases and archived
software
•General Technical Support – Frequently Asked
Questions (FAQ), technical support requests,
online discussion groups, Microchip consultant
program member listing
•Business of Microchip – Product selector and
ordering guides, latest Microchip press releases,
listing of seminars and events, listings of
Microchip sales offices, distributors and factory
representatives
CUSTOMER CHANGE NOTIFICATION
SERVICE
Microchip’s customer notification service helps keep
customers current on Microchip products. Subscribers
will receive e-mail notification whenever there are
changes, updates, revisions or errata related to a
specified product family or development tool of interest.
To register, access the Microchip web site at
www.microchip.com. Under “Support”, click on
“Customer Change Notification” and follow the
registration instructions.
CUSTOMER SUPPORT
Users of Microchip products can receive assistance
through several channels:
• Distributor or Representative
• Local Sales Office
• Field Application Engineer (FAE)
• Technical Support
Customers should contact their distributor,
representative or Field Application Engineer (FAE) for
support. Local sales offices are also available to help
customers. A listing of sales offices and locations is
included in the back of this document.
Technical support is available through the web site
at: http://microchip.com/support
IS1870/71
DS60001371E-Page 42 Advanced 2015-2017 Microchip Technology Inc.
NOTES:
2015-2017 Microchip Technology Inc. Advanced DS60001371E-Page 43
Information contained in this publication regarding device
applications and the like is provided only for your convenience
and may be superseded by updates. It is your responsibility to
ensure that your application meets with your specifications.
MICROCHIP MAKES NO REPRESENTATIONS OR
WARRANTIES OF ANY KIND WHETHER EXPRESS OR
IMPLIED, WRITTEN OR ORAL, STATUTORY OR
OTHERWISE, RELATED TO THE INFORMATION,
INCLUDING BUT NOT LIMITED TO ITS CONDITION,
QUALITY, PERFORMANCE, MERCHANTABILITY OR
FITNESS FOR PURPOSE. Microchip disclaims all liability
arising from this information and its use. Use of Microchip
devices in life support and/or safety applications is entirely at
the buyer’s risk, and the buyer agrees to defend, indemnify and
hold harmless Microchip from any and all damages, claims,
suits, or expenses resulting from such use. No licenses are
conveyed, implicitly or otherwise, under any Microchip
intellectual property rights unless otherwise stated.
Trademarks
The Microchip name and logo, the Microchip logo, AnyRate, AVR,
AVR logo, AVR Freaks, BeaconThings, BitCloud, CryptoMemory,
CryptoRF, dsPIC, FlashFlex, flexPWR, Heldo, JukeBlox, KEELOQ,
KEELOQ logo, Kleer, LANCheck, LINK MD, maXStylus,
maXTouch, MediaLB, megaAVR, MOST, MOST logo, MPLAB,
OptoLyzer, PIC, picoPower, PICSTART, PIC32 logo, Prochip
Designer, QTouch, RightTouch, SAM-BA, SpyNIC, SST, SST
Logo, SuperFlash, tinyAVR, UNI/O, and XMEGA are registered
trademarks of Microchip Technology Incorporated in the U.S.A.
and other countries.
ClockWorks, The Embedded Control Solutions Company,
EtherSynch, Hyper Speed Control, HyperLight Load, IntelliMOS,
mTouch, Precision Edge, and Quiet-Wire are registered
trademarks of Microchip Technology Incorporated in the U.S.A.
Adjacent Key Suppression, AKS, Analog-for-the-Digital Age, Any
Capacitor, AnyIn, AnyOut, BodyCom, chipKIT, chipKIT logo,
CodeGuard, CryptoAuthentication, CryptoCompanion,
CryptoController, dsPICDEM, dsPICDEM.net, Dynamic Average
Matching, DAM, ECAN, EtherGREEN, In-Circuit Serial
Programming, ICSP, Inter-Chip Connectivity, JitterBlocker,
KleerNet, KleerNet logo, Mindi, MiWi, motorBench, MPASM, MPF,
MPLAB Certified logo, MPLIB, MPLINK, MultiTRAK, NetDetach,
Omniscient Code Generation, PICDEM, PICDEM.net, PICkit,
PICtail, PureSilicon, QMatrix, RightTouch logo, REAL ICE, Ripple
Blocker, SAM-ICE, Serial Quad I/O, SMART-I.S., SQI,
SuperSwitcher, SuperSwitcher II, Total Endurance, TSHARC,
USBCheck, VariSense, ViewSpan, WiperLock, Wireless DNA, and
ZENA are trademarks of Microchip Technology Incorporated in the
U.S.A. and other countries.
SQTP is a service mark of Microchip Technology Incorporated in
the U.S.A.
Silicon Storage Technology is a registered trademark of Microchip
Technology Inc. in other countries.
GestIC is a registered trademark of Microchip Technology
Germany II GmbH & Co. KG, a subsidiary of Microchip Technology
Inc., in other countries.
All other trademarks mentioned herein are property of their
respective companies.
© 2015-2017, Microchip Technology Incorporated, All Rights
Reserved.
ISBN: 978-1-5224-2694-3
Note the following details of the code protection feature on Microchip devices:
• Microchip products meet the specification contained in their particular Microchip Data Sheet.
• Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the
intended manner and under normal conditions.
• There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our
knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data
Sheets. Most likely, the person doing so is engaged in theft of intellectual property.
• Microchip is willing to work with the customer who is concerned about the integrity of their code.
• Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not
mean that we are guaranteeing the product as “unbreakable.”
Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our
products. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts
allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act.
Microch ip rece ived IS O/T S-16 94 9:20 09 certificat ion for i ts worl dwid e
headquarters, design and wafer fabrication facilities in Chandler and
Tempe, Arizona; Gresham, Oregon and design centers in California
and India. The Company’s quality system processes and procedures
are for its PIC® MCUs an d dsPIC® DSCs, KEELOQ® code hopping
devices, Serial EEPROMs, microperiph erals, nonvolatile memory and
analog products. In addition, Microchip’s quality system for the design
and manufacture of development systems is ISO 9001:2000 certified.
QUALITY MANAGEMENT S
YSTEM
CERTIFIED BY DNV
== ISO/TS 16949 ==
DS60001371E-page 44 2018 Microchip Technology Inc.
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