MDSL-00127-04 QUALITY SEMICONDUCTOR, INC. 1
NOVEMBER 21, 1997
QS74LCX16244
Now an Company
Figure 1. Functional Block Diagram
1Y11A1
1Y21A2
1Y31A3
1Y41A4
1OE
2Y12A1
2Y22A2
2Y32A3
2Y42A4
2OE
3Y13A1
3Y23A2
3Y33A3
3Y43A4
3OE
4Y14A1
4Y24A2
4Y34A3
4Y44A4
4OE
FEATURES/BENEFITS
• 5V tolerant inputs and outputs
•10µA ICCQ quiescent power supply current
• Hot insertable
• 2.0V-3.6V VCC supply operation
•±24mA balanced output drive
• C speed performance: tPD = 4.1ns
• Input hysteresis for noise immunity
• Meets or exceeds JEDEC Standard 36
specifications
• Multiple power and ground pins for low noise
• Operating temperature range:
–40°C to +85°C
• Latch-up performance exceeds 500mA
• ESD performance:
Human body model > 2000V
Machine model > 200V
• Packages available:
48-pin TSSOP
48-pin SSOP
DESCRIPTION
The QS74LCX16244 is a 16-bit bus interface buffer
with three-state outputs that is ideal for driving ad-
dress and data buses. Output enables are used to
enable or disable Y ports by placing them in a high
impedance condition. This device can be used as
four 4-bit buffers, two 8-bit buffers, or a single 16-bit
buffer. The 3.3V LCX family features low power, low
switching noise, and fast switching speeds for low
power portable applications as well as high-end,
advanced workstation applications. 5V tolerant in-
puts and outputs allow this LCX product to be used
in mixed 5V and 3.3V applications. Easy board
layout is facilitated by the use of flow-through pinouts
and byte enable controls provide architectural flex-
ibility for systems designers. To accommodate hot-
plug or live insertion applications, this product is
designed not to load an active bus when VCC is
removed.
Q
Q
UALITY
S
EMICONDUCTOR,
I
NC.
Q
High Speed CMOS 3.3V
16-Bit Buffer/Line Driver
QS74LCX16244
QS74LCX16244
2QUALITY SEMICONDUCTOR, INC. MDSL-00127-04
NOVEMBER 21, 1997
Now an Company
Symbol Pins Typ Unit Conditions
CIN Input Capacitance 7.0 pF VIN = 0V, VOUT = 0V, f = 1MHz
CI/O I/O Capacitance 8.0 pF VIN = 0V, VOUT = 0V, f = 1MHz
CPD Power Dissipation 20 pF VCC = 3.3V, VIN = 0 or VCC
Capacitance f = 10MHz
Figure 2. Pin Configuration
(All Pins Top View)
SSOP, TSSOP
Table 1. Pin Description
Name Description
xOE 3-State Output Enable Inputs
xAx Data Inputs
xYx 3-State Outputs
Inputs Outputs
xOEOE
OEOE
OE xAx xYx
LL L
LH H
H X Hi-Z
Table 2. Function Table
Table 3. Capacitance
Note: Capacitance is characterized but not production tested.
Table 4. Absolute Maximum Ratings
Supply Voltage to Ground...............................................–0.5V to +7.0V
DC Output Voltage VOUT
Outputs HIGH-Z............................................................–0.5V to +7.0V
Outputs Active ......................................................–0.5V to VCC + 0.5V
DC Input Voltage VIN.........................................................–0.5V to 7.0V
DC Input Diode Current with VIN < 0 ........................................... –50mA
DC Output Diode Current
VO < 0 ...................................................................................... –50mA
VO > VCC .................................................................................. +50mA
DC Output Source/Sink Current (IOH/IOL) .................................... ±50mA
DC Supply Current per Supply Pin ........................................... ±100mA
DC Ground Current per Ground Pin ......................................... ±100mA
TSTG Storage Temperature...........................................–65°C to +150°C
Note: Stresses greater than
those listed under ABSOLUTE
MAXIMUM RATINGS may
cause permanent damage to
this device resulting in func-
tional or reliability type failures.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
1OE
1Y1
1Y2
GND
1Y3
1Y4
V
CC
2Y1
2Y2
GND
2Y3
2Y4
3Y1
3Y2
GND
3Y3
3Y4
V
CC
4Y1
4Y2
GND
4Y3
4Y4
4OE
2OE
1A1
1A2
GND
1A3
1A4
V
CC
2A1
2A2
GND
2A3
2A4
3A1
3A2
GND
3A3
3A4
V
CC
4A1
4A2
GND
4A3
4A4
3OE
MDSL-00127-04 QUALITY SEMICONDUCTOR, INC. 3
NOVEMBER 21, 1997
QS74LCX16244
Now an Company
Symbol Parameter Min Max Unit
VCC Supply Voltage, Operating 2.0 3.6 V
VIN Input Voltage 0 5.5 V
VOUT Output Voltage in Active State 0 VCC V
VOUT Output Voltage in "OFF" State 0 5.5 V
IOH/IOL Output Current VCC = 3.0 – 3.6V — ±24 mA
VCC = 2.7V ±12
∆t/∆v Input Transition Slew Rate — 10 ns/V
TAOperating Free Air Tempeature –40 +85 °C
Table 5. Recommended Operating Conditions
Symbol Parameter Test Conditions(1) Min Typ(2) Max Unit
VIH Input HIGH Voltage Logic HIGH for All Inputs 2.0 — — V
VIL Input LOW Voltage Logic LOW for All Inputs — — 0.8 V
VOH Output HIGH Voltage VCC = 2.7V, IOH = –100µAV
CC –0.2 — — V
VCC = 2.7V, IOH = –12mA 2.2 — —
VCC = 3.0V, IOH = –18mA 2.4 — —
VCC = 3.0V, IOH = –24mA 2.2 — —
VOL Output LOW Voltage VCC = 2.7V, IOL = 100µA — — 0.2 V
VCC = 2.7V, IOL = 12mA — — 0.4
VCC = 3.0V, IOL = 16mA — — 0.4
VCC = 3.0V, IOL = 24mA — — 0.5
∆VTInput Hysteresis(3) VTLH – VTHL for All Inputs — 150 — mV
IIInput Leakage Current VI = 0V, VI = 5.5V, VCC = 3.6V — — ±1.0 µA
IOZ High-Z I/O Leakage VO = 0V, VO = 5.5V — — ±1.0 µA
VI =VIH or VIL, VCC = 3.6V
II
OS Short Circuit Current(3,4) VCC = 3.6V, VO = GND –60 — –240 mA
IOFF Power Off Leakage VCC = 0V, VI or VO = 5.5V — — 10 µA
VIK Input Clamp Voltage VCC = 2.7V, IIN = –18mA — –0.7 –1.2 V
Table 6. DC Electrical Characteristics Over Operating Range
Industrial Temperature Range, TA = –40°C to +85°C
Notes:
1. For conditions shown as Max or Min use appropriate value specified under Recommended Operating Conditions
for the applicable device type.
2. Typical values are at VCC = 3.3V, and TA = 25°C.
3. These parameters are guaranteed by characterization, but not production tested.
4. Not more than one output should be tested at one time. Duration of test should not exceed one second.
QS74LCX16244
4QUALITY SEMICONDUCTOR, INC. MDSL-00127-04
NOVEMBER 21, 1997
Now an Company
Symbol Parameter Test Conditions(1) Typ (2) Max Unit
ICC Quiescent Power V CC = 3.6V, Freq = 0 0.1 10 µA
Supply Current VIN = GND or VCC
∆ICC Supply Current per VCC = 3.6V, VIN = VCC-0.6V(3) 2.0 30 µA
Input @ TTL HIGH
ICCD Supply Current per VCC = 3.6V, Outputs Open 50 75 µA/
Input per MHz(4) One Bit Toggling @ 50% Duty Cycle MHz
xOE = GND
ICTotal Power VCC = 3.6V, Outputs Open VIN = VCC–0.6V 0.5(5) 0.8(5) mA
Supply Current(6) One Bit Toggling VIN = GND
@ 50% Duty Cycle
xOE = GND, fI = 10MHz
VCC = 3.6V, Outputs Open VIN = VCC–0.6V 2.0(5) 3.3(5)
Sixteen Bits Toggling VIN = GND
@ 50% Duty Cycle
xOE = GND, fI = 2.5MHz
Table 7. Power Supply Characteristics
Notes:
1. For conditions shown as Min. or Max., use the appropriate values specified under Recommended Operating Conditions
for applicable device type.
2. Typical values are at VCC = 3.3V, +25°C ambient.
3. Per TTL driven input. All Other Inputs at VCC or GND.
4. This parameter is not directly testable, but is derived for use in Total Power Supply Calculations.
5. Values for these conditions are examples of the ICC formula. These limits are guaranteed by design but not tested.
6. IC = IQUIESCENT + IINPUTS + IDYNAMIC.
IC = ICCQ + ∆ICC DHNT + ICCD f NO.
ICCQ = Quiescent Current (ICCL, ICCH, and ICCZ).
∆ICC = Power Supply Current for a TTL-High Input (VIN = VCC-0.6V).
DH = Duty Cycle for TTL High Inputs.
NT = Number of TTL High Inputs.
ICCD = Dynamic Current Caused by an Input Transition Pair (HLH or LHL).
f = Average Switching Frequency per Output.
NO = Number of Outputs Switching
Symbol Parameter Conditions VCC TA = 25°C Units
(V) Typical
VOLP Quiet Output Dynamic Peak VOL CL = 50pF, V IH = 3.3V, VIL = 0V 3.3 0.8 V
VOLV Quiet Output Dynamic Valley VOL CL = 50pF, VIH = 3.3V, VIL = 0 V 3.3 0.8 V
Table 8. Dynamic Switching Characteristics(1)
Note:
1. Characterized but not production tested.
MDSL-00127-04 QUALITY SEMICONDUCTOR, INC. 5
NOVEMBER 21, 1997
QS74LCX16244
Now an Company
Table 9. Switching Characteristics Over Operating Range
Industrial Temperature Range, TA = –40°C to +85°C.
CLOAD = 50 pF, RLOAD = 500Ω unless otherwise noted.
16244 16244C
VCC = 3.3 ± 0.3V VCC = 2.7V(2) VCC = 3.3 ± 0.3V
Symbol Description(1) Min Max Min Max Min Max Unit
tPHL Propagation Delay 1.5 4.5 1.5 5.2 1.5 4.1 ns
tPLH xAx to xYx
tPZH Output Enable Time 1.5 5.5 1.5 6.3 1.5 5.5 ns
tPZL xOE to xYx
tPHZ Output Disable Time(2) 1.5 5.4 1.5 5.7 1.5 5.2 ns
tPLZ xOE to xYx
tSK(O) Output Skew(3) — 0.5 — — — 0.5 ns
Notes:
1. Minimums guaranteed but not tested. See Test Circuit and Waveforms.
2. Guaranteed by characterization.
3. Skew between any two outputs of the same package switching in the same direction. This parameter is guaran-
teed by characterization but not production tested.
QS74LCX16244
6QUALITY SEMICONDUCTOR, INC. MDSL-00127-04
NOVEMBER 21, 1997
Now an Company
TEST CIRCUIT AND WAVEFORMS
Figure 3. Test Circuit
500Ω
50pF 500Ω
6.0V
DUT
VCC
VIN VOUT
Pulse
Generator
Test
Open Drain
Disable LOW
Enable LOW
Disable HIGH
Enable HIGH
All Other Inputs
Switch
6V
GND
Open
RTCLDEFINITIONS:
CL = Load capacitance: includes jig and probe capacitance.
RT = Termination resistance: should be equal to ZOUT of the
Pulse generator.
SWITCH POSITION
Figure 4. Setup, Hold, and Release Timing
3V
0V
1.5V
3V
0V
1.5V
3V
0V
1.5V
3V
0V
1.5V
t
SU
t
SU
t
H
t
H
t
REM
Data
Input
Timing
Input
Asynchronous Control
Preset, Clear, Etc.
Synchronous Control
Preset, Clear
Clock Enable, Etc.
Figure 5. Enable and Disable Timing
3V
0V
1.5V
3.0V
0V
Control
Input
Output
Normally
Low
Output
Normally
High
0.3V
0.3V
V
OL
V
OH
t
PZL
t
PHZ
t
PHZ
t
PZL
Switch
Closed
Switch
Open
3.0V
1.5V
1.5V
0V
Notes:
1. Input Control Enable = LOW and input Control
Disable = HIGH.
2. Pulse Generator for All Pulses: Rate ≤ 1.0MHz;
ZOUT ≤ 50Ω; tF, tR ≤ 2.5ns.
Figure 6. Pulse Width
1.5V
t
w
1.5V
Low-High-Low
Pulse
High-Low-High
Pulse
1.5V
Same Phase
Input Transition
Output
Opposite Phase
Input Transition
3V
0V
1.5V
V
OH
V
OL
1.5V
3V
0V
t
PLH
t
PLH
t
PHL
t
PHL
Figure 7. Propagation Delay
