EMIF02-MIC03F1 (R) 2 LINES EMI FILTER AND ESD PROTECTION IPADTM MAIN PRODUCT CHARACTERISTICS: Where EMI filtering in ESD sensitive equipment is required : Mobile phones and communication systems Computers, printers and MCU Boards DESCRIPTION The EMIF02-MIC03 is a highly integrated device designed to suppress EMI/RFI noise in all systems subjected to electromagnetic interferences. The EMIF02 flip chip packaging means the package size is equal to the die size. This filter includes an ESD protection circuitry which prevents the device from destruction when subjected to ESD surges up 15kV. Flip Chip package BENEFITS EMI symmetrical (I/O) low-pass filter High efficiency in EMI filtering Very low PCB space consuming: 1.07mm x 1.47mm Very thin package: 0.65 mm High efficiency in ESD suppression High reliability offered by monolithic integration High reducing of parasitic elements through integration & wafer level packaging. PIN CONFIGURATION (ball side) 3 2 1 I2 I1 B GND COMPLIES WITH THE FOLLOWING STANDARDS: IEC61000-4-2 Level 4 on input pins Level 1 on output pins 15kV 8 kV 2kV 2kV O2 A O1 C (air discharge) (contact discharge) (air discharge) (contact discharge) MIL STD 883E - Method 3015-6 Class 3 BASIC CELL CONFIGURATION Low-pass Filter Input Output Ri/o = 68 Cline = 100pF GND GND GND TM : IPAD is a trademark of STMicroelectronics. January 2004 - Ed: 3A 1/6 EMIF02-MIC03F1 ABSOLUTE RATINGS (limiting values) Symbol Value Unit Tj Maximum junction temperature Parameter and test conditions 125 C Top Operating temperature range -40 to + 85 C Tstg Storage temperature range -55 to 150 C ELECTRICAL CHARACTERISTICS (Tamb = 25 C) Symbol Parameter I VBR Breakdown voltage IRM Leakage current @ VRM VRM Stand-off voltage VCL Clamping voltage Rd Dynamic impedance IPP Peak pulse current RI/O Series resistance between Input & Output Cline Input capacitance per line Symbol IPP VCL VBR VRM IR IRM IRM IR V VRM VBR VCL IPP Test conditions Min. Typ. 6 8 Max. Unit VBR IR = 1 mA IRM VRM = 3V per line RI/O Tolerance 20% 68 Cline VR = 0V 100 pF V 500 Fig. 1: S21(dB) attenuation measurement and Aplac simulation. nA Fig. 2: Analog crosstalk measurements. 0.00 dB -10.00 0.00 dB -5.00 -10.00 -20.00 -15.00 -30.00 -20.00 -40.00 -25.00 -30.00 -50.00 -35.00 -60.00 -40.00 -45.00 -50.00 100.0k -70.00 1.0M 10.0M f/Hz 100.0M 1.0G -80.00 100.0k 1.0M 10.0M f/Hz 2/6 100.0M 1.0G EMIF02-MIC03F1 Fig. 3: ESD response to IEC61000-4-2 (+15kV air discharge) on one input V(in) and on one output (Vout). Fig. 4: ESD response to IEC61000-4-2 (-15kV air discharge) on one input V(in) and on one output (Vout). Fig. 5: Line capacitance versus applied voltage. C(pF) 140 120 F=1MHz Vosc=30mVRMS Tj=25C 100 80 60 40 20 VR(V) 0 0 1 2 3 4 5 3/6 EMIF02-MIC03F1 Aplac model. Rmic Rbump Lbump IN1 Lmic Lbump Rbump GND OUT1 Lsub model = D1 model = D2 Rsub Rbump GND model = D3 Lbump model = D1 model = D2 Lgnd Cgnd IN2 Rgnd OUT2 Rbump Lbump Rmic Lmic Lbump Rbump Ground return EMIF02-MIC03F1 model Aplac parameters. Model D1 Model D3 Model D2 aplacvar Rmic 68 CJO=Cdiode1 CJO=Cdiode3 CJO=Cdiode2 aplacvar Lmic 10p BV=7 BV=7 BV=7 aplacvar Cdiode1 100pF IBV=1u IBV=1u IBV=1u aplacvar Cdiode2 3.6pF IKF=1000 IKF=1000 IKF=1000 aplacvar Cdiode3 1.17nF IS=10f IS=10f IS=10f aplacvar Lbump 50pH ISR=100p ISR=100p ISR=100p aplacvar Rbump 20m N=1 N=1 N=1 aplacvar Rsub 0.5m M=0.3333 M=0.3333 M=0.3333 aplacvar Rgnd 10m RS=0.7 RS=0.12 RS=0.3 aplacvar Lgnd 50pH VJ=0.6 VJ=0.6 VJ=0.6 aplacvar Cgnd 0.15pF TT=50n TT=50n TT=50n aplacvar Lsub 10pH ORDER CODE EMIF yy - xxx zz F x 1: Pitch = 500m Bump = 315m 2: Leadfree Pitch = 500m Bump = 315m EMI Filter Number of lines Flip Chip x: resistance value (Ohms) z: capacitance value / 10(pF) or Application (3 letters) and Version (2 digits) 4/6 EMIF02-MIC03F1 PACKAGE MECHANICAL DATA FLIP CHIP 500m 10 650m 50 315m 50 50 0 m 15 1.47mm 50m 250m 10 1.07mm 50m FOOT PRINT RECOMMENDATIONS Copper pad Diameter : 250m recommended , 300m max Solder stencil opening : 330m Solder mask opening recommendation : 340m min for 300m copper pad diameter MARKING 365 240 365 Dot, ST logo xxx = marking yww = datecode (y = year ww = week) 40 220 x x x y ww All dimensions in m 5/6 EMIF02-MIC03F1 PACKING Dot identifying Pin A1 location ST ST xxx yww xxx yww xxx yww 0.73 +/- 0.05 3.5 +/- 0.1 8 +/- 0.3 ST 1.75 +/- 0.1 O 1.5 +/- 0.1 4 +/- 0.1 4 +/- 0.1 User direction of unreeling All dimensions in mm OTHER INFORMATION Ordering code Marking Package Weight Base qty Delivery mode EMIF02-MIC03F1 FWT Flip Chip 2.1 mg 5000 Tape & reel (7") Note: More packing informations are available in the application notes AN1235: ''Flip-Chip: Package description and recommandations for use'' AN1751: "EMI Filters: Recommendations and measurements" Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a registered trademark of STMicroelectronics. All other names are the property of their respective owners. (c) 2004 STMicroelectronics - All rights reserved. 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