IRF6802SDTR1PBF - INTERNATIONAL RECTIFIER

DirectFET®plus Power MOSFET 

Applicable DirectFET Outline and Substrate Outline (see p.7,8 for details)

Fig 1. Typical On-Resistance vs. Gate Voltage

Typical values (unless otherwise specified)

Fig 2. Typical Total Gate Charge vs. Gate-to-Source Voltage

 Click on this section to link to the appropriate technical paper.

 Click on this section to link to the DirectFET Website.

 Surface mounted on 1 in. square Cu board, steady state.

 TC measured with thermocouple mounted to top (Drain) of part.

 Repetitive rating; pulse width limited by max. junction temperature.

 Starting TJ = 25°C, L = 0.78mH, RG = 50Ω, IAS = 13A.

Notes:

DirectFET®plus ISOMETRIC

l RoHs Compliant Containing No Lead and Bromide 

l Low Profile (<0.7 mm)

l Dual Sided Cooling Compatible 

l Low Package Inductance

l Optimized for High Frequency Switching 

lIdeal for CPU Core DC-DC Converters

l Optimized for Control FET socket of Sync. Buck Converter

l Low Conduction and Switching Losses

l Compatible with existing Surface Mount Techniques 

l 100% Rg tested

SA

DD

S

G

S

G

SQ SX ST SA MQ MX MT MP MB

2 4 6 8 10 12 14 16

VGS, Gate -to -Source Voltage (V)

0

2

4

6

8

10

Typical RDS(on) (mΩ)

ID = 16A

TJ = 25°C

TJ = 125°C

0 5 10 15 20 25

QG Total Gate Charge (nC)

0.0

2.0

4.0

6.0

8.0

10.0

12.0

14.0

VGS, Gate-to-Source Voltage (V)

VDS= 20V

VDS= 13V

VDS= 6.0V

ID= 13A

V

DSS

V

GS

R

DS(on)

R

DS(on)

25V max ±16V max 3.2mΩ@ 10V 4.5mΩ@ 4.5V

Absolute Maximum Ratin

g

s

Parameter Units

V

DS

Drain-to-Source Voltage V

V

GS

Gate-to-Source Voltage

I

D

@ T

A

= 25°C Continuous Drain Current, V

GS

@ 10V

e

I

D

@ T

A

= 70°C Continuous Drain Current, V

GS

@ 10V

e

A

I

D

@ T

C

= 25°C Continuous Drain Current, V

GS

@ 10V

f

I

DM

Pulsed Drain Current

g

E

AS

Single Pulse Avalanche Energy

h

mJ

I

AR

Avalanche Current

g

A

66

Max.

13

57

130

±16

25

16

13

Q

g tot

Q

gd

Q

gs2

Q

rr

Q

oss

V

gs(th)

8.8nC 3.1nC 1.1nC 22nC 13nC 1.6V

Description

The IRF6802SDTRPbF combines the latest HEXFET® Power MOSFET Silicon technology with the advanced DirectFET® packaging to

achieve improved performance in a package that has the footprint of a MICRO-8 and only 0.7 mm profile. The DirectFET® package is

compatible with existing layout geometries used in power applications, PCB assembly equipment and vapor phase, infra-red or convection

soldering techniques, when application note AN-1035 is followed regarding the manufacturing methods and processes. The DirectFET®

package allows dual sided cooling to maximize thermal transfer in power systems, improving previous best thermal resistance by 80%.

The IRF6802SDTRPbF has low gate resistance and low charge along with ultra low package inductance providing significant reduction in

switching losses. The reduced losses make this product ideal for high efficiency DC-DC converters that power the latest generation of

processors operating at higher frequencies. The IRF6802SDTRPbF has been optimized for the control FET socket of synchronous buck

operating from 12 volt bus converters.

IRF6802SDPbF

IRF6802SDTRPbF

2

 Pulse width ≤ 400µs; duty cycle ≤ 2%.

Notes:

D

S

G

Static @ T

J

= 25°C (unless otherwise specified)

Parameter Min. Typ. Max. Units

BV

DSS

Drain-to-Source Breakdown Voltage 25 ––– ––– V

∆ΒV

DSS

/∆T

J

Breakdown Voltage Temp. Coefficient ––– 0.02 ––– V/°C

R

DS(on)

Static Drain-to-Source On-Resistance ––– 3.2 4.2 mΩ

––– 4.5 5.9

V

GS(th)

Gate Threshold Voltage 1.1 1.6 2.1 V V

DS

= V

GS

, I

D

= 35µA

∆V

GS(th)

/∆T

J

Gate Threshold Voltage Coefficient ––– -5.9 ––– mV/°C V

DS

= V

GS

, I

D

= 35µA

I

DSS

Drain-to-Source Leakage Current ––– ––– 1.0 µA

––– ––– 150

I

GSS

Gate-to-Source Forward Leakage ––– ––– 100 nA

Gate-to-Source Reverse Leakage ––– ––– -100

gfs Forward Transconductance 160 ––– ––– S

Q

g

Total Gate Charge ––– 8.8 13

Q

gs1

Pre-Vth Gate-to-Source Charge ––– 2.3 –––

Q

gs2

Post-Vth Gate-to-Source Charge ––– 1.1 ––– nC

Q

gd

Gate-to-Drain Charge ––– 3.1 –––

Q

godr

Gate Charge Overdrive ––– 2.3 ––– See Fig.15

Q

sw

Switch Charge (Q

gs2

+ Q

gd

)––– 4.2 –––

Q

oss

Output Charge ––– 13 ––– nC

R

G

Gate Resistance ––– 0.70 –––

Ω

t

d(on)

Turn-On Delay Time ––– 9.7 –––

t

r

Rise Time ––– 50 ––– ns

t

d(off)

Turn-Off Delay Time ––– 13 –––

t

f

Fall Time ––– 23 –––

C

iss

Input Capacitance ––– 1350 –––

C

oss

Output Capacitance ––– 400 ––– pF

C

rss

Reverse Transfer Capacitance ––– 97 –––

Diode Characteristics

Parameter Min. Typ. Max. Units

I

S

Continuous Source Current

(Body Diode) A

I

SM

Pulsed Source Current

(Body Diode)

g

V

SD

Diode Forward Voltage ––– ––– 1.0 V

t

rr

Reverse Recovery Time ––– 18 27 ns

Q

rr

Reverse Recovery Charge ––– 22 33 nC

––– ––– 26

––– ––– 130

di/dt = 260A/µs

i

T

J

= 25°C, I

S

= 13A, V

GS

= 0V

i

showing the

integral reverse

p-n junction diode.

T

J

= 25°C, I

F

= 13A

V

DS

= 20V, V

GS

= 0V, T

J

= 125°C

MOSFET symbol

R

G

= 1.5Ω

V

DS

=13V, I

D

= 13A

Conditions

See Fig.17

ƒ = 1.0MHz

V

GS

= 4.5V

I

D

= 13A

V

GS

= 0V

V

DS

= 13V

I

D

= 13A

V

DD

= 13V, V

GS

= 4.5V

i

V

DS

= 20V, V

GS

= 0V

Conditions

V

GS

= 0V, I

D

= 250µA

Reference to 25°C, I

D

= 1.0mA

V

GS

= 10V, I

D

= 16A

i

V

GS

= 4.5V, I

D

= 13A

i

V

GS

= 16V

V

GS

= -16V

V

DS

= 20V, V

GS

= 0V

V

DS

= 13V

IRF6802SDTRPbF

 Used double sided cooling , mounting pad with large heatsink.

 Mounted on minimum footprint full size board with metalized

back and with small clip heatsink.

Notes:

 Rθ is measured at TJ of approximately 90°C.

 Surface mounted on 1 in. square Cu

(still air).

 Mounted to a PCB with

small clip heatsink (still air)

 Mounted on minimum

footprint full size board with

metalized back and with small

clip heatsink (still air)

Fig 3. Maximum Effective Transient Thermal Impedance, Junction-to-Ambient 

1E-006 1E-005 0.0001 0.001 0.01 0.1 110 100

t1 , Rectangular Pulse Duration (sec)

0.001

0.01

0.1

1

10

100

Thermal Response ( Z thJA )

0.20

0.10

D = 0.50

0.02

0.01

0.05

SINGLE PULSE

( THERMAL RESPONSE )

Notes:

1. Duty Factor D = t1/t2

2. Peak Tj = P dm x Zthja + Tc

Ri (°C/W) τi (sec)

29.131 6.820693

28.050 0.918995

2.9126 0.001521

11.738 0.074589

τJ

τ1

τ2

τ2τ3

τ3

R1

R1R2

R2R3

R3

Ci= τi/Ri

τA

τ4

R4

Absolute Maximum Ratin

g

s

Parameter Units

P

D

@T

A

= 25°C Power Dissipation

el

W

P

D

@T

A

= 70°C Power Dissipation

el

P

D

@T

C

= 25°C Power Dissipation

f

T

P

Peak Soldering Temperature °C

T

J

Operating Junction and

T

STG

Storage Temperature Range

Thermal Resistance

Parameter Typ. Max. Units

R

θJA

Junction-to-Ambient

el

––– 72

R

θJA

Junction-to-Ambient

jl

12.5 –––

R

θJA

Junction-to-Ambient

kl

20 ––– °C/W

R

θJC

Junction-to-Case

f

––– 5.9

R

θJ-PCB

Junction-to-PCB Mounted 1.0 –––

Linear Derating Factor

e

W/°C

0.014

270

-40 to + 150

Max.

21

1.7

1.1

IRF6802SDTRPbF

4

Fig 5. Typical Output CharacteristicsFig 4. Typical Output Characteristics

Fig 6. Typical Transfer Characteristics Fig 7. Normalized On-Resistance vs. Temperature

Fig 8. Typical Capacitance vs.Drain-to-Source Voltage Fig 9. Typical On-Resistance vs.

Drain Current and Gate Voltage

0.1 110 100

VDS, Drain-to-Source Voltage (V)

0.01

0.1

1

10

100

1000

ID, Drain-to-Source Current (A)

VGS

TOP 10V

5.0V

4.5V

3.5V

3.0V

2.8V

2.5V

BOTTOM 2.3V

≤60µs PULSE WIDTH

Tj = 25°C

2.3V

1 2 3 4 5

VGS, Gate-to-Source Voltage (V)

0.1

1

10

100

1000

ID, Drain-to-Source Current (A)

TJ = 150°C

TJ = 25°C

TJ = -40°C

VDS = 15V

≤60µs PULSE WIDTH

0.1 110 100

VDS, Drain-to-Source Voltage (V)

1

10

100

1000

ID, Drain-to-Source Current (A)

2.3V ≤60µs PULSE WIDTH

Tj = 150°C

VGS

TOP 10V

5.0V

4.5V

3.5V

3.0V

2.8V

2.5V

BOTTOM 2.3V

-60 -40 -20 020 40 60 80 100 120 140 160

TJ , Junction Temperature (°C)

0.6

0.8

1.0

1.2

1.4

1.6

Typical RDS(on) (Normalized)

ID = 16A

VGS = 10V

VGS = 4.5V

110 100

VDS, Drain-to-Source Voltage (V)

10

100

1000

10000

100000

C, Capacitance(pF)

VGS = 0V, f = 1 MHZ

Ciss = C gs + Cgd, C ds SHORTED

Crss = C gd

Coss = Cds + Cgd

Coss

Crss

Ciss

020 40 60 80 100 120 140

ID, Drain Current (A)

2

4

6

8

10

12

Typical RDS(on) (mΩ)

TJ = 25°C

Vgs = 3.5V

Vgs = 4.0V

Vgs = 5.0V

Vgs = 7.0V

Vgs = 8.0V

Vgs = 10V

Vgs = 12V

Vgs = 15V

IRF6802SDTRPbF

Fig 13. Typical Threshold Voltage vs. Junction

Temperature

Fig 12. Maximum Drain Current vs. Case Temperature

Fig 10. Typical Source-Drain Diode Forward Voltage Fig 11. Maximum Safe Operating Area

Fig 14. Maximum Avalanche Energy vs. Drain Current

0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 1.1 1.2

VSD, Source-to-Drain Voltage (V)

0

1

10

100

1000

ISD, Reverse Drain Current (A)

TJ = 150°C

TJ = 25°C

TJ = -40°C

VGS = 0V

-75 -50 -25 025 50 75 100 125 150

TJ , Temperature ( °C )

0.8

1.0

1.2

1.4

1.6

1.8

2.0

2.2

Typical VGS(th) Gate threshold Voltage (V)

ID = 35µA

25 50 75 100 125 150

Starting TJ , Junction Temperature (°C)

0

50

100

150

200

250

300

EAS , Single Pulse Avalanche Energy (mJ)

ID

TOP 1.8A

2.6A

BOTTOM 13A

25 50 75 100 125 150

TC , Case Temperature (°C)

0

10

20

30

40

50

60

ID, Drain Current (A)

0.01 0.1 1 10 100

VDS , Drain-toSource Voltage (V)

0.1

1

10

100

1000

ID, Drain-to-Source Current (A)

Ta = 25°C

Tj = 150°C

Single Pulse

1msec

10msec

OPERATION IN THIS AREA

LIMITED BY R DS(on)

100µsec

DC

IRF6802SDTRPbF

6

Fig 15a. Gate Charge Test Circuit Fig 15b. Gate Charge Waveform

Fig 16b. Unclamped Inductive Waveforms

tp

V

(BR)DSS

I

AS

Fig 16a. Unclamped Inductive Test Circuit

Fig 17b. Switching Time Waveforms

Fig 17a. Switching Time Test Circuit

R

G

I

AS

0.01

Ω

t

p

D.U.T

L

VDS

+

-V

DD

DRIVER

A

15V

20V

VGS

Vds

Vgs

Id

Vgs(th)

Qgs1

Qgs2QgdQgodr

1K

VCC

DUT

0

L

S

20K

VDS

90%

10%

VGS

t

d(on) trtd(off) tf

VDS

Pulse Width ≤ 1 µs

Duty Factor ≤ 0.1 %

RD

VGS

RG

D.U.T.

VGS

+

-

VDD

IRF6802SDTRPbF

Fig 18. Diode Reverse Recovery Test Circuit for HEXFET® Power MOSFETs

Circuit Layout Considerations

• Low Stray Inductance

• Ground Plane

• Low Leakage Inductance

Current Transformer

P.W. Period

di/dt

Diode Recovery

dv/dt

Ripple ≤5%

Body Diode Forward Drop

Re-Applied

Voltage

Reverse

Recovery

Current

Body Diode Forward

Current

V

GS

=10V

V

DD

I

SD

Driver Gate Drive

D.U.T. I

SD

Waveform

D.U.T. V

DS

Waveform

Inductor Curent

D = P. W .

Period

*** VGS = 5V for Logic Level Devices

***

+

-

+

-







RGVDD

• dv/dt controlled by RG

• Driver same type as D.U.T.

• ISD controlled by Duty Factor "D"

• D.U.T. - Device Under Test

D.U.T



**

*

* Use P-Channel Driver for P-Channel Measurements

** Reverse Polarity for P-Channel

DirectFET®plus Board Footprint, SA Outline

(Small Size Can, A-Designation).

Please see application note AN-1035 for all details regarding the assembly of DirectFET®plus.

This includes all recommendations for stencil and substrate designs.

D

G

S

D

G=GATE

D=DRAIN

S=SOURCE

S

G

IRF6802SDTRPbF

8

DirectFET®plus Part Marking

Note: For the most current drawing please refer to IR website at http://www.irf.com/package

DirectFET®plus Outline Dimension, SA Outline

(Small Size Can, A-Designation).

Please see application note AN-1035 for all details regarding the assembly of DirectFET®plus. This includes all

recommendations for stencil and substrate designs.

CODE

A

B

C

D

E

F

G

H

J

K

L

M

R

P

0.016

0.0031

0.007

0.112

0.018

MAX

0.191

0.156

0.38

0.02

0.08

2.75

0.35

MIN

4.75

3.70

0.42

0.08

0.17

2.85

0.45

MAX

4.85

3.95

0.015

0.003

0.0008

0.108

0.014

MIN

0.146

0.187

METRIC IMPERIAL

DIMENSIONS

0.0240.52 0.62 0.020

0.041

0.085

0.020

0.95

2.05

0.48

1.05

2.15

0.52

0.081

0.037

0.019

0.68 0.72

0.83 0.87 0.0340.033

0.0280.027

0.0200.48 0.52 0.019

J1 0.0441.08 1.12 0.043

GATE MARKING

PART NUMBER

LOGO

BATCH NUMBER

DATE CODE

Line above the last character of

the date code indicates "Lead-Free"

IRF6802SDTRPbF

DirectFET®plus Tape & Reel Dimension (Showing component orientation).

Note: For the most current drawing please refer to IR website at http://www.irf.com/package

REEL DIMENSIONS

NOTE: Controlling dimensions in mm

Std reel quantity is 4800 parts. (ordered as IRF6802SDTRPBF). For 1000 parts on

7" reel, order IRF6802SDTR1PBF

B

C

MAX

N.C

0.520

N.C

0.724

0.567

0.606

IMPERIAL

H

MIN

330.0

20.2

12.8

1.5

100.0

N.C

12.4

11.9

STANDARD OPTION (QTY 4800)

CODE

A

B

C

D

E

F

G

H

MAX

N.C

13.2

N.C

18.4

14.4

15.4

MIN

12.992

0.795

0.504

0.059

3.937

N.C

0.488

0.469

METRIC

G

E

F

MIN

6.9

0.75

0.53

0.059

2.31

N.C

0.47

TR1 OPTION (QTY 1000)

MAX

N.C

12.8

N.C

13.50

12.01

MIN

177.77

19.06

13.5

1.5

58.72

N.C

11.9

METRIC

MAX

N.C

0.50

N.C

0.53

N.C

IMPERIAL

A

D

LOADED TAPE FEED DIRECTION

A

E

NOTE: CONTROLLING

DIMENSIONS IN MM CODE

A

B

C

D

E

F

G

H

F

B

C

IMPERIAL

MIN

0.311

0.154

0.469

0.215

0.158

0.197

0.059

MAX

8.10

4.10

12.30

5.55

4.20

5.20

N.C

1.60

MIN

7.90

3.90

11.90

5.45

4.00

5.00

1.50

METRIC

DIMENSIONS

MAX

0.319

0.161

0.484

0.219

0.165

0.205

N.C

0.063

D

H

G

IR WORLD HEADQUARTERS: 101 N. Sepulveda Blvd., El Segundo, California 90245, USA

To contact International Rectifier, please visit http://www.irf.com/whoto-call/