SN54ABT2827, SN74ABT2827
10-BIT BUFFERS/DRIVERS
WITH 3-STATE OUTPUTS
SCBS648A – DECEMBER 1995 – REVISED JANUAR Y 1997
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
D
Output Ports Have Equivalent 25-Ω Series
Resistors, So No External Resistors Are
Required
D
State-of-the-Art
EPIC-
ΙΙ
B
BiCMOS Design
Significantly Reduces Power Dissipation
D
Flow-Through Architecture Optimizes
PCB Layout
D
Latch-Up Performance Exceeds 500 mA
Per JEDEC Standard JESD-17
D
Typical VOLP (Output Ground Bounce) < 1 V
at VCC = 5 V, TA = 25°C
D
Package Options Include Plastic
Small-Outline (DW) Package, Ceramic
Chip Carriers (FK), and Plastic (NT) and
Ceramic (JT) DIPs
description
These 10-bit buffers or bus drivers provide a
high-performance bus interface for wide data
paths or buses carrying parity.
The 3-state control gate is a 2-input AND gate with
active-low inputs so that if either output-enable
(OE1 or OE2) input is high, all ten outputs are in
the high-impedance state. The ’ABT2827 provide
true data at their outputs.
To ensure the high-impedance state during power
up or power down, OE should be tied to VCC
through a pullup resistor; the minimum value of
the resistor is determined by the current-sinking
capability of the driver.
The outputs, which are designed to source or sink
up to 12 mA, include equivalent 25-Ω series
resistors to reduce overshoot and undershoot.
The SN54ABT2827 is characterized for operation over the full military temperature range of –55°C to 125°C.
The SN74ABT2827 is characterized for operation from –40°C to 85°C.
UNLESS OTHERWISE NOTED this document contains PRODUCTION
DATA information current as of publication date. Products conform to
specifications per the terms of Texas Instruments standard warranty.
Production processing does not necessarily include testing of all
parameters.
Copyright 1997, Texas Instruments Incorporated
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
EPIC-ΙΙB is a trademark of Texas Instruments Incorporated.
SN54ABT2827 . . . JT PACKAGE
SN74ABT2827 . . . DW OR NT PACKAGE
(TOP VIEW)
SN54ABT2827 . . . FK PACKAGE
(TOP VIEW)
1
2
3
4
5
6
7
8
9
10
11
12
24
23
22
21
20
19
18
17
16
15
14
13
OE1
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
GND
VCC
Y1
Y2
Y3
Y4
Y5
Y6
Y7
Y8
Y9
Y10
OE2
3212827
12 13
5
6
7
8
9
10
11
25
24
23
22
21
20
19
Y3
Y4
Y5
NC
Y6
Y7
Y8
A3
A4
A5
NC
A6
A7
A8
426
14 15 16 1718
A9
A10
GND
NC
OE2
Y10
Y9
A2
A1
OE1
NC
Y1
Y2
VCC
NC – No internal connection
SN54ABT2827, SN74ABT2827
10-BIT BUFFERS/DRIVERS
WITH 3-STATE OUTPUTS
SCBS648A – DECEMBER 1995 – REVISED JANUAR Y 1997
2POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
FUNCTION TABLE
INPUTS OUTPUT
OE1 OE2 AY
L L L L
LLH H
HXX Z
X H X Z
logic symbol†
1
2
A1 3
A2 4
A3 5
A4
Y1
23
Y2
22
Y3
21
Y4
20
6
A5 7
A6 8
A7 9
A8
Y5
19
Y6
18
Y7
17
Y8
16
1
13
OE1
OE2
&
EN
10
A9 Y9
15
11
A10 Y10
14
†This symbol is in accordance with ANSI/IEEE Std 91-1984 and
IEC Publication 617-12.
Pin numbers shown are for the DW, JT, and NT packages.
logic diagram (positive logic)
13
2
1
23
OE1
OE2
A1 Y1
To Nine Other Channels
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)‡
Supply voltage range, VCC –0.5 V to 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input voltage range, VI (see Note 1) –0.5 V to 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Voltage range applied to any output in the high or power-off state, VO –0.5 V to 5.5 V. . . . . . . . . . . . . . . . . . .
Current into any output in the low state, IO: SN54ABT2827 96 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
SN74ABT2827 128 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input clamp current, IIK (VI < 0) –18 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Output clamp current, IOK (VO < 0) –50 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Package thermal impedance, θJA (see Note 2): DW package 81°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
NT package 67°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Storage temperature range, Tstg –65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
‡Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only , and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may af fect device reliability.
NOTES: 1. The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed.
2. The package thermal impedance is calculated in accordance with EIA/JEDEC Std JESD51, except for through-hole packages,
which use a trace length of zero.
SN54ABT2827, SN74ABT2827
10-BIT BUFFERS/DRIVERS
WITH 3-STATE OUTPUTS
SCBS648A – DECEMBER 1995 – REVISED JANUAR Y 1997
3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
recommended operating conditions (see Note 3)
SN54ABT2827 SN74ABT2827
UNIT
MIN MAX MIN MAX
UNIT
VCC Supply voltage 4.5 5.5 4.5 5.5 V
VIH High-level input voltage 2 2 V
VIL Low-level input voltage 0.8 0.8 V
VIInput voltage 0 VCC 0 VCC V
IOH High-level output current –12 –12 mA
IOL Low-level output current 12 12 mA
∆t/∆vInput transition rise or fall rate 5 5 ns/V
TAOperating free-air temperature –55 125 –40 85 °C
NOTE 3: Unused inputs must be held high or low to prevent them from floating.
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
PARAMETER
TEST CONDITIONS
TA = 25°C SN54ABT2827 SN74ABT2827
UNIT
PARAMETER
TEST
CONDITIONS
MIN TYP†MAX MIN MAX MIN MAX
UNIT
VIK VCC = 4.5 V, II = –18 mA –1.2 –1.2 –1.2 V
VCC = 4.5 V, IOH = –1 mA 2.5 2.5 2.5
VOH
VCC = 5 V, IOH = –1 mA 3 3 3
V
V
OH
VCC =45V
IOH = –3 mA 2.4 2.4 2.4
V
V
CC =
4
.
5
V
IOH = –12 mA 2 2 2
VOL VCC = 4.5 V IOL = 12 mA 0.8 0.8 0.8 V
Vhys 100 mV
IIVCC = 0 to 5.5 V, VI = VCC or GND ±1±1±1µA
IOZH VCC = 5.5 V, VO = 2.7 V 10‡10 10‡µA
IOZL VCC = 5.5 V, VO = 0.5 V –10‡–10 –10‡µA
Ioff VCC = 0, VI or VO ≤ 4.5 V ±100 ±100 µA
ICEX VCC = 5.5 V, VO = 5.5 V Outputs high 50 50 50 µA
IO§VCC = 5.5 V, VO = 2.5 V –50 –140 –225‡–50 –225‡–50 –225‡mA
V
CC
= 5.5 V
,
Outputs high 80 250 250 250 µA
ICC
VCC
5.5
V,
IO = 0, Outputs low 35 40‡40‡40‡mA
VI = VCC or GND Outputs disabled 80 250 250 250 µA
VCC = 5.5 V,
Oi V
Outputs enabled 1.5 1.5 1.5 mA
∆ICC
One input at 3.4 V,
Other in
p
uts at
Outputs disabled 50 50 50 µA
Other
in uts
at
VCC or GND Control inputs 1.5 1.5 1.5 mA
CiVI = 2.5 V or 0.5 V 4 pF
CoVO = 2.5 V or 0.5 V 8.5 pF
†All typical values are at VCC = 5 V, TA = 25°C.
‡This data sheet limit may vary among suppliers.
§Not more than one output should be tested at a time, and the duration of the test should not exceed one second.
This is the increase in supply current for each input that is at the specified TTL voltage level rather than VCC or GND.
PRODUCT PREVIEW information concerns products in the formative or
design phase of development. Characteristic data and other
specifications are design goals. Texas Instruments reserves the right to
change or discontinue these products without notice.
SN54ABT2827, SN74ABT2827
10-BIT BUFFERS/DRIVERS
WITH 3-STATE OUTPUTS
SCBS648A – DECEMBER 1995 – REVISED JANUAR Y 1997
4POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
switching characteristics over recommended ranges of supply voltage and operating free-air
temperature, CL = 50 pF (unless otherwise noted) (see Figure 1)
PARAMETER FROM
(INPUT)
TO
(OUTPUT)
VCC = 5 V,
TA = 25°CSN54ABT2827 SN74ABT2827 UNIT
(INPUT)
(OUTPUT)
MIN TYP MAX MIN MAX MIN MAX
tPLH
A
Y
1.1 3.3 5.1 1.1 5.6 1.1 5.5
ns
tPHL
A
Y
1.1 2.7 4.5 1.1 5.2 1.1 5.1
ns
tPZH
OE
Y
1 4 5.9 1 6.8 1 6.7
ns
tPZL
OE
Y
1 4.2 6.8 1 8 1 7.8
ns
tPHZ
OE
Y
2 5.3 6.7 2 7.4 2 7.2
ns
tPLZ
OE
Y
1.3 4.8 7.2 1.3 8.5 1.3 7.5
ns
PRODUCT PREVIEW information concerns products in the formative or
design phase of development. Characteristic data and other
specifications are design goals. Texas Instruments reserves the right to
change or discontinue these products without notice.
SN54ABT2827, SN74ABT2827
10-BIT BUFFERS/DRIVERS
WITH 3-STATE OUTPUTS
SCBS648A – DECEMBER 1995 – REVISED JANUAR Y 1997
5
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
PARAMETER MEASUREMENT INFORMATION
1.5 V
th
tsu
From Output
Under Test
CL = 50 pF
(see Note A)
LOAD CIRCUIT
S1
7 V
Open
GND
500 Ω
500 Ω
Timing Input 1.5 V 3 V
0 V
1.5 V 1.5 V 3 V
0 V
3 V
0 V
1.5 V 1.5 V
tw
Input
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
INVERTING AND NONINVERTING OUTPUTS
VOLTAGE WAVEFORMS
PULSE DURATION
tPLH
tPHL
tPHL
tPLH
VOH
VOH
VOL
VOL
1.5 V 1.5 V 3 V
0 V
1.5 V1.5 V
Input
1.5 V
Output
Control
Output
W aveform 1
S1 at 7 V
(see Note B)
Output
W aveform 2
S1 at Open
(see Note B)
VOL
VOH
tPZL
tPZH
tPLZ
tPHZ
1.5 V
1.5 V
3.5 V
0 V
1.5 V VOL + 0.3 V
1.5 V VOH – 0.3 V
≈ 0 V
3 V
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
LOW- AND HIGH-LEVEL ENABLING
Output
Output
tPLH/tPHL
tPLZ/tPZL
tPHZ/tPZH
Open
7 V
Open
TEST S1
Data Input
NOTES: A. CL includes probe and jig capacitance.
B. W aveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
W aveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω, tr ≤ 2.5 ns, tf≤ 2.5
n
D. The outputs are measured one at a time with one transition per measurement.
Figure 1. Load Circuit and Voltage Waveforms
PACKAGING INFORMATION
Orderable Device Status (1) Package
Type Package
Drawing Pins Package
Qty Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
SN74ABT2827DW ACTIVE SOIC DW 24 25 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN74ABT2827DWE4 ACTIVE SOIC DW 24 25 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN74ABT2827DWG4 ACTIVE SOIC DW 24 25 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN74ABT2827DWR ACTIVE SOIC DW 24 2000 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN74ABT2827DWRE4 ACTIVE SOIC DW 24 2000 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN74ABT2827DWRG4 ACTIVE SOIC DW 24 2000 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN74ABT2827NT ACTIVE PDIP NT 24 15 Pb-Free
(RoHS) CU NIPDAU N / A for Pkg Type
SN74ABT2827NTE4 ACTIVE PDIP NT 24 15 Pb-Free
(RoHS) CU NIPDAU N / A for Pkg Type
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
PACKAGE OPTION ADDENDUM
www.ti.com 18-Sep-2008
Addendum-Page 1
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device Package
Type Package
Drawing Pins SPQ Reel
Diameter
(mm)
Reel
Width
W1 (mm)
A0
(mm) B0
(mm) K0
(mm) P1
(mm) W
(mm) Pin1
Quadrant
SN74ABT2827DWR SOIC DW 24 2000 330.0 24.4 10.75 15.7 2.7 12.0 24.0 Q1
PACKAGE MATERIALS INFORMATION
www.ti.com 14-Jul-2012
Pack Materials-Page 1
*All dimensions are nominal
Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
SN74ABT2827DWR SOIC DW 24 2000 367.0 367.0 45.0
PACKAGE MATERIALS INFORMATION
www.ti.com 14-Jul-2012
Pack Materials-Page 2
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